From a1378f94ce8e7843d5a3cd27bc72847973f8e7ec Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Fri, 28 Jun 2024 15:42:13 +0200 Subject: [PATCH 1/3] X87 Code Refactoring and Optimization Pass --- FEXCore/Source/CMakeLists.txt | 1 + .../Interface/Core/OpcodeDispatcher.cpp | 131 +- .../Source/Interface/Core/OpcodeDispatcher.h | 67 +- .../Core/OpcodeDispatcher/Vector.cpp | 4 +- .../Interface/Core/OpcodeDispatcher/X87.cpp | 1183 ++++++----------- .../Core/OpcodeDispatcher/X87F64.cpp | 735 +++------- FEXCore/Source/Interface/IR/PassManager.cpp | 1 + FEXCore/Source/Interface/IR/Passes.h | 1 + .../IR/Passes/x87StackOptimizationPass.cpp | 1069 +++++++++++++++ docs/SourceOutline.md | 3 +- unittests/gcc-target-tests-32/Known_Failures | 1 - unittests/gcc-target-tests-64/Known_Failures | 9 - 12 files changed, 1827 insertions(+), 1378 deletions(-) create mode 100644 FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp diff --git a/FEXCore/Source/CMakeLists.txt b/FEXCore/Source/CMakeLists.txt index 46dbde877d..4dafa6c0dd 100644 --- a/FEXCore/Source/CMakeLists.txt +++ b/FEXCore/Source/CMakeLists.txt @@ -143,6 +143,7 @@ set (SRCS Interface/IR/Passes/RedundantFlagCalculationElimination.cpp Interface/IR/Passes/DeadStoreElimination.cpp Interface/IR/Passes/RegisterAllocationPass.cpp + Interface/IR/Passes/x87StackOptimizationPass.cpp Utils/Telemetry.cpp Utils/Threads.cpp Utils/Profiler.cpp diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 16a32ed5e7..3eb6ea40b9 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -10,6 +10,7 @@ desc: Handles x86/64 ops to IR, no-pf opt, local-flags opt #include "Interface/Context/Context.h" #include "Interface/Core/OpcodeDispatcher.h" #include "Interface/Core/X86Tables/X86Tables.h" +#include "Interface/IR/IR.h" #include "Interface/IR/IREmitter.h" #include @@ -6236,9 +6237,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 1 = Invalid - {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 32>}, + {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 32>}, - {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 32>}, + {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 32>}, {OPDReg(0xD9, 4) | 0x00, 8, &OpDispatchBuilder::X87LDENVF64}, @@ -6248,16 +6249,16 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xD9, 7) | 0x00, 8, &OpDispatchBuilder::X87FSTCW}, - {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64, 80>}, + {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDFromStack>}, {OPD(0xD9, 0xC8), 8, &OpDispatchBuilder::FXCH}, {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::NOPOp}, // FNOP // D1 = Invalid // D8 = Invalid - {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::FCHSF64}, - {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::FABSF64}, + {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKCHANGESIGN, false>}, + {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKABS, false>}, // E2 = Invalid {OPD(0xD9, 0xE4), 1, &OpDispatchBuilder::FTSTF64}, - {OPD(0xD9, 0xE5), 1, &OpDispatchBuilder::X87FXAMF64}, + {OPD(0xD9, 0xE5), 1, &OpDispatchBuilder::X87FXAM}, // E6 = Invalid {OPD(0xD9, 0xE8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64_Const, 0x3FF0000000000000>}, // 1.0 {OPD(0xD9, 0xE9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64_Const, 0x400A934F0979A372>}, // log2l(10) @@ -6268,22 +6269,22 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xD9, 0xEE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64_Const, 0>}, // 0.0 // EF = Invalid - {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOpF64, IR::OP_F64F2XM1>}, - {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::X87FYL2XF64}, - {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::X87TANF64}, - {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::X87ATANF64}, - {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::FXTRACTF64}, - {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOpF64, IR::OP_F64FPREM1>}, + {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80F2XM1STACK, false>}, + {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, false>}, + {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80PTANSTACK, true>}, + {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ATANSTACK, false>}, + {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80XTRACTSTACK, false>}, + {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREM1STACK, true>}, {OPD(0xD9, 0xF6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, false>}, {OPD(0xD9, 0xF7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, true>}, - {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOpF64, IR::OP_F64FPREM>}, - {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::X87FYL2XF64}, - {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::FSQRTF64}, - {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::X87SinCosF64}, - {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::FRNDINTF64}, - {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOpF64, IR::OP_F64SCALE>}, - {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOpF64, IR::OP_F64SIN>}, - {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOpF64, IR::OP_F64COS>}, + {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREMSTACK, true>}, + {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, true>}, + {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SQRTSTACK, false>}, + {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINCOSSTACK, true>}, + {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ROUNDSTACK, false>}, + {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SCALESTACK, false>}, + {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINSTACK, true>}, + {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80COSSTACK, true>}, {OPDReg(0xDA, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADDF64, 32, true, OpDispatchBuilder::OpResult::RES_ST0>}, @@ -6326,7 +6327,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 6 = Invalid - {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 80>}, + {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 80>}, {OPD(0xDB, 0xC0), 8, &OpDispatchBuilder::X87FCMOV}, @@ -6360,18 +6361,18 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDC, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADDF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDC, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMULF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDD, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDF64, 64>}, {OPDReg(0xDD, 1) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FISTF64, true>}, - {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 64>}, + {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 64>}, - {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64WithWidth, 64>}, + {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTF64, 64>}, {OPDReg(0xDD, 4) | 0x00, 8, &OpDispatchBuilder::X87FRSTORF64}, @@ -6381,8 +6382,8 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xDD, 7) | 0x00, 8, &OpDispatchBuilder::X87FNSTSW}, {OPD(0xDD, 0xC0), 8, &OpDispatchBuilder::X87FFREE}, - {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::FST}, // register-register from regular X87 - {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::FST}, //^ + {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, // register-register from regular X87 + {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, //^ {OPD(0xDD, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMIF64, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, {OPD(0xDD, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMIF64, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, @@ -6406,10 +6407,10 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDE, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADDF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMULF64, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xD9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMIF64, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, true>}, - {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUBF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIVF64, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDF, 0) | 0x00, 8, &OpDispatchBuilder::FILDF64}, @@ -6466,9 +6467,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 1 = Invalid - {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 32>}, + {OPDReg(0xD9, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 32>}, - {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 32>}, + {OPDReg(0xD9, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 32>}, {OPDReg(0xD9, 4) | 0x00, 8, &OpDispatchBuilder::X87LDENV}, @@ -6478,13 +6479,13 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xD9, 7) | 0x00, 8, &OpDispatchBuilder::X87FSTCW}, - {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLD, 80>}, + {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDFromStack>}, {OPD(0xD9, 0xC8), 8, &OpDispatchBuilder::FXCH}, {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::NOPOp}, // FNOP // D1 = Invalid // D8 = Invalid - {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::FCHS}, - {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::FABS}, + {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKCHANGESIGN, false>}, + {OPD(0xD9, 0xE1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKABS, false>}, // E2 = Invalid {OPD(0xD9, 0xE4), 1, &OpDispatchBuilder::FTST}, {OPD(0xD9, 0xE5), 1, &OpDispatchBuilder::X87FXAM}, @@ -6498,22 +6499,22 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xD9, 0xEE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLD_Const, NamedVectorConstant::NAMED_VECTOR_ZERO>}, // 0.0 // EF = Invalid - {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80F2XM1>}, - {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::X87FYL2X}, - {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::X87TAN}, - {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::X87ATAN}, - {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::FXTRACT}, - {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOp, IR::OP_F80FPREM1>}, + {OPD(0xD9, 0xF0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80F2XM1STACK, false>}, + {OPD(0xD9, 0xF1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, false>}, + {OPD(0xD9, 0xF2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80PTANSTACK, true>}, + {OPD(0xD9, 0xF3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ATANSTACK, false>}, + {OPD(0xD9, 0xF4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80XTRACTSTACK, false>}, + {OPD(0xD9, 0xF5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREM1STACK, true>}, {OPD(0xD9, 0xF6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, false>}, {OPD(0xD9, 0xF7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87ModifySTP, true>}, - {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOp, IR::OP_F80FPREM>}, - {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::X87FYL2X}, - {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80SQRT>}, - {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::X87SinCos}, - {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::FRNDINT}, - {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87BinaryOp, IR::OP_F80SCALE>}, - {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80SIN>}, - {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87UnaryOp, IR::OP_F80COS>}, + {OPD(0xD9, 0xF8), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80FPREMSTACK, true>}, + {OPD(0xD9, 0xF9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87FYL2X, true>}, + {OPD(0xD9, 0xFA), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SQRTSTACK, false>}, + {OPD(0xD9, 0xFB), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINCOSSTACK, true>}, + {OPD(0xD9, 0xFC), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80ROUNDSTACK, false>}, + {OPD(0xD9, 0xFD), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SCALESTACK, false>}, + {OPD(0xD9, 0xFE), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80SINSTACK, true>}, + {OPD(0xD9, 0xFF), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80COSSTACK, true>}, {OPDReg(0xDA, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADD, 32, true, OpDispatchBuilder::OpResult::RES_ST0>}, @@ -6556,7 +6557,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { // 6 = Invalid - {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 80>}, + {OPDReg(0xDB, 7) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 80>}, {OPD(0xDB, 0xC0), 8, &OpDispatchBuilder::X87FCMOV}, @@ -6590,18 +6591,18 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDC, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADD, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDC, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMUL, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDC, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDD, 0) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLD, 64>}, {OPDReg(0xDD, 1) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FIST, true>}, - {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 64>}, + {OPDReg(0xDD, 2) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 64>}, - {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTWithWidth, 64>}, + {OPDReg(0xDD, 3) | 0x00, 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FST, 64>}, {OPDReg(0xDD, 4) | 0x00, 8, &OpDispatchBuilder::X87FRSTOR}, @@ -6611,8 +6612,8 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPDReg(0xDD, 7) | 0x00, 8, &OpDispatchBuilder::X87FNSTSW}, {OPD(0xDD, 0xC0), 8, &OpDispatchBuilder::X87FFREE}, - {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::FST}, - {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::FST}, + {OPD(0xDD, 0xD0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, + {OPD(0xDD, 0xD8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSTToStack>}, {OPD(0xDD, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMI, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, {OPD(0xDD, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMI, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, false>}, @@ -6636,10 +6637,10 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) { {OPD(0xDE, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FADD, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xC8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FMUL, 80, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPD(0xDE, 0xD9), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FCOMI, 80, false, OpDispatchBuilder::FCOMIFlags::FLAGS_X87, true>}, - {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, - {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xE8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FSUB, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, true, OpDispatchBuilder::OpResult::RES_STI>}, + {OPD(0xDE, 0xF8), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FDIV, 80, false, false, OpDispatchBuilder::OpResult::RES_STI>}, {OPDReg(0xDF, 0) | 0x00, 8, &OpDispatchBuilder::FILD}, diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 248d7c577a..1fc628e3e7 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -731,45 +731,42 @@ class OpDispatchBuilder final : public IREmitter { void VZEROOp(OpcodeArgs); // X87 Ops - Ref ReconstructFSW(); + Ref ReconstructFSW_Helper(Ref T = nullptr); // Returns new x87 stack top from FSW. - Ref ReconstructX87StateFromFSW(Ref FSW); - void FLD(OpcodeArgs, size_t width); - void FLD_Const(OpcodeArgs, NamedVectorConstant constant); + Ref ReconstructX87StateFromFSW_Helper(Ref FSW); + void FLD(OpcodeArgs, size_t Width); + void FLDFromStack(OpcodeArgs); + void FLD_Const(OpcodeArgs, NamedVectorConstant Constant); void FBLD(OpcodeArgs); void FBSTP(OpcodeArgs); void FILD(OpcodeArgs); - void FSTWithWidth(OpcodeArgs, size_t width); - - void FST(OpcodeArgs); + void FST(OpcodeArgs, size_t Width); + void FSTToStack(OpcodeArgs); void FIST(OpcodeArgs, bool Truncate); + // OpResult is used for Stack operations, + // describes if the result of the operation is stored in ST(0) or ST(i), + // where ST(i) is one of the arguments to the operation. enum class OpResult { RES_ST0, RES_STI, }; - void FADD(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FMUL(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FDIV(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); - void FSUB(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); - void FCHS(OpcodeArgs); - void FABS(OpcodeArgs); + + void X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool ZeroC2); + void FADD(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FMUL(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FDIV(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); + void FSUB(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); void FTST(OpcodeArgs); - void FRNDINT(OpcodeArgs); - void FXTRACT(OpcodeArgs); void FNINIT(OpcodeArgs); - void X87UnaryOp(OpcodeArgs, FEXCore::IR::IROps IROp); - void X87BinaryOp(OpcodeArgs, FEXCore::IR::IROps IROp); void X87ModifySTP(OpcodeArgs, bool Inc); void X87SinCos(OpcodeArgs); - void X87FYL2X(OpcodeArgs); - void X87TAN(OpcodeArgs); - void X87ATAN(OpcodeArgs); + void X87FYL2X(OpcodeArgs, bool IsFYL2XP1); void X87LDENV(OpcodeArgs); void X87FLDCW(OpcodeArgs); void X87FNSTENV(OpcodeArgs); @@ -789,27 +786,25 @@ class OpDispatchBuilder final : public IREmitter { FLAGS_X87, FLAGS_RFLAGS, }; - void FCOMI(OpcodeArgs, size_t width, bool Integer, FCOMIFlags whichflags, bool poptwice); + void FCOMI(OpcodeArgs, size_t Width, bool Integer, FCOMIFlags WhichFlags, bool PopTwice); // F64 X87 Ops - void FLDF64(OpcodeArgs, size_t width); - void FLDF64_Const(OpcodeArgs, uint64_t num); + void FLDF64(OpcodeArgs, size_t Width); + void FLDF64_Const(OpcodeArgs, uint64_t Num); void FBLDF64(OpcodeArgs); void FBSTPF64(OpcodeArgs); void FILDF64(OpcodeArgs); - void FSTF64WithWidth(OpcodeArgs, size_t width); - - void FSTF64(OpcodeArgs); + void FSTF64(OpcodeArgs, size_t Width); void FISTF64(OpcodeArgs, bool Truncate); - void FADDF64(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FMULF64(OpcodeArgs, size_t width, bool Integer, OpResult ResInST0); - void FDIVF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); - void FSUBF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpResult ResInST0); + void FADDF64(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FMULF64(OpcodeArgs, size_t Width, bool Integer, OpResult ResInST0); + void FDIVF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); + void FSUBF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpResult ResInST0); void FCHSF64(OpcodeArgs); void FABSF64(OpcodeArgs); void FTSTF64(OpcodeArgs); @@ -821,7 +816,6 @@ class OpDispatchBuilder final : public IREmitter { void X87BinaryOpF64(OpcodeArgs, FEXCore::IR::IROps IROp); void X87SinCosF64(OpcodeArgs); void X87FLDCWF64(OpcodeArgs); - void X87FYL2XF64(OpcodeArgs); void X87TANF64(OpcodeArgs); void X87ATANF64(OpcodeArgs); void X87FNSAVEF64(OpcodeArgs); @@ -1323,6 +1317,8 @@ class OpDispatchBuilder final : public IREmitter { } private: + FEX_CONFIG_OPT(ReducedPrecisionMode, X87REDUCEDPRECISION); + struct JumpTargetInfo { Ref BlockEntry; bool HaveEmitted; @@ -1962,7 +1958,11 @@ class OpDispatchBuilder final : public IREmitter { // First, set flags according to Arm FCMP. HandleNZCVWrite(); _FCmp(ElementSize, Src1, Src2); + ComissFlags(InvalidateAF); + } + // Sets flags for a COMISS instruction + void ComissFlags(bool InvalidateAF = false) { // Now set COMISS flags by converts NZCV from the Arm representation to an // eXternal representation that's totally not a euphemism for x86, nuh-uh. if (CTX->HostFeatures.SupportsFlagM2) { @@ -2262,12 +2262,9 @@ class OpDispatchBuilder final : public IREmitter { /** @} */ Ref GetX87Top(); - void SetX87ValidTag(Ref Value, bool Valid); - Ref GetX87ValidTag(Ref Value); Ref GetX87Tag(Ref Value, Ref AbridgedFTW); - Ref GetX87Tag(Ref Value); void SetX87FTW(Ref FTW); - Ref GetX87FTW(); + Ref GetX87FTW_Helper(); void SetX87Top(Ref Value); bool DestIsLockedMem(FEXCore::X86Tables::DecodedOp Op) const { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index 89c18c10a7..e2e0256f49 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -2688,7 +2688,7 @@ void OpDispatchBuilder::SaveX87State(OpcodeArgs, Ref MemBase) { _StoreMem(GPRClass, 2, MemBase, FCW, 2); } - { _StoreMem(GPRClass, 2, ReconstructFSW(), MemBase, _Constant(2), 2, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, 2, ReconstructFSW_Helper(), MemBase, _Constant(2), 2, MEM_OFFSET_SXTX, 1); } { // Abridged FTW @@ -2863,7 +2863,7 @@ void OpDispatchBuilder::RestoreX87State(Ref MemBase) { { auto NewFSW = _LoadMem(GPRClass, 2, MemBase, _Constant(2), 2, MEM_OFFSET_SXTX, 1); - ReconstructX87StateFromFSW(NewFSW); + ReconstructX87StateFromFSW_Helper(NewFSW); } { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp index 4158ee6f01..c2b56f2369 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp @@ -8,6 +8,7 @@ desc: Handles x86/64 x87 to IR #include "Interface/Core/OpcodeDispatcher.h" #include "Interface/Core/X86Tables/X86Tables.h" +#include "Interface/IR/IR.h" #include #include @@ -20,7 +21,6 @@ desc: Handles x86/64 x87 to IR namespace FEXCore::IR { class OrderedNode; - #define OpcodeArgs [[maybe_unused]] FEXCore::X86Tables::DecodedOp Op Ref OpDispatchBuilder::GetX87Top() { @@ -29,19 +29,6 @@ Ref OpDispatchBuilder::GetX87Top() { return _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); } -void OpDispatchBuilder::SetX87ValidTag(Ref Value, bool Valid) { - // if we are popping then we must first mark this location as empty - Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); - Ref RegMask = _Lshl(OpSize::i32Bit, _Constant(1), Value); - Ref NewAbridgedFTW = Valid ? _Or(OpSize::i32Bit, AbridgedFTW, RegMask) : _Andn(OpSize::i32Bit, AbridgedFTW, RegMask); - StoreContext(AbridgedFTWIndex, NewAbridgedFTW); -} - -Ref OpDispatchBuilder::GetX87ValidTag(Ref Value) { - Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); - return _And(OpSize::i32Bit, _Lshr(OpSize::i32Bit, AbridgedFTW, Value), _Constant(1)); -} - Ref OpDispatchBuilder::GetX87Tag(Ref Value, Ref AbridgedFTW) { Ref RegValid = _And(OpSize::i32Bit, _Lshr(OpSize::i32Bit, AbridgedFTW, Value), _Constant(1)); Ref X87Empty = _Constant(static_cast(FPState::X87Tag::Empty)); @@ -50,10 +37,6 @@ Ref OpDispatchBuilder::GetX87Tag(Ref Value, Ref AbridgedFTW) { return _Select(FEXCore::IR::COND_EQ, RegValid, _Constant(0), X87Empty, X87Valid); } -Ref OpDispatchBuilder::GetX87Tag(Ref Value) { - return GetX87Tag(Value, LoadContext(AbridgedFTWIndex)); -} - void OpDispatchBuilder::SetX87FTW(Ref FTW) { Ref X87Empty = _Constant(static_cast(FPState::X87Tag::Empty)); Ref NewAbridgedFTW; @@ -72,156 +55,67 @@ void OpDispatchBuilder::SetX87FTW(Ref FTW) { StoreContext(AbridgedFTWIndex, NewAbridgedFTW); } -Ref OpDispatchBuilder::GetX87FTW() { - Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); - Ref FTW = _Constant(0); - - for (int i = 0; i < 8; i++) { - const auto RegTag = GetX87Tag(_Constant(i), AbridgedFTW); - FTW = _Orlshl(OpSize::i32Bit, FTW, RegTag, i * 2); - } - - return FTW; -} - void OpDispatchBuilder::SetX87Top(Ref Value) { _StoreContext(1, GPRClass, Value, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); } -Ref OpDispatchBuilder::ReconstructFSW() { - // We must construct the FSW from our various bits - auto C0 = GetRFLAG(FEXCore::X86State::X87FLAG_C0_LOC); - auto C1 = GetRFLAG(FEXCore::X86State::X87FLAG_C1_LOC); - auto C2 = GetRFLAG(FEXCore::X86State::X87FLAG_C2_LOC); - auto C3 = GetRFLAG(FEXCore::X86State::X87FLAG_C3_LOC); - - Ref FSW = _Lshl(OpSize::i64Bit, C0, _Constant(8)); - FSW = _Orlshl(OpSize::i64Bit, FSW, C1, 9); - FSW = _Orlshl(OpSize::i64Bit, FSW, C2, 10); - FSW = _Orlshl(OpSize::i64Bit, FSW, C3, 14); - - auto Top = GetX87Top(); - FSW = _Bfi(OpSize::i64Bit, 3, 11, FSW, Top); - return FSW; -} - -Ref OpDispatchBuilder::ReconstructX87StateFromFSW(Ref FSW) { - auto Top = _Bfe(OpSize::i32Bit, 3, 11, FSW); - SetX87Top(Top); - - auto C0 = _Bfe(OpSize::i32Bit, 1, 8, FSW); - auto C1 = _Bfe(OpSize::i32Bit, 1, 9, FSW); - auto C2 = _Bfe(OpSize::i32Bit, 1, 10, FSW); - auto C3 = _Bfe(OpSize::i32Bit, 1, 14, FSW); - - SetRFLAG(C0); - SetRFLAG(C1); - SetRFLAG(C2); - SetRFLAG(C3); - return Top; -} - -void OpDispatchBuilder::FLD(OpcodeArgs, size_t width) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - - size_t read_width = (width == 80) ? 16 : width / 8; - - Ref data {}; - - if (!Op->Src[0].IsNone()) { - // Read from memory - data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], read_width, Op->Flags); - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - data = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, offset), mask); - data = _LoadContextIndexed(data, 16, MMBaseOffset(), 16, FPRClass); - } - Ref converted = data; +// Float LoaD operation with memory operand +void OpDispatchBuilder::FLD(OpcodeArgs, size_t Width) { + size_t ReadWidth = (Width == 80) ? 16 : Width / 8; + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); + Ref ConvertedData = Data; // Convert to 80bit float - if (width == 32 || width == 64) { - converted = _F80CVTTo(data, width / 8); + if (Width == 32 || Width == 64) { + ConvertedData = _F80CVTTo(Data, ReadWidth); } + _PushStack(ConvertedData, Data, ReadWidth, true); +} - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); +// Float LoaD operation with memory operand +void OpDispatchBuilder::FLDFromStack(OpcodeArgs) { + _CopyPushStack(Op->OP & 7); } void OpDispatchBuilder::FBLD(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Read from memory - Ref data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); - Ref converted = _F80BCDLoad(data); - _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); + Ref ConvertedData = _F80BCDLoad(Data); + _PushStack(ConvertedData, Data, 16, true); } void OpDispatchBuilder::FBSTP(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - - Ref converted = _F80BCDStore(data); - + Ref converted = _F80BCDStore(_ReadStackValue(0)); StoreResult_WithOpSize(FPRClass, Op, Op->Dest, converted, 10, 1); - - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } -void OpDispatchBuilder::FLD_Const(OpcodeArgs, NamedVectorConstant constant) { +void OpDispatchBuilder::FLD_Const(OpcodeArgs, NamedVectorConstant Constant) { // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - Ref data = LoadAndCacheNamedVectorConstant(16, constant); - - // Write to ST[TOP] - _StoreContextIndexed(data, top, 16, MMBaseOffset(), 16, FPRClass); + Ref Data = LoadAndCacheNamedVectorConstant(16, Constant); + _PushStack(Data, Data, 16, true); } void OpDispatchBuilder::FILD(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - size_t read_width = GetSrcSize(Op); - + size_t ReadWidth = GetSrcSize(Op); // Read from memory - auto data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], read_width, Op->Flags); - - auto zero = _Constant(0); + auto* Data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); // Sign extend to 64bits - if (read_width != 8) { - data = _Sbfe(OpSize::i64Bit, read_width * 8, 0, data); + if (ReadWidth != 8) { + Data = _Sbfe(OpSize::i64Bit, ReadWidth * 8, 0, Data); } // We're about to clobber flags to grab the sign, so save NZCV. SaveNZCV(); - // Extract sign and make interger absolute - _SubNZCV(OpSize::i64Bit, data, zero); + // Extract sign and make integer absolute + auto zero = _Constant(0); + _SubNZCV(OpSize::i64Bit, Data, zero); auto sign = _NZCVSelect(OpSize::i64Bit, CondClassType {COND_SLT}, _Constant(0x8000), zero); - auto absolute = _Neg(OpSize::i64Bit, data, CondClassType {COND_MI}); + auto absolute = _Neg(OpSize::i64Bit, Data, CondClassType {COND_MI}); - // left justify the absolute interger + // left justify the absolute integer auto shift = _Sub(OpSize::i64Bit, _Constant(63), _FindMSB(IR::OpSize::i64Bit, absolute)); auto shifted = _Lshl(OpSize::i64Bit, absolute, shift); @@ -229,597 +123,209 @@ void OpDispatchBuilder::FILD(OpcodeArgs) { auto zeroed_exponent = _Select(COND_EQ, absolute, zero, zero, adjusted_exponent); auto upper = _Or(OpSize::i64Bit, sign, zeroed_exponent); - - Ref converted = _VCastFromGPR(16, 8, shifted); - converted = _VInsElement(16, 8, 1, 0, converted, _VCastFromGPR(16, 8, upper)); - - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); + Ref ConvertedData = _VCastFromGPR(16, 8, shifted); + ConvertedData = _VInsElement(16, 8, 1, 0, ConvertedData, _VCastFromGPR(16, 8, upper)); + _PushStack(ConvertedData, Data, ReadWidth, false); } -void OpDispatchBuilder::FSTWithWidth(OpcodeArgs, size_t width) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - if (width == 80) { - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, data, 10, 1); - } else if (width == 32 || width == 64) { - auto result = _F80CVT(width / 8, data); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, result, width / 8, 1); - } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); +void OpDispatchBuilder::FST(OpcodeArgs, size_t Width) { + Ref Mem = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.LoadData = false}); + _StoreStackMemory(Mem, OpSize::i128Bit, true, Width / 8); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } } -void OpDispatchBuilder::FIST(OpcodeArgs, bool Truncate) { - auto Size = GetSrcSize(Op); - - auto orig_top = GetX87Top(); - Ref data = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - data = _F80CVTInt(Size, data, Truncate); - - StoreResult_WithOpSize(GPRClass, Op, Op->Dest, data, Size, 1); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); +void OpDispatchBuilder::FSTToStack(OpcodeArgs) { + const uint8_t Offset = Op->OP & 7; + if (Offset != 0) { + _StoreStackToStack(Offset); } -} - -void OpDispatchBuilder::FADD(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - if (!Op->Src[0].IsNone()) { - // Memory arg - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - auto result = _F80Add(a, b); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); } -void OpDispatchBuilder::FMUL(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - } - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto result = _F80Mul(a, b); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FDIV(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; - } - - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - } - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); +// Store integer to memory (possibly with truncation) +void OpDispatchBuilder::FIST(OpcodeArgs, bool Truncate) { + auto Size = GetSrcSize(Op); + // FIXME(pmatos): is there any advantage of using STORESTACKMEMORY here? + // Do we need STORESTACKMEMORY at all? + Ref Data = _ReadStackValue(0); + Data = _F80CVTInt(Size, Data, Truncate); - Ref result {}; - if (reverse) { - result = _F80Div(b, a); - } else { - result = _F80Div(a, b); - } + StoreResult_WithOpSize(GPRClass, Op, Op->Dest, Data, Size, 1); if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + _PopStackDestroy(); } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); } -void OpDispatchBuilder::FSUB(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); +void OpDispatchBuilder::FADD(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto Offset = Op->OP & 7; + auto St0 = 0; if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; + _F80AddStack(Offset, St0); + } else { + _F80AddStack(St0, Offset); } - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - } - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - Ref result {}; - if (reverse) { - result = _F80Sub(b, a); - } else { - result = _F80Sub(a, b); - } - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FCHS(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(0); - auto high = _Constant(0b1'000'0000'0000'0000ULL); - Ref data = _VCastFromGPR(16, 8, low); - data = _VInsGPR(16, 8, 1, data, high); - - auto result = _VXor(16, 1, a, data); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FABS(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(~0ULL); - auto high = _Constant(0b0'111'1111'1111'1111ULL); - Ref data = _VCastFromGPR(16, 8, low); - data = _VInsGPR(16, 8, 1, data, high); - - auto result = _VAnd(16, 1, a, data); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FTST(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(0); - Ref data = _VCastFromGPR(16, 8, low); - Ref Res = _F80Cmp(a, data); - - Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); - Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); - Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); - HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); - HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); - - SetRFLAG(HostFlag_CF); - SetRFLAG(_Constant(0)); - SetRFLAG(HostFlag_Unordered); - SetRFLAG(HostFlag_ZF); -} - -void OpDispatchBuilder::FRNDINT(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - auto result = _F80Round(a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FXTRACT(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - - auto exp = _F80XTRACT_EXP(a); - auto sig = _F80XTRACT_SIG(a); - - // Write to ST[TOP] - _StoreContextIndexed(exp, orig_top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(sig, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FNINIT(OpcodeArgs) { - auto Zero = _Constant(0); - // Init FCW to 0x037F - auto NewFCW = _Constant(16, 0x037F); - _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); - - // Init FSW to 0 - SetX87Top(Zero); - - SetRFLAG(Zero); - SetRFLAG(Zero); - SetRFLAG(Zero); - SetRFLAG(Zero); - - // Tags all get marked as invalid - StoreContext(AbridgedFTWIndex, Zero); -} - -void OpDispatchBuilder::FCOMI(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::FCOMIFlags whichflags, bool poptwice) { - auto top = GetX87Top(); - auto mask = _Constant(7); - - Ref arg {}; - Ref b {}; - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (width == 16 || width == 32 || width == 64) { - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTToInt(arg, width / 8); - } else { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _F80CVTTo(arg, width / 8); - } + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); + return; } - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - Ref Res = _F80Cmp(a, b); - - Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); - Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); - Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); - HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); - HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); - - if (whichflags == FCOMIFlags::FLAGS_X87) { - SetRFLAG(HostFlag_CF); - SetRFLAG(_Constant(0)); - SetRFLAG(HostFlag_Unordered); - SetRFLAG(HostFlag_ZF); - } else { - // Invalidate deferred flags early - // OF, SF, AF, PF all undefined - InvalidateDeferredFlags(); - - SetRFLAG(HostFlag_CF); - SetRFLAG(HostFlag_ZF); - - // PF is stored inverted, so invert from the host flag. - // TODO: This could perhaps be optimized? - auto PF = _Xor(OpSize::i32Bit, HostFlag_Unordered, _Constant(1)); - SetRFLAG(PF); - } - - if (poptwice) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } -} - -void OpDispatchBuilder::FXCH(OpcodeArgs) { - auto top = GetX87Top(); - Ref arg; - - auto mask = _Constant(7); - - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - auto b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - - // Set C1 to Zero - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(b, top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(a, arg, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FST(OpcodeArgs) { - auto top = GetX87Top(); - auto mask = _Constant(7); - - // Implicit arg - auto offset = _Constant(Op->OP & 7); - Ref arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - // Write to ST[i] - _StoreContextIndexed(a, arg, 16, MMBaseOffset(), 16, FPRClass); - - // Set Tag for ST[i] - SetX87ValidTag(arg, true); - - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), _Constant(7)); - SetX87Top(top); - } -} - -void OpDispatchBuilder::X87UnaryOp(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F80Round(a)); - - if (IROp == IR::OP_F80SIN || IROp == IR::OP_F80COS) { - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87BinaryOp(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - - auto mask = _Constant(7); - Ref st1 = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - st1 = _LoadContextIndexed(st1, 16, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F80Add(a, st1)); - - if (IROp == IR::OP_F80FPREM || IROp == IR::OP_F80FPREM1) { - // TODO: Set C0 to Q2, C3 to Q1, C1 to Q0 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87ModifySTP(OpcodeArgs, bool Inc) { - auto orig_top = GetX87Top(); - if (Inc) { - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - } else { - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + // We have one memory argument + Ref Arg {}; + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + Arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTToInt(Arg, Width / 8); + } else { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTTo(Arg, Width / 8); + } } -} -void OpDispatchBuilder::X87SinCos(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); + // top of stack is at offset zero + _F80AddValue(0, Arg); +} - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); +void OpDispatchBuilder::FMUL(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto offset = Op->OP & 7; + auto st0 = 0; + if (ResInST0 == OpResult::RES_STI) { + _F80MulStack(offset, st0); + } else { + _F80MulStack(st0, offset); + } + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } - auto sin = _F80SIN(a); - auto cos = _F80COS(a); + // We have one memory argument + Ref arg {}; + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTToInt(arg, Width / 8); + } else { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTTo(arg, Width / 8); + } + } - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); + // top of stack is at offset zero + _F80MulValue(0, arg); - // Write to ST[TOP] - _StoreContextIndexed(sin, orig_top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(cos, top, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } } -void OpDispatchBuilder::X87FYL2X(OpcodeArgs) { - bool Plus1 = Op->OP == 0x01F9; // FYL2XP +void OpDispatchBuilder::FDIV(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto Offset = Op->OP & 7; + const auto St0 = 0; + const auto Result = (ResInST0 == OpResult::RES_STI) ? Offset : St0; - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + if (Reverse ^ (ResInST0 == OpResult::RES_STI)) { + _F80DivStack(Result, Offset, St0); + } else { + _F80DivStack(Result, St0, Offset); + } - Ref st0 = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } - if (Plus1) { - Ref data = LoadAndCacheNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); - st0 = _F80Add(st0, data); + // We have one memory argument + Ref arg {}; + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTToInt(arg, Width / 8); + } else { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _F80CVTTo(arg, Width / 8); + } } - auto result = _F80FYL2X(st0, st1); + // top of stack is at offset zero + if (Reverse) { + _F80DivRValue(arg, 0); + } else { + _F80DivValue(0, arg); + } - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } } -void OpDispatchBuilder::X87TAN(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); +void OpDispatchBuilder::FSUB(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto Offset = Op->OP & 7; + const auto St0 = 0; + const auto Result = (ResInST0 == OpResult::RES_STI) ? Offset : St0; - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); + if (Reverse ^ (ResInST0 == OpResult::RES_STI)) { + _F80SubStack(Result, Offset, St0); + } else { + _F80SubStack(Result, St0, Offset); + } - auto result = _F80TAN(a); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } - Ref data = LoadAndCacheNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); + // We have one memory argument + Ref Arg {}; + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + Arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTToInt(Arg, Width / 8); + } else { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + Arg = _F80CVTTo(Arg, Width / 8); + } + } - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); + // top of stack is at offset zero + if (Reverse) { + _F80SubRValue(Arg, 0); + } else { + _F80SubValue(0, Arg); + } - // Write to ST[TOP] - _StoreContextIndexed(result, orig_top, 16, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(data, top, 16, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } } -void OpDispatchBuilder::X87ATAN(OpcodeArgs) { - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 16, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); +Ref OpDispatchBuilder::GetX87FTW_Helper() { + Ref FTW = _Constant(0); - auto result = _F80ATAN(st1, a); + for (int i = 0; i < 8; i++) { + auto* const RegTag = GetX87Tag(_Constant(i), LoadContext(AbridgedFTWIndex)); + FTW = _Orlshl(OpSize::i32Bit, FTW, RegTag, i * 2); + } - // Write to ST[TOP] - _StoreContextIndexed(result, top, 16, MMBaseOffset(), 16, FPRClass); + return FTW; } -void OpDispatchBuilder::X87LDENV(OpcodeArgs) { - const auto Size = GetSrcSize(Op); - Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); - - auto NewFCW = _LoadMem(GPRClass, 2, Mem, 2); - _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); - - auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - ReconstructX87StateFromFSW(NewFSW); +void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { - { - // FTW - SetX87FTW(_LoadMem(GPRClass, Size, Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1)); - } -} -void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { // 14 bytes for 16bit // 2 Bytes : FCW // 2 Bytes : FSW @@ -834,26 +340,30 @@ void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { // 4 bytes : FSW // 4 bytes : FTW // 4 bytes : Instruction pointer - // 2 bytes : instruction pointer selector + // 2 bytes : Instruction pointer selector // 2 bytes : Opcode // 4 bytes : data pointer offset // 4 bytes : data pointer selector - const auto Size = GetDstSize(Op); - Ref Mem = MakeSegmentAddress(Op, Op->Dest); + // Before we store anything we need to sync our stack to the registers. + _SyncStackToSlow(); + + auto Size = GetDstSize(Op); + Ref Mem = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.LoadData = false}); + Mem = AppendSegmentOffset(Mem, Op->Flags); { auto FCW = _LoadContext(2, GPRClass, offsetof(FEXCore::Core::CPUState, FCW)); _StoreMem(GPRClass, Size, Mem, FCW, Size); } - { _StoreMem(GPRClass, Size, ReconstructFSW(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, Size, ReconstructFSW_Helper(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } auto ZeroConst = _Constant(0); { // FTW - _StoreMem(GPRClass, Size, GetX87FTW(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, Size, GetX87FTW_Helper(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); } { @@ -877,27 +387,45 @@ void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { } } -void OpDispatchBuilder::X87FLDCW(OpcodeArgs) { - Ref NewFCW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); -} +Ref OpDispatchBuilder::ReconstructX87StateFromFSW_Helper(Ref FSW) { + auto Top = _Bfe(OpSize::i32Bit, 3, 11, FSW); + SetX87Top(Top); -void OpDispatchBuilder::X87FSTCW(OpcodeArgs) { - auto FCW = _LoadContext(2, GPRClass, offsetof(FEXCore::Core::CPUState, FCW)); + auto C0 = _Bfe(OpSize::i32Bit, 1, 8, FSW); + auto C1 = _Bfe(OpSize::i32Bit, 1, 9, FSW); + auto C2 = _Bfe(OpSize::i32Bit, 1, 10, FSW); + auto C3 = _Bfe(OpSize::i32Bit, 1, 14, FSW); - StoreResult(GPRClass, Op, FCW, -1); + SetRFLAG(C0); + SetRFLAG(C1); + SetRFLAG(C2); + SetRFLAG(C3); + return Top; } -void OpDispatchBuilder::X87LDSW(OpcodeArgs) { - Ref NewFSW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - ReconstructX87StateFromFSW(NewFSW); -} +void OpDispatchBuilder::X87LDENV(OpcodeArgs) { + _StackForceSlow(); -void OpDispatchBuilder::X87FNSTSW(OpcodeArgs) { - StoreResult(GPRClass, Op, ReconstructFSW(), -1); + auto Size = GetSrcSize(Op); + Ref Mem = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.LoadData = false}); + Mem = AppendSegmentOffset(Mem, Op->Flags); + + auto NewFCW = _LoadMem(GPRClass, 2, Mem, 2); + _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); + + Ref MemLocation = _Add(OpSize::i64Bit, Mem, _Constant(Size * 1)); + auto NewFSW = _LoadMem(GPRClass, Size, MemLocation, Size); + ReconstructX87StateFromFSW_Helper(NewFSW); + + { + // FTW + Ref MemLocation = _Add(OpSize::i64Bit, Mem, _Constant(Size * 2)); + SetX87FTW(_LoadMem(GPRClass, Size, MemLocation, Size)); + } } void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { + _SyncStackToSlow(); // 14 bytes for 16bit // 2 Bytes : FCW // 2 Bytes : FSW @@ -925,13 +453,13 @@ void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { _StoreMem(GPRClass, Size, Mem, FCW, Size); } - { _StoreMem(GPRClass, Size, ReconstructFSW(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, Size, ReconstructFSW_Helper(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } auto ZeroConst = _Constant(0); { // FTW - _StoreMem(GPRClass, Size, GetX87FTW(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, Size, GetX87FTW_Helper(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); } { @@ -976,6 +504,7 @@ void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { } void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { + _StackForceSlow(); const auto Size = GetSrcSize(Op); Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); @@ -983,7 +512,7 @@ void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - auto Top = ReconstructX87StateFromFSW(NewFSW); + Ref Top = ReconstructX87StateFromFSW_Helper(NewFSW); { // FTW SetX87FTW(_LoadMem(GPRClass, Size, Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1)); @@ -1011,36 +540,202 @@ void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { // ST7 broken in to two parts // Lower 64bits [63:0] // upper 16 bits [79:64] - - Ref Reg = _LoadMem(FPRClass, 8, Mem, _Constant((Size * 7) + (10 * 7)), 1, MEM_OFFSET_SXTX, 1); - Ref RegHigh = _LoadMem(FPRClass, 2, Mem, _Constant((Size * 7) + (10 * 7) + 8), 1, MEM_OFFSET_SXTX, 1); + OrderedNode* Reg = _LoadMem(FPRClass, 8, Mem, _Constant((Size * 7) + (10 * 7)), 1, MEM_OFFSET_SXTX, 1); + OrderedNode* RegHigh = _LoadMem(FPRClass, 2, Mem, _Constant((Size * 7) + (10 * 7) + 8), 1, MEM_OFFSET_SXTX, 1); Reg = _VInsElement(16, 2, 4, 0, Reg, RegHigh); _StoreContextIndexed(Reg, Top, 16, MMBaseOffset(), 16, FPRClass); } -void OpDispatchBuilder::X87FXAM(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - Ref Result = _VExtractToGPR(16, 8, a, 1); +// Load / Store Control Word +void OpDispatchBuilder::X87FSTCW(OpcodeArgs) { + auto FCW = _LoadContext(2, GPRClass, offsetof(FEXCore::Core::CPUState, FCW)); + StoreResult(GPRClass, Op, FCW, -1); +} - // Extract the sign bit - Result = _Bfe(OpSize::i64Bit, 1, 15, Result); - SetRFLAG(Result); - // Claim this is a normal number - // We don't support anything else - auto TopValid = GetX87ValidTag(top); - auto ZeroConst = _Constant(0); - auto OneConst = _Constant(1); +void OpDispatchBuilder::X87FLDCW(OpcodeArgs) { + // FIXME: Because loading control flags will affect several instructions in fast path, we might have + // to switch for now to slow mode whenever these are manually changed. + // Remove the next line and try DF_04.asm in fast path. + _StackForceSlow(); + Ref NewFCW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); +} - // In the case of top being invalid then C3:C2:C0 is 0b101 - auto C3 = _Select(FEXCore::IR::COND_NEQ, TopValid, OneConst, OneConst, ZeroConst); - auto C2 = TopValid; - auto C0 = C3; // Mirror C3 until something other than zero is supported - SetRFLAG(C0); - SetRFLAG(C2); - SetRFLAG(C3); +void OpDispatchBuilder::FXCH(OpcodeArgs) { + uint8_t Offset = Op->OP & 7; + // fxch st0, st0 is for us essentially a nop + if (Offset != 0) { + _F80StackXchange(Offset); + } + SetRFLAG(_Constant(0)); +} + +void OpDispatchBuilder::X87FYL2X(OpcodeArgs, bool IsFYL2XP1) { + if (IsFYL2XP1) { + // create an add between top of stack and 1. + Ref One = ReducedPrecisionMode ? _VCastFromGPR(8, 8, _Constant(0x3FF0000000000000)) : + LoadAndCacheNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); + _F80AddValue(0, One); + } + + _F80FYL2XStack(); +} + +void OpDispatchBuilder::FCOMI(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::FCOMIFlags WhichFlags, bool PopTwice) { + Ref arg {}; + Ref b {}; + + Ref Res = nullptr; + if (Op->Src[0].IsNone()) { + // Implicit arg + uint8_t Offset = Op->OP & 7; + Res = _F80CmpStack(Offset); + } else { + // Memory arg + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + b = _F80CVTToInt(arg, Width / 8); + } else { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + b = _F80CVTTo(arg, Width / 8); + } + } + Res = _F80CmpValue(b); + } + + Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); + Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); + Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); + HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); + HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); + + if (WhichFlags == FCOMIFlags::FLAGS_X87) { + SetRFLAG(HostFlag_CF); + SetRFLAG(_Constant(0)); + SetRFLAG(HostFlag_Unordered); + SetRFLAG(HostFlag_ZF); + } else { + // Invalidate deferred flags early + // OF, SF, AF, PF all undefined + InvalidateDeferredFlags(); + + SetRFLAG(HostFlag_CF); + SetRFLAG(HostFlag_ZF); + + // PF is stored inverted, so invert from the host flag. + // TODO: This could perhaps be optimized? + auto PF = _Xor(OpSize::i32Bit, HostFlag_Unordered, _Constant(1)); + SetRFLAG(PF); + } + + if (PopTwice) { + _PopStackDestroy(); + _PopStackDestroy(); + } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { + _PopStackDestroy(); + } +} + +void OpDispatchBuilder::FTST(OpcodeArgs) { + Ref Res = _F80StackTest(0); + + Ref HostFlag_CF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_LT, Res); + Ref HostFlag_ZF = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_EQ, Res); + Ref HostFlag_Unordered = _Bfe(OpSize::i64Bit, 1, FCMP_FLAG_UNORDERED, Res); + HostFlag_CF = _Or(OpSize::i32Bit, HostFlag_CF, HostFlag_Unordered); + HostFlag_ZF = _Or(OpSize::i32Bit, HostFlag_ZF, HostFlag_Unordered); + + SetRFLAG(HostFlag_CF); + SetRFLAG(_Constant(0)); + SetRFLAG(HostFlag_Unordered); + SetRFLAG(HostFlag_ZF); +} + +void OpDispatchBuilder::X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool ZeroC2) { + DeriveOp(Result, IROp, _F80SCALEStack()); + if (ZeroC2) { + SetRFLAG(_Constant(0)); + } +} + +void OpDispatchBuilder::X87ModifySTP(OpcodeArgs, bool Inc) { + if (Inc) { + _IncStackTop(); + } else { + _DecStackTop(); + } +} + +// Operations dealing with loading and storing environment pieces + +// Reconstruct as a constant the Status Word of the FPU. +// We only track stack top and each of the code conditions (C flags) +// Top is 3 bits at bit 11. +// C0 is 1 bit at bit 8. +// C1 is 1 bit at bit 9. +// C2 is 1 bit at bit 10. +// C3 is 1 bit at bit 14. +// Optionally we can pass a pre calculated value for Top, otherwise we calculate it +// during the function runtime. +Ref OpDispatchBuilder::ReconstructFSW_Helper(Ref T) { + // We must construct the FSW from our various bits + auto C0 = GetRFLAG(FEXCore::X86State::X87FLAG_C0_LOC); + auto C1 = GetRFLAG(FEXCore::X86State::X87FLAG_C1_LOC); + auto C2 = GetRFLAG(FEXCore::X86State::X87FLAG_C2_LOC); + auto C3 = GetRFLAG(FEXCore::X86State::X87FLAG_C3_LOC); + + Ref FSW = _Lshl(OpSize::i64Bit, C0, _Constant(8)); + FSW = _Orlshl(OpSize::i64Bit, FSW, C1, 9); + FSW = _Orlshl(OpSize::i64Bit, FSW, C2, 10); + FSW = _Orlshl(OpSize::i64Bit, FSW, C3, 14); + + auto Top = GetX87Top(); + FSW = _Bfi(OpSize::i64Bit, 3, 11, FSW, Top); + return FSW; +} + +// Store Status Word +// There's no load Status Word instruction +void OpDispatchBuilder::X87FNSTSW(OpcodeArgs) { + + Ref TopValue = _SyncStackToSlow(); + Ref StatusWord = ReconstructFSW_Helper(TopValue); + StoreResult(GPRClass, Op, StatusWord, -1); +} + +void OpDispatchBuilder::FNINIT(OpcodeArgs) { + auto Zero = _Constant(0); + + // Init FCW to 0x037F + auto NewFCW = _Constant(16, 0x037F); + _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); + + // Set top to zero + SetX87Top(Zero); + // Tags all get marked as invalid + StoreContext(AbridgedFTWIndex, Zero); + + // Reinits the simulated stack + _InitStack(); + + SetRFLAG(Zero); + SetRFLAG(Zero); + SetRFLAG(Zero); + SetRFLAG(Zero); +} + +void OpDispatchBuilder::X87FFREE(OpcodeArgs) { + + _InvalidateStack(Op->OP & 7); +} + +void OpDispatchBuilder::X87EMMS(OpcodeArgs) { + // Tags all get set to 0b11 + + _InvalidateStack(0xff); } void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { @@ -1082,39 +777,31 @@ void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { Ref SrcCond = SelectCC(CC, OpSize::i64Bit, AllOneConst, ZeroConst); Ref VecCond = _VDupFromGPR(16, 8, SrcCond); - - auto top = GetX87Top(); - Ref arg; - - auto mask = _Constant(7); - - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - - auto a = _LoadContextIndexed(top, 16, MMBaseOffset(), 16, FPRClass); - auto b = _LoadContextIndexed(arg, 16, MMBaseOffset(), 16, FPRClass); - auto Result = _VBSL(16, VecCond, b, a); - - // Write to ST[TOP] - _StoreContextIndexed(Result, top, 16, MMBaseOffset(), 16, FPRClass); + _F80VBSLStack(16, VecCond, Op->OP & 7, 0); } -void OpDispatchBuilder::X87EMMS(OpcodeArgs) { - // Tags all get set to 0b11 - StoreContext(AbridgedFTWIndex, _Constant(0)); -} +void OpDispatchBuilder::X87FXAM(OpcodeArgs) { + auto a = _ReadStackValue(0); + Ref Result = ReducedPrecisionMode ? _VExtractToGPR(8, 8, a, 0) : _VExtractToGPR(16, 8, a, 1); -void OpDispatchBuilder::X87FFREE(OpcodeArgs) { - // Only sets the selected stack register's tag bits to EMPTY - Ref top = GetX87Top(); + // Extract the sign bit + Result = ReducedPrecisionMode ? _Bfe(OpSize::i64Bit, 1, 63, Result) : _Bfe(OpSize::i64Bit, 1, 15, Result); + SetRFLAG(Result); + + // Claim this is a normal number + // We don't support anything else + auto TopValid = _StackValidTag(0); + auto ZeroConst = _Constant(0); + auto OneConst = _Constant(1); - // Implicit arg - auto offset = _Constant(Op->OP & 7); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), _Constant(7)); + // In the case of top being invalid then C3:C2:C0 is 0b101 + auto C3 = _Select(FEXCore::IR::COND_NEQ, TopValid, OneConst, OneConst, ZeroConst); - // Set this argument's tag as empty now - SetX87ValidTag(top, false); + auto C2 = TopValid; + auto C0 = C3; // Mirror C3 until something other than zero is supported + SetRFLAG(C0); + SetRFLAG(C2); + SetRFLAG(C3); } } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp index 8993b3ccdd..db739f6d96 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp @@ -40,10 +40,13 @@ class OrderedNode; // FXCH // FCMOV // FST(register to register) +// FCHS // State loading duplicated from X87.cpp, setting host rounding mode // See issue void OpDispatchBuilder::FNINITF64(OpcodeArgs) { + // FIXME: almost a duplicate of x87 version. + // Init FCW to 0x037F auto NewFCW = _Constant(16, 0x037F); // Init host rounding mode to zero @@ -53,17 +56,20 @@ void OpDispatchBuilder::FNINITF64(OpcodeArgs) { // Init FSW to 0 SetX87Top(Zero); + // Tags all get marked as invalid + StoreContext(AbridgedFTWIndex, Zero); + + _InitStack(); SetRFLAG(Zero); SetRFLAG(Zero); SetRFLAG(Zero); SetRFLAG(Zero); - - // Tags all get marked as invalid - StoreContext(AbridgedFTWIndex, Zero); } void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { + _StackForceSlow(); + const auto Size = GetSrcSize(Op); Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); @@ -75,7 +81,7 @@ void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - ReconstructX87StateFromFSW(NewFSW); + ReconstructX87StateFromFSW_Helper(NewFSW); { // FTW @@ -85,6 +91,8 @@ void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { void OpDispatchBuilder::X87FLDCWF64(OpcodeArgs) { + _StackForceSlow(); + Ref NewFCW = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); // ignore the rounding precision, we're always 64-bit in F64. // extract rounding mode @@ -94,132 +102,65 @@ void OpDispatchBuilder::X87FLDCWF64(OpcodeArgs) { } // F64 ops - -void OpDispatchBuilder::FLDF64(OpcodeArgs, size_t width) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - - size_t read_width = (width == 80) ? 16 : width / 8; - - Ref data {}; - Ref converted {}; - - if (!Op->Src[0].IsNone()) { - // Read from memory - data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], read_width, Op->Flags); - // Convert to 64bit float - if (width == 32) { - converted = _Float_FToF(8, 4, data); - } else if (width == 80) { - converted = _F80CVT(8, data); - } else { - converted = data; - } - } else { - // Implicit arg (does this need to change with width?) - auto offset = _Constant(Op->OP & 7); - data = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, offset), mask); - data = _LoadContextIndexed(data, 8, MMBaseOffset(), 16, FPRClass); - converted = data; - } - - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 8, MMBaseOffset(), 16, FPRClass); +// Float load op with memory operand +void OpDispatchBuilder::FLDF64(OpcodeArgs, size_t Width) { + size_t ReadWidth = (Width == 80) ? 16 : Width / 8; + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); + // Convert to 64bit float + Ref ConvertedData = Data; + if (Width == 32) { + ConvertedData = _Float_FToF(8, 4, Data); + } else if (Width == 80) { + ConvertedData = _F80CVT(8, Data); + } + _PushStack(ConvertedData, Data, ReadWidth, true); } void OpDispatchBuilder::FBLDF64(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto mask = _Constant(7); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), mask); - SetX87ValidTag(top, true); - SetX87Top(top); - // Read from memory - Ref data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); - Ref converted = _F80BCDLoad(data); - converted = _F80CVT(8, converted); - _StoreContextIndexed(converted, top, 8, MMBaseOffset(), 16, FPRClass); + Ref Data = LoadSource_WithOpSize(FPRClass, Op, Op->Src[0], 16, Op->Flags); + Ref ConvertedData = _F80BCDLoad(Data); + ConvertedData = _F80CVT(8, ConvertedData); + _PushStack(ConvertedData, Data, 8, true); } void OpDispatchBuilder::FBSTPF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - - Ref converted = _F80CVTTo(data, 8); + Ref converted = _F80CVTTo(_ReadStackValue(0), 8); converted = _F80BCDStore(converted); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, converted, 10, 1); - - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } -void OpDispatchBuilder::FLDF64_Const(OpcodeArgs, uint64_t num) { - // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - auto data = _VCastFromGPR(8, 8, _Constant(num)); - // Write to ST[TOP] - _StoreContextIndexed(data, top, 8, MMBaseOffset(), 16, FPRClass); +void OpDispatchBuilder::FLDF64_Const(OpcodeArgs, uint64_t Num) { + auto Data = _VCastFromGPR(8, 8, _Constant(Num)); + _PushStack(Data, Data, 8, true); } void OpDispatchBuilder::FILDF64(OpcodeArgs) { - // Update TOP - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); + size_t ReadWidth = GetSrcSize(Op); - size_t read_width = GetSrcSize(Op); // Read from memory - auto data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], read_width, Op->Flags); - if (read_width == 2) { - data = _Sbfe(OpSize::i64Bit, read_width * 8, 0, data); + Ref Data = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], ReadWidth, Op->Flags); + if (ReadWidth == 2) { + Data = _Sbfe(OpSize::i64Bit, ReadWidth * 8, 0, Data); } - auto converted = _Float_FromGPR_S(8, read_width == 4 ? 4 : 8, data); - // Write to ST[TOP] - _StoreContextIndexed(converted, top, 8, MMBaseOffset(), 16, FPRClass); + auto ConvertedData = _Float_FromGPR_S(8, ReadWidth == 4 ? 4 : 8, Data); + _PushStack(ConvertedData, Data, ReadWidth, false); } -void OpDispatchBuilder::FSTF64WithWidth(OpcodeArgs, size_t width) { - auto orig_top = GetX87Top(); - auto data = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - if (width == 64) { - // Store 64-bit float directly - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, data, 8, 1); - } else if (width == 32) { - // Convert to 32-bit float and store - auto result = _Float_FToF(4, 8, data); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, result, 4, 1); - } else if (width == 80) { - // Convert to 80-bit float - auto result = _F80CVTTo(data, 8); - StoreResult_WithOpSize(FPRClass, Op, Op->Dest, result, 10, 1); - } +void OpDispatchBuilder::FSTF64(OpcodeArgs, size_t Width) { + Ref Mem = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.LoadData = false}); + _StoreStackMemory(Mem, OpSize::i64Bit, true, Width / 8); - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } } void OpDispatchBuilder::FISTF64(OpcodeArgs, bool Truncate) { auto Size = GetSrcSize(Op); - auto orig_top = GetX87Top(); - Ref data = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); + Ref data = _ReadStackValue(0); if (Truncate) { data = _Float_ToGPR_ZS(Size == 4 ? 4 : 8, 8, data); } else { @@ -228,468 +169,255 @@ void OpDispatchBuilder::FISTF64(OpcodeArgs, bool Truncate) { StoreResult_WithOpSize(GPRClass, Op, Op->Dest, data, Size, 1); if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - // Set the new top now - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); + _PopStackDestroy(); } } -void OpDispatchBuilder::FADDF64(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); - } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); +void OpDispatchBuilder::FADDF64(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto Offset = Op->OP & 7; + auto St0 = 0; if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; + _F80AddStack(Offset, St0); + } else { + _F80AddStack(St0, Offset); } - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - auto result = _VFAdd(8, 8, a, b); - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + // We have one memory argument + Ref arg {}; + + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + } + arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _Float_FToF(8, 4, arg); + } else if (Width == 64) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); } - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); + // top of stack is at offset zero + _F80AddValue(0, arg); } -void OpDispatchBuilder::FMULF64(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; - - auto mask = _Constant(7); - - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); - } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); +// FIXME: following is very similar to FADDF64 +void OpDispatchBuilder::FMULF64(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { // Implicit argument case + auto offset = Op->OP & 7; + auto st0 = 0; if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; + _F80MulStack(offset, st0); + } else { + _F80MulStack(st0, offset); } - - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _VFMul(8, 8, a, b); + // We have one memory argument + Ref arg {}; - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + } + arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _Float_FToF(8, 4, arg); + } else if (Width == 64) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); } - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); -} + // top of stack is at offset zero + _F80MulValue(0, arg); -void OpDispatchBuilder::FDIVF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } +} - auto mask = _Constant(7); +void OpDispatchBuilder::FDIVF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto offset = Op->OP & 7; + const auto st0 = 0; - if (!Op->Src[0].IsNone()) { - // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + if (Reverse) { + if (ResInST0 == OpResult::RES_STI) { + _F80DivStack(offset, st0, offset); + } else { + _F80DivStack(st0, offset, st0); + } + } else { + if (ResInST0 == OpResult::RES_STI) { + _F80DivStack(offset, offset, st0); + } else { + _F80DivStack(st0, st0, offset); } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; } - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); + // We have one memory argument + Ref Arg {}; - Ref result {}; - if (reverse) { - result = _VFDiv(8, 8, b, a); - } else { - result = _VFDiv(8, 8, a, b); + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + Arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + Arg = _Sbfe(OpSize::i64Bit, 16, 0, Arg); + } + Arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, Arg); + } else if (Width == 32) { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + Arg = _Float_FToF(8, 4, Arg); + } else if (Width == 64) { + Arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + } } - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + // top of stack is at offset zero + if (Reverse) { + _F80DivRValue(Arg, 0); + } else { + _F80DivValue(0, Arg); } - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } } -void OpDispatchBuilder::FSUBF64(OpcodeArgs, size_t width, bool Integer, bool reverse, OpDispatchBuilder::OpResult ResInST0) { - auto top = GetX87Top(); - Ref StackLocation = top; - Ref arg {}; - Ref b {}; +void OpDispatchBuilder::FSUBF64(OpcodeArgs, size_t Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { + if (Op->Src[0].IsNone()) { + const auto Offset = Op->OP & 7; + const auto St0 = 0; - auto mask = _Constant(7); + if (Reverse) { + if (ResInST0 == OpResult::RES_STI) { + _F80SubStack(Offset, St0, Offset); + } else { + _F80SubStack(St0, Offset, St0); + } + } else { + if (ResInST0 == OpResult::RES_STI) { + _F80SubStack(Offset, Offset, St0); + } else { + _F80SubStack(St0, St0, Offset); + } + } - if (!Op->Src[0].IsNone()) { - // Memory arg + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); + } + return; + } + + // We have one memory argument + Ref arg {}; + + if (Width == 16 || Width == 32 || Width == 64) { if (Integer) { arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { + if (Width == 16) { arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { + arg = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + arg = _Float_FToF(8, 4, arg); + } else if (Width == 64) { arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - if (ResInST0 == OpResult::RES_STI) { - StackLocation = arg; } - - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - Ref result {}; - if (reverse) { - result = _VFSub(8, 8, b, a); + // top of stack is at offset zero + if (Reverse) { + _F80SubRValue(arg, 0); } else { - result = _VFSub(8, 8, a, b); + _F80SubValue(0, arg); } - if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { + _PopStackDestroy(); } - - // Write to ST[TOP] - _StoreContextIndexed(result, StackLocation, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FCHSF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - auto result = _VFNeg(8, 8, a); - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FABSF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - auto result = _VFAbs(8, 8, a); - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); } void OpDispatchBuilder::FTSTF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto low = _Constant(0); - Ref data = _VCastFromGPR(8, 8, low); - // We are going to clobber NZCV, make sure it's in a GPR first. GetNZCV(); // Now we do our comparison. - _FCmp(8, a, data); + _F80StackTest(0); PossiblySetNZCVBits = ~0; ConvertNZCVToX87(); } -// TODO: This should obey rounding mode -void OpDispatchBuilder::FRNDINTF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _Vector_FToI(8, 8, a, FEXCore::IR::Round_Host); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::FXTRACTF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - auto gpr = _VExtractToGPR(8, 8, a, 0); - Ref exp = _And(OpSize::i64Bit, gpr, _Constant(0x7ff0000000000000LL)); - exp = _Lshr(OpSize::i64Bit, exp, _Constant(52)); - exp = _Sub(OpSize::i64Bit, exp, _Constant(1023)); - exp = _Float_FromGPR_S(8, 8, exp); - Ref sig = _And(OpSize::i64Bit, gpr, _Constant(0x800fffffffffffffLL)); - sig = _Or(OpSize::i64Bit, sig, _Constant(0x3ff0000000000000LL)); - sig = _VCastFromGPR(8, 8, sig); - // Write to ST[TOP] - _StoreContextIndexed(exp, orig_top, 8, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(sig, top, 8, MMBaseOffset(), 16, FPRClass); -} - - -void OpDispatchBuilder::FCOMIF64(OpcodeArgs, size_t width, bool Integer, OpDispatchBuilder::FCOMIFlags whichflags, bool poptwice) { - auto top = GetX87Top(); - auto mask = _Constant(7); - +void OpDispatchBuilder::FCOMIF64(OpcodeArgs, size_t Width, bool Integer, OpDispatchBuilder::FCOMIFlags WhichFlags, bool PopTwice) { Ref arg {}; Ref b {}; - if (!Op->Src[0].IsNone()) { + if (Op->Src[0].IsNone()) { + // Implicit arg + uint8_t offset = Op->OP & 7; + b = _ReadStackValue(offset); + } else { // Memory arg - if (Integer) { - arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if (width == 16) { - arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + if (Width == 16 || Width == 32 || Width == 64) { + if (Integer) { + arg = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); + if (Width == 16) { + arg = _Sbfe(OpSize::i64Bit, 16, 0, arg); + } + b = _Float_FromGPR_S(8, Width == 64 ? 8 : 4, arg); + } else if (Width == 32) { + arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); + b = _Float_FToF(8, 4, arg); + } else if (Width == 64) { + b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); } - b = _Float_FromGPR_S(8, width == 64 ? 8 : 4, arg); - } else if (width == 32) { - arg = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); - b = _Float_FToF(8, 4, arg); - } else if (width == 64) { - b = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags); } - } else { - // Implicit arg - auto offset = _Constant(Op->OP & 7); - arg = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, offset), mask); - b = _LoadContextIndexed(arg, 8, MMBaseOffset(), 16, FPRClass); } - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - if (whichflags == FCOMIFlags::FLAGS_X87) { + if (WhichFlags == FCOMIFlags::FLAGS_X87) { // We are going to clobber NZCV, make sure it's in a GPR first. GetNZCV(); - _FCmp(8, a, b); + _F80CmpValue(b); PossiblySetNZCVBits = ~0; ConvertNZCVToX87(); } else { - Comiss(8, a, b, true /* InvalidateAF */); + HandleNZCVWrite(); + _F80CmpValue(b); + ComissFlags(true /* InvalidateAF */); } - if (poptwice) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); + if (PopTwice) { + _PopStackDestroy(); + _PopStackDestroy(); } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { - // if we are popping then we must first mark this location as empty - SetX87ValidTag(top, false); - // Set the new top now - top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - SetX87Top(top); - } -} - -void OpDispatchBuilder::FSQRTF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _VFSqrt(8, 8, a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - - -void OpDispatchBuilder::X87UnaryOpF64(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F64SIN(a)); - - if (IROp == IR::OP_F64SIN || IROp == IR::OP_F64COS) { - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87BinaryOpF64(OpcodeArgs, FEXCore::IR::IROps IROp) { - auto top = GetX87Top(); - - auto mask = _Constant(7); - Ref st1 = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, top, _Constant(1)), mask); - - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - st1 = _LoadContextIndexed(st1, 8, MMBaseOffset(), 16, FPRClass); - - DeriveOp(result, IROp, _F64ATAN(a, st1)); - - if (IROp == IR::OP_F64FPREM || IROp == IR::OP_F64FPREM1) { - // TODO: Set C0 to Q2, C3 to Q1, C1 to Q0 - SetRFLAG(_Constant(0)); - } - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87SinCosF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - - auto sin = _F64SIN(a); - auto cos = _F64COS(a); - - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(sin, orig_top, 8, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(cos, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87FYL2XF64(OpcodeArgs) { - bool Plus1 = Op->OP == 0x01F9; // FYL2XP - - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - Ref st0 = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - if (Plus1) { - auto one = _VCastFromGPR(8, 8, _Constant(0x3FF0000000000000)); - st0 = _VFAdd(8, 8, st0, one); + _PopStackDestroy(); } - - auto result = _F64FYL2X(st0, st1); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87TANF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - auto top = _And(OpSize::i32Bit, _Sub(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87ValidTag(top, true); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _F64TAN(a); - - auto one = _VCastFromGPR(8, 8, _Constant(0x3FF0000000000000)); - - // TODO: ACCURACY: should check source is in range –2^63 to +2^63 - SetRFLAG(_Constant(0)); - - // Write to ST[TOP] - _StoreContextIndexed(result, orig_top, 8, MMBaseOffset(), 16, FPRClass); - _StoreContextIndexed(one, top, 8, MMBaseOffset(), 16, FPRClass); -} - -void OpDispatchBuilder::X87ATANF64(OpcodeArgs) { - auto orig_top = GetX87Top(); - // if we are popping then we must first mark this location as empty - SetX87ValidTag(orig_top, false); - auto top = _And(OpSize::i32Bit, _Add(OpSize::i32Bit, orig_top, _Constant(1)), _Constant(7)); - SetX87Top(top); - - auto a = _LoadContextIndexed(orig_top, 8, MMBaseOffset(), 16, FPRClass); - Ref st1 = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - - auto result = _F64ATAN(st1, a); - - // Write to ST[TOP] - _StoreContextIndexed(result, top, 8, MMBaseOffset(), 16, FPRClass); } // This function converts to F80 on save for compatibility - void OpDispatchBuilder::X87FNSAVEF64(OpcodeArgs) { + _SyncStackToSlow(); // 14 bytes for 16bit // 2 Bytes : FCW // 2 Bytes : FSW @@ -717,13 +445,13 @@ void OpDispatchBuilder::X87FNSAVEF64(OpcodeArgs) { _StoreMem(GPRClass, Size, Mem, FCW, Size); } - { _StoreMem(GPRClass, Size, ReconstructFSW(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } + { _StoreMem(GPRClass, Size, ReconstructFSW_Helper(), Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); } auto ZeroConst = _Constant(0); { // FTW - _StoreMem(GPRClass, Size, GetX87FTW(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, Size, GetX87FTW_Helper(), Mem, _Constant(Size * 2), Size, MEM_OFFSET_SXTX, 1); } { @@ -772,6 +500,7 @@ void OpDispatchBuilder::X87FNSAVEF64(OpcodeArgs) { // This function converts from F80 on load for compatibility void OpDispatchBuilder::X87FRSTORF64(OpcodeArgs) { + _StackForceSlow(); const auto Size = GetSrcSize(Op); Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); @@ -788,7 +517,7 @@ void OpDispatchBuilder::X87FRSTORF64(OpcodeArgs) { _StoreContext(2, GPRClass, NewFCW, offsetof(FEXCore::Core::CPUState, FCW)); auto NewFSW = _LoadMem(GPRClass, Size, Mem, _Constant(Size * 1), Size, MEM_OFFSET_SXTX, 1); - auto Top = ReconstructX87StateFromFSW(NewFSW); + Ref Top = ReconstructX87StateFromFSW_Helper(NewFSW); { // FTW @@ -826,32 +555,4 @@ void OpDispatchBuilder::X87FRSTORF64(OpcodeArgs) { _StoreContextIndexed(Reg, Top, 8, MMBaseOffset(), 16, FPRClass); } - -// FXAM needs change -void OpDispatchBuilder::X87FXAMF64(OpcodeArgs) { - auto top = GetX87Top(); - auto a = _LoadContextIndexed(top, 8, MMBaseOffset(), 16, FPRClass); - Ref Result = _VExtractToGPR(8, 8, a, 0); - - // Extract the sign bit - Result = _Bfe(OpSize::i64Bit, 1, 63, Result); - SetRFLAG(Result); - - // Claim this is a normal number - // We don't support anything else - auto TopValid = GetX87ValidTag(top); - auto ZeroConst = _Constant(0); - auto OneConst = _Constant(1); - - // In the case of top being invalid then C3:C2:C0 is 0b101 - auto C3 = _Select(FEXCore::IR::COND_EQ, TopValid, OneConst, ZeroConst, OneConst); - - auto C2 = TopValid; - auto C0 = C3; // Mirror C3 until something other than zero is supported - SetRFLAG(C0); - SetRFLAG(C2); - SetRFLAG(C3); -} - - } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/IR/PassManager.cpp b/FEXCore/Source/Interface/IR/PassManager.cpp index e93e04cd84..6f5170e6b5 100644 --- a/FEXCore/Source/Interface/IR/PassManager.cpp +++ b/FEXCore/Source/Interface/IR/PassManager.cpp @@ -70,6 +70,7 @@ void PassManager::AddDefaultPasses(FEXCore::Context::ContextImpl* ctx) { FEX_CONFIG_OPT(DisablePasses, O0); if (!DisablePasses()) { + InsertPass(CreateX87StackOptimizationPass()); InsertPass(CreateDeadStoreElimination()); InsertPass(CreateConstProp(ctx->HostFeatures.SupportsTSOImm9, &ctx->CPUID)); InsertPass(CreateDeadFlagCalculationEliminination()); diff --git a/FEXCore/Source/Interface/IR/Passes.h b/FEXCore/Source/Interface/IR/Passes.h index 8c18ff2bda..3b377dc6fa 100644 --- a/FEXCore/Source/Interface/IR/Passes.h +++ b/FEXCore/Source/Interface/IR/Passes.h @@ -20,6 +20,7 @@ fextl::unique_ptr CreateConstProp(bool SupportsTSOImm9, const fextl::unique_ptr CreateDeadFlagCalculationEliminination(); fextl::unique_ptr CreateDeadStoreElimination(); fextl::unique_ptr CreateRegisterAllocationPass(); +fextl::unique_ptr CreateX87StackOptimizationPass(); namespace Validation { fextl::unique_ptr CreateIRValidation(); diff --git a/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp b/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp new file mode 100644 index 0000000000..7111af2858 --- /dev/null +++ b/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp @@ -0,0 +1,1069 @@ +#include "FEXCore/Utils/LogManager.h" +#include "Interface/Core/Interpreter/Fallbacks/FallbackOpHandler.h" +#include "Interface/IR/IR.h" +#include "Interface/IR/IREmitter.h" +#include "Interface/IR/PassManager.h" +#include +#include +#include + +#include +#include +#include +#include + +// This file adds a pass to process X87 stack instructions. +// These instructions are marked in IR.json with `X87: true` and are generated +// by X87 guest instructions. +// The way is works is that there's a virtual stack `StackData`, where we load and store +// and apply the operations in a block of code. Once the block finishes, we emit the necessary operations +// that we recorded onto the virtual stack. This allows us to save a lot of code movement +// to and from stack registers, top management and valid flags. It also allows us to +// perform memcpy optimizations like the one performed in STORESTACKMEMORY. +// +// By default we run on the fast path - i.e. we assume all values are in the stack and we have a complete +// stack overview. However, if we encounter a value that's not in the virtual stack - maybe it was added +// to the stack in a previous block, we move onto the slow path which loads and stores values to the stack +// registers. +// Once in a slow path, we won't return to the fast pass until the beginning of the following block. + +namespace FEXCore::IR { + +// FIXME(pmatos): copy from OpcodeDispatcher.h +inline uint32_t MMBaseOffset() { + return static_cast(offsetof(Core::CPUState, mm[0][0])); +} + +// Similar helper to the one in OpcodeDispatcher.h except we do not +// need to handle flags, etc. +template +void DeriveOp(Ref& RefV, IROps NewOp, IREmitter::IRPair Expr) { + Expr.first->Header.Op = NewOp; + RefV = Expr; +} + +enum class StackSlot { UNUSED, INVALID, VALID }; +// FixedSizeStack is a model of the x87 Stack where each element in this +// fixed size stack lives at an offset from top. The top of the stack is at +// index 0. +template +class FixedSizeStack { +public: + static constexpr uint8_t size = 8; + + // Real top as an offset from stored top value (or the one at the beginning of the block) + // For example, if we start and push a value to our simulated stack, because we don't + // update top straight away the TopOffset is 1. + // If SlowPath is true, then TopOffset is always zero. + int8_t TopOffset = 0; + + FixedSizeStack() + : buffer(FixedSizeStack::size, {StackSlot::UNUSED, T()}) {} + + void push(const T& Value) { + rotate(); + buffer.front() = {StackSlot::VALID, Value}; + } + + // Rotate the elements with the direction controlled by Right + void rotate(bool Right = true) { + if (Right) { + std::rotate(buffer.begin(), buffer.end() - 1, buffer.end()); + TopOffset++; + } else { + std::rotate(buffer.begin(), buffer.begin() + 1, buffer.end()); + TopOffset--; + } + } + + void pop() { + buffer.front() = {StackSlot::INVALID, T()}; + rotate(false); + } + + const std::pair& top(size_t Offset = 0) const { + return buffer[Offset]; + } + + void setTop(T Value, size_t Offset = 0) { + buffer[Offset] = {StackSlot::VALID, Value}; + } + + bool isValid(size_t Offset) const { + return buffer[Offset].first; + } + + void clear() { + for (auto& Elem : buffer) { + Elem = {StackSlot::UNUSED, T()}; + } + TopOffset = 0; + } + + void dump() const { + LogMan::Msg::DFmt("-- Stack"); + + for (size_t i = 0; i < 8; i++) { + const auto& [Valid, Element] = buffer[i]; + if (Valid == StackSlot::VALID) { + LogMan::Msg::DFmt("| ST{}: 0x{:x}", i, (uintptr_t)(Element.StackDataNode)); + } else if (Valid == StackSlot::INVALID) { + LogMan::Msg::DFmt("| ST{}: INVALID", i); + } + } + LogMan::Msg::DFmt("--"); + } + + void setTagInvalid(size_t Index) { + buffer[Index].first = StackSlot::INVALID; + } + + // Returns a mask to set in AbridgedTagWord + uint8_t getValidMask() { + uint8_t Mask = 0; + for (size_t i = 0; i < buffer.size(); i++) { + if (buffer[i].first == StackSlot::VALID) { + Mask |= 1U << i; + } + } + return Mask; + } + + // Returns a mask to set in AbridgedTagWord + uint8_t getInvalidMask() { + uint8_t Mask = 0; + for (size_t i = 0; i < buffer.size(); i++) { + if (buffer[i].first == StackSlot::INVALID) { + Mask |= 1U << i; + } + } + return Mask; + } + +private: + fextl::vector> buffer; +}; + +class X87StackOptimization final : public Pass { +public: + X87StackOptimization() { + FEX_CONFIG_OPT(ReducedPrecision, X87REDUCEDPRECISION); + ReducedPrecisionMode = ReducedPrecision; + } + void Run(IREmitter* Emit) override; + +private: + bool ReducedPrecisionMode; + + // Helpers + std::tuple SplitF64SigExp(Ref Node); + Ref RotateRight8(uint32_t V, Ref Amount); + + // Handles a Unary operation. + // Takes the op we are handling, the Node for the reduced precision case and the node for the normal case. + // Depending on the type of Op64, we might need to pass a couple of extra constant arguments, this happens + // when VFOp64 is true. + void HandleUnop(IROps Op64, bool VFOp64, IROps Op80); + void HandleBinopValue(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, bool MarkDestValid, uint8_t StackOffset, + Ref ValueNode, bool Reverse = false); + void HandleBinopStack(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, uint8_t StackOffset1, uint8_t StackOffset2, + bool Reverse = false); + + // Top Management Helpers + /// Set the valid tag for Value as valid (if Valid is true), or invalid (if Valid is false). + void SetX87ValidTag(Ref Value, bool Valid); + // Generates slow code to load/store a value from an offset from the top of the stack + Ref LoadStackValueAtOffset_Slow(uint8_t Offset = 0); + void StoreStackValueAtOffset_Slow(Ref Value, uint8_t Offset = 0, bool SetValid = true); + // Update Top value in slow path for a pop + void UpdateTopForPop_Slow(); + void UpdateTopForPush_Slow(); + // Synchronizes the current simulated stack with the actual values. + // Returns a new value for Top, that's synchronized between the simulated stack + // and the actual FPU stack. + Ref SynchronizeStackValues(); + // Moves us from the fast to the slow path if ShouldMigrate is true. + void MigrateToSlowPathIf(bool ShouldMigrate); + // Top Cache Management + Ref GetTopWithCache_Slow(); + Ref GetOffsetTopWithCache_Slow(uint8_t Offset); + void SetTopWithCache_Slow(Ref Value); + Ref GetX87ValidTag_Slow(uint8_t Offset); + // Resets fields to initial values + void Reset(bool AlsoSlowPath = true); + + struct StackMemberInfo { + StackMemberInfo() {} + StackMemberInfo(Ref Data) + : StackDataNode(Data) + , Source(std::nullopt) + , InterpretAsFloat(false) {} + StackMemberInfo(Ref Data, Ref Source, OpSize Size, bool Float) + : StackDataNode(Data) + , Source({Size, Source}) + , InterpretAsFloat(Float) {} + Ref StackDataNode; // Reference to the data in the Stack. + // This is the source data node in the stack format, possibly converted to 64/80 bits. + // Tuple is only valid if we have information about the Source of the Stack Data Node. + // In it's valid then OpSize is the original source size and Ref is the original source node. + std::optional> Source; + bool InterpretAsFloat; // True if this is a floating point value, false if integer + }; + + // StackData, TopCache need to be always properly set to ensure + // they reflect the current state of the FPU. This sync only makes sense while + // taking the fast path. Once in the slow path, these don't make sense anymore + // and we are syncing everything. + + // Index on vector is offset to top value at start of block + // If slow path is true, then StackData is always empty. + FixedSizeStack StackData; + + void InvalidateCaches(); + void InvalidateTopOffsetCache(); + + // Path Migration helper management + std::optional MigrateToSlowPath_IfInvalid(uint8_t Offset = 0); + Ref LoadStackValue(uint8_t Offset = 0); + void StoreStackValue(Ref Value, uint8_t Offset = 0, bool SetValid = false); + void StackPop(); + + // Cache for Constants + // ConstantPoll[i] has IREmit->_Constant(i); + std::array ConstantPool; + Ref GetConstant(ssize_t Offset); + + // Cached value for Top + // If slowpath is false, then TopCache is nullptr. + std::array TopOffsetCache; + // Are we on the slow path? + // Once we enter the slow path, we never come out. + // This just simplifies the code atm. If there's a need to return to the fast path in the future + // we can implement that but I would expect that there would be very few cases where that's necessary. + // On the slow path TopCache is always the last obtained version of top. + // TopOffset is ignored + bool SlowPath = false; + // Keeping IREmitter not to pass arguments around + IREmitter* IREmit = nullptr; +}; + +inline void X87StackOptimization::InvalidateCaches() { + InvalidateTopOffsetCache(); + ConstantPool.fill(nullptr); +} + +inline void X87StackOptimization::InvalidateTopOffsetCache() { + TopOffsetCache.fill(nullptr); +} + +inline void X87StackOptimization::Reset(bool AlsoSlowPath) { + if (AlsoSlowPath) { + SlowPath = false; + } + StackData.clear(); + InvalidateCaches(); +} + +inline Ref X87StackOptimization::GetConstant(ssize_t Offset) { + if (Offset < 0 || Offset >= X87StackOptimization::ConstantPool.size()) { + // not dealt by pool + return IREmit->_Constant(Offset); + } + if (ConstantPool[Offset] == nullptr) { + + ConstantPool[Offset] = IREmit->_Constant(Offset); + } + return ConstantPool[Offset]; +} + +inline void X87StackOptimization::MigrateToSlowPathIf(bool ShouldMigrate) { + if (ShouldMigrate && !SlowPath) { + SynchronizeStackValues(); + Reset(false); // Reset everything but no need to change slowpath + SlowPath = true; + } +} + +inline Ref X87StackOptimization::GetTopWithCache_Slow() { + if (!TopOffsetCache[0]) { + TopOffsetCache[0] = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); + } + return TopOffsetCache[0]; +} + +inline Ref X87StackOptimization::GetOffsetTopWithCache_Slow(uint8_t Offset) { + if (TopOffsetCache[Offset]) { + return TopOffsetCache[Offset]; + } + + auto* OffsetTop = GetTopWithCache_Slow(); + if (Offset != 0) { + OffsetTop = IREmit->_And(OpSize::i32Bit, IREmit->_Add(OpSize::i32Bit, OffsetTop, GetConstant(Offset)), GetConstant(7)); + // GetTopWithCache_Slow already sets the cache so we don't need to set it here for offset == 0 + TopOffsetCache[Offset] = OffsetTop; + } + + return OffsetTop; +} + + +inline void X87StackOptimization::SetTopWithCache_Slow(Ref Value) { + IREmit->_StoreContext(1, GPRClass, Value, offsetof(FEXCore::Core::CPUState, flags) + FEXCore::X86State::X87FLAG_TOP_LOC); + InvalidateTopOffsetCache(); + TopOffsetCache[0] = Value; +} + +inline void X87StackOptimization::SetX87ValidTag(Ref Value, bool Valid) { + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref RegMask = IREmit->_Lshl(OpSize::i32Bit, GetConstant(1), Value); + Ref NewAbridgedFTW = Valid ? IREmit->_Or(OpSize::i32Bit, AbridgedFTW, RegMask) : IREmit->_Andn(OpSize::i32Bit, AbridgedFTW, RegMask); + IREmit->_StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); +} + +inline Ref X87StackOptimization::GetX87ValidTag_Slow(uint8_t Offset) { + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + return IREmit->_And(OpSize::i32Bit, IREmit->_Lshr(OpSize::i32Bit, AbridgedFTW, GetOffsetTopWithCache_Slow(Offset)), GetConstant(1)); +} + +inline Ref X87StackOptimization::LoadStackValueAtOffset_Slow(uint8_t Offset) { + return IREmit->_LoadContextIndexed(GetOffsetTopWithCache_Slow(Offset), ReducedPrecisionMode ? 8 : 16, MMBaseOffset(), 16, FPRClass); +} + +inline void X87StackOptimization::StoreStackValueAtOffset_Slow(Ref Value, uint8_t Offset, bool SetValid) { + OrderedNode* TopOffset = GetOffsetTopWithCache_Slow(Offset); + // store + IREmit->_StoreContextIndexed(Value, TopOffset, ReducedPrecisionMode ? 8 : 16, MMBaseOffset(), 16, FPRClass); + // mark it valid + // In some cases we might already know it has been previously set as valid so we don't need to do it again + if (SetValid) { + SetX87ValidTag(TopOffset, true); + } +} + +inline Ref X87StackOptimization::RotateRight8(uint32_t V, Ref Amount) { + return IREmit->_Lshr(OpSize::i32Bit, GetConstant(V | (V << 8)), Amount); +} + +inline std::optional X87StackOptimization::MigrateToSlowPath_IfInvalid(uint8_t Offset) { + const auto& [Valid, StackMember] = StackData.top(Offset); + MigrateToSlowPathIf(Valid != StackSlot::VALID); + if (Valid == StackSlot::VALID) { + return StackMember; + } + return {}; +} + +inline Ref X87StackOptimization::LoadStackValue(uint8_t Offset) { + const auto& StackValue = MigrateToSlowPath_IfInvalid(Offset); + return SlowPath ? LoadStackValueAtOffset_Slow(Offset) : StackValue->StackDataNode; +} + +inline void X87StackOptimization::StoreStackValue(Ref Value, uint8_t Offset, bool SetValid) { + if (SlowPath) { + StoreStackValueAtOffset_Slow(Value, Offset, SetValid); + } else { + StackData.setTop(StackMemberInfo {Value}, Offset); + } +} + +inline void X87StackOptimization::StackPop() { + if (SlowPath) { + UpdateTopForPop_Slow(); + } else { + StackData.pop(); + } +} + + +void X87StackOptimization::HandleUnop(IROps Op64, bool VFOp64, IROps Op80) { + Ref St0 = LoadStackValue(); + Ref Value {}; + + if (ReducedPrecisionMode) { + if (VFOp64) { + DeriveOp(Value, Op64, IREmit->_VFSqrt(8, 8, St0)); + } else { + DeriveOp(Value, Op64, IREmit->_F64SIN(St0)); + } + } else { + DeriveOp(Value, Op80, IREmit->_F80SQRT(St0)); + } + + StoreStackValue(Value); +} + + +void X87StackOptimization::HandleBinopValue(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, bool MarkDestValid, + uint8_t StackOffset, Ref ValueNode, bool Reverse) { + LOGMAN_THROW_A_FMT(!Reverse || VFOp64, "There are no reverse operations using non VFOp64 ops"); + auto StackNode = LoadStackValue(StackOffset); + + Ref Node = {}; + if (ReducedPrecisionMode) { + if (Reverse) { + DeriveOp(Node, Op64, IREmit->_VFAdd(8, 8, ValueNode, StackNode)); + } else { + if (VFOp64) { + DeriveOp(Node, Op64, IREmit->_VFAdd(8, 8, StackNode, ValueNode)); + } else { + DeriveOp(Node, Op64, IREmit->_F64FPREM(StackNode, ValueNode)); + } + } + } else { + if (Reverse) { + DeriveOp(Node, Op80, IREmit->_F80Add(ValueNode, StackNode)); + } else { + DeriveOp(Node, Op80, IREmit->_F80Add(StackNode, ValueNode)); + } + } + + StoreStackValue(Node, DestStackOffset, MarkDestValid && StackOffset != DestStackOffset); +} + +void X87StackOptimization::HandleBinopStack(IROps Op64, bool VFOp64, IROps Op80, uint8_t DestStackOffset, uint8_t StackOffset1, + uint8_t StackOffset2, bool Reverse) { + auto StackNode = LoadStackValue(StackOffset2); + HandleBinopValue(Op64, VFOp64, Op80, DestStackOffset, StackOffset2 != DestStackOffset, StackOffset1, StackNode, Reverse); +} + +inline void X87StackOptimization::UpdateTopForPop_Slow() { + // Pop the top of the x87 stack + auto* TopOffset = GetTopWithCache_Slow(); + TopOffset = IREmit->_Add(OpSize::i32Bit, TopOffset, GetConstant(1)); + TopOffset = IREmit->_And(OpSize::i32Bit, TopOffset, GetConstant(7)); + SetTopWithCache_Slow(TopOffset); +} + +inline void X87StackOptimization::UpdateTopForPush_Slow() { + // Pop the top of the x87 stack + auto* TopOffset = GetTopWithCache_Slow(); + TopOffset = IREmit->_Sub(OpSize::i32Bit, TopOffset, GetConstant(1)); + TopOffset = IREmit->_And(OpSize::i32Bit, TopOffset, GetConstant(7)); + SetTopWithCache_Slow(TopOffset); +} + +// We synchronize stack values in a few occasions but one of the most important of those, +// is when we move from fast to a slow path and need to make sure that the context is properly +// written. +Ref X87StackOptimization::SynchronizeStackValues() { + if (SlowPath) { // Nothing to do here. + return GetTopWithCache_Slow(); + } + + // Store new top which is now the original top minus recorded top offset + // Careful with underflow wraparound. + const auto TopOffset = StackData.TopOffset; + + if (TopOffset != 0) { + auto* OrigTop = GetTopWithCache_Slow(); + Ref NewTop {}; + if (TopOffset > 0) { + NewTop = IREmit->_And(OpSize::i32Bit, IREmit->_Sub(OpSize::i32Bit, OrigTop, GetConstant(TopOffset)), GetConstant(0x7)); + } else { + NewTop = IREmit->_And(OpSize::i32Bit, IREmit->_Add(OpSize::i32Bit, OrigTop, GetConstant(-TopOffset)), GetConstant(0x7)); + } + SetTopWithCache_Slow(NewTop); + } + StackData.TopOffset = 0; + + // Before leaving we need to write the current values in the stack to + // context so that the values are correct. Copy SourceDataNode in the + // stack to the respective mmX register. + Ref TopValue = GetTopWithCache_Slow(); + for (size_t i = 0; i < StackData.size; ++i) { + const auto& [Valid, StackMember] = StackData.top(i); + + if (Valid == StackSlot::UNUSED) { + continue; + } + Ref TopIndex = GetOffsetTopWithCache_Slow(i); + if (Valid == StackSlot::VALID) { + IREmit->_StoreContextIndexed(StackMember.StackDataNode, TopIndex, ReducedPrecisionMode ? 8 : 16, MMBaseOffset(), 16, FPRClass); + } + } + { // Set valid tags + uint8_t Mask = StackData.getValidMask(); + if (Mask == 0xff) { + IREmit->_StoreContext(1, GPRClass, GetConstant(Mask), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } else if (Mask != 0) { + if (std::popcount(Mask) == 1) { + uint8_t BitIdx = __builtin_ctz(Mask); + SetX87ValidTag(GetOffsetTopWithCache_Slow(BitIdx), true); + } else { + // perform a rotate right on mask by top + auto* TopValue = GetTopWithCache_Slow(); + Ref RotAmount = IREmit->_Sub(OpSize::i32Bit, GetConstant(8), TopValue); + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref NewAbridgedFTW = IREmit->_Or(OpSize::i32Bit, AbridgedFTW, RotateRight8(Mask, RotAmount)); + IREmit->_StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } + } + } + { // Set invalid tags + uint8_t Mask = StackData.getInvalidMask(); + if (Mask == 0xff) { + IREmit->_StoreContext(1, GPRClass, GetConstant(0), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } else if (Mask != 0) { + if (std::popcount(Mask)) { + uint8_t BitIdx = __builtin_ctz(Mask); + SetX87ValidTag(GetOffsetTopWithCache_Slow(BitIdx), false); + } else { + // Same rotate right as above but this time on the invalid mask + auto* TopValue = GetTopWithCache_Slow(); + Ref RotAmount = IREmit->_Sub(OpSize::i32Bit, GetConstant(8), TopValue); + Ref AbridgedFTW = IREmit->_LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref NewAbridgedFTW = IREmit->_Andn(OpSize::i32Bit, AbridgedFTW, RotateRight8(Mask, RotAmount)); + IREmit->_StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } + } + } + return TopValue; +} + +std::tuple X87StackOptimization::SplitF64SigExp(Ref Node) { + Ref Gpr = IREmit->_VExtractToGPR(8, 8, Node, 0); + + Ref Exp = IREmit->_And(OpSize::i64Bit, Gpr, GetConstant(0x7ff0000000000000LL)); + Exp = IREmit->_Lshr(OpSize::i64Bit, Exp, GetConstant(52)); + Exp = IREmit->_Sub(OpSize::i64Bit, Exp, GetConstant(1023)); + Exp = IREmit->_Float_FromGPR_S(8, 8, Exp); + Ref Sig = IREmit->_And(OpSize::i64Bit, Gpr, GetConstant(0x800fffffffffffffLL)); + Sig = IREmit->_Or(OpSize::i64Bit, Sig, GetConstant(0x3ff0000000000000LL)); + Sig = IREmit->_VCastFromGPR(8, 8, Sig); + + return std::tuple {Exp, Sig}; +} + +void X87StackOptimization::Run(IREmitter* Emit) { + FEXCORE_PROFILE_SCOPED("PassManager::x87StackOpt"); + + auto CurrentIR = Emit->ViewIR(); + auto* HeaderOp = CurrentIR.GetHeader(); + LOGMAN_THROW_AA_FMT(HeaderOp->Header.Op == OP_IRHEADER, "First op wasn't IRHeader"); + + if (!HeaderOp->HasX87) { + // If there is no x87 in this, just early exit. + return; + } + + // Initialize IREmit member + IREmit = Emit; + + // Run optimization proper + for (auto [BlockNode, BlockHeader] : CurrentIR.GetBlocks()) { + auto BlockIROp = BlockHeader->CW(); + // Each time we deal with a new block we need to start over. + // The optimization should run per-block + Reset(); + + for (auto [CodeNode, IROp] : CurrentIR.GetCode(BlockNode)) { + if (!LoweredX87(IROp->Op)) { + continue; + } + IREmit->SetWriteCursor(CodeNode); + switch (IROp->Op) { + case OP_F80ADDSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFADD, true, OP_F80ADD, Op->SrcStack1, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80SUBSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFSUB, true, OP_F80SUB, Op->DstStack, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80MULSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFMUL, true, OP_F80MUL, Op->SrcStack1, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80DIVSTACK: { + const auto* Op = IROp->C(); + HandleBinopStack(OP_VFDIV, true, OP_F80DIV, Op->DstStack, Op->SrcStack1, Op->SrcStack2); + break; + } + + case OP_F80FPREMSTACK: { + HandleBinopStack(OP_F64FPREM, false, OP_F80FPREM, 0, 0, 1); + break; + } + + case OP_F80FPREM1STACK: { + HandleBinopStack(OP_F64FPREM1, false, OP_F80FPREM1, 0, 0, 1); + break; + } + + case OP_F80SCALESTACK: { + HandleBinopStack(OP_F64SCALE, false, OP_F80SCALE, 0, 0, 1); + break; + } + + case OP_F80FYL2XSTACK: { + HandleBinopStack(OP_F64FYL2X, false, OP_F80FYL2X, 1, 0, 1); + StackPop(); + break; + } + + case OP_F80ATANSTACK: { + HandleBinopStack(OP_F64ATAN, false, OP_F80ATAN, 1, 1, 0); + StackPop(); + break; + } + + case OP_F80ADDVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFADD, true, OP_F80ADD, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src)); + break; + } + + case OP_F80SUBRVALUE: + case OP_F80SUBVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFSUB, true, OP_F80SUB, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src), IROp->Op == OP_F80SUBRVALUE); + break; + } + + case OP_F80DIVRVALUE: + case OP_F80DIVVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFDIV, true, OP_F80DIV, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src), IROp->Op == OP_F80DIVRVALUE); + break; + } + + case OP_F80MULVALUE: { + const auto* Op = IROp->C(); + HandleBinopValue(OP_VFMUL, true, OP_F80MUL, 0, true, Op->SrcStack, CurrentIR.GetNode(Op->X80Src)); + break; + } + + case OP_F80SQRTSTACK: { + HandleUnop(OP_VFSQRT, true, OP_F80SQRT); + break; + } + + case OP_F80SINSTACK: { + HandleUnop(OP_F64SIN, false, OP_F80SIN); + + break; + } + + case OP_F80COSSTACK: { + HandleUnop(OP_F64COS, false, OP_F80COS); + break; + } + + case OP_F80F2XM1STACK: { + HandleUnop(OP_F64F2XM1, false, OP_F80F2XM1); + break; + } + + + case OP_F80PTANSTACK: { + HandleUnop(OP_F64TAN, false, OP_F80TAN); + Ref OneConst {}; + if (ReducedPrecisionMode) { + OneConst = IREmit->_VCastFromGPR(8, 8, GetConstant(0x3FF0000000000000)); + } else { + OneConst = IREmit->_LoadNamedVectorConstant(16, NamedVectorConstant::NAMED_VECTOR_X87_ONE); + } + + if (SlowPath) { + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(OneConst); + } else { + StackData.push(StackMemberInfo {OneConst}); + } + break; + } + + case OP_F80SINCOSSTACK: { + Ref St0 = LoadStackValue(); + + Ref SinValue {}; + Ref CosValue {}; + if (ReducedPrecisionMode) { + SinValue = IREmit->_F64SIN(St0); + CosValue = IREmit->_F64COS(St0); + } else { + SinValue = IREmit->_F80SIN(St0); + CosValue = IREmit->_F80COS(St0); + } + + // Push values + if (SlowPath) { + StoreStackValueAtOffset_Slow(SinValue, 0, false); + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(CosValue, 0, true); + } else { + StackData.setTop(StackMemberInfo {SinValue}); + StackData.push(StackMemberInfo {CosValue}); + } + break; + } + + case OP_INITSTACK: { + StackData.clear(); + break; + } + + case OP_INVALIDATESTACK: { + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + + if (Offset != 0xff) { // invalidate single offset + if (SlowPath) { + auto* TopValue = GetTopWithCache_Slow(); + if (Offset != 0) { + auto* Mask = GetConstant(7); + TopValue = IREmit->_And(OpSize::i32Bit, IREmit->_Add(OpSize::i32Bit, TopValue, GetConstant(Offset)), Mask); + } + SetX87ValidTag(TopValue, false); + } else { + StackData.setTagInvalid(Offset); + } + } else { // invalidate all + if (SlowPath) { + IREmit->_StoreContext(1, GPRClass, GetConstant(0), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + } else { + for (size_t i = 0; i < StackData.size; i++) { + StackData.setTagInvalid(i); + } + } + } + break; + } + + case OP_PUSHSTACK: { + const auto* Op = IROp->C(); + auto* SourceNode = CurrentIR.GetNode(Op->X80Src); + + if (SlowPath) { + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(SourceNode); + } else { + auto* SourceNode = CurrentIR.GetNode(Op->X80Src); + auto* OriginalNode = CurrentIR.GetNode(Op->OriginalValue); + StackData.push(StackMemberInfo {SourceNode, OriginalNode, SizeToOpSize(Op->LoadSize), Op->Float}); + } + break; + } + + case OP_COPYPUSHSTACK: { + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + auto Value = MigrateToSlowPath_IfInvalid(Offset); + + if (SlowPath) { + Ref St0 = LoadStackValueAtOffset_Slow(Offset); + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(St0); + } else { + StackData.push(*Value); + } + break; + } + + case OP_READSTACKVALUE: { + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + Ref NewValue = LoadStackValue(Offset); + + IREmit->ReplaceUsesWithAfter(CodeNode, NewValue, CodeNode); + break; + } + + case OP_STACKVALIDTAG: { + // Returns 0 if value is valid and 1 otherwise. + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + auto Value = MigrateToSlowPath_IfInvalid(Offset); + + Ref Tag {}; + if (SlowPath) { + Tag = GetX87ValidTag_Slow(Offset); + } else { + Tag = Value ? GetConstant(1) : GetConstant(0); + } + + IREmit->ReplaceUsesWithAfter(CodeNode, Tag, CodeNode); + break; + } + + case OP_STORESTACKMEMORY: { + const auto* Op = IROp->C(); + const auto& Value = MigrateToSlowPath_IfInvalid(); + Ref StackNode = SlowPath ? LoadStackValueAtOffset_Slow() : Value->StackDataNode; + Ref AddrNode = CurrentIR.GetNode(Op->Addr); + + // On the fast path we can optimize memory copies. + // If we are doing: + // fld dword [rax] + // fst dword [rbx] + // We can optimize this to: + // ldr w2, [x0] + // str w2, [x1] + // or similar. As long as the source size and dest size are one and the same. + // This will avoid any conversions between source and stack element size and conversion back. + if (!SlowPath && Value->Source && Value->Source->first == Op->StoreSize && Value->InterpretAsFloat) { + IREmit->_StoreMem(Value->InterpretAsFloat ? FPRClass : GPRClass, Op->StoreSize, AddrNode, Value->Source->second); + } else { + if (ReducedPrecisionMode) { + switch (Op->StoreSize) { + case 4: { + StackNode = IREmit->_Float_FToF(4, 8, StackNode); + IREmit->_StoreMem(FPRClass, 4, AddrNode, StackNode); + break; + } + case 8: { + IREmit->_StoreMem(FPRClass, 8, AddrNode, StackNode); + break; + } + case 10: { + StackNode = IREmit->_F80CVTTo(StackNode, 8); + IREmit->_StoreMem(FPRClass, 8, AddrNode, StackNode); + auto Upper = IREmit->_VExtractToGPR(16, 8, StackNode, 1); + IREmit->_StoreMem(GPRClass, 2, Upper, AddrNode, GetConstant(8), 8, MEM_OFFSET_SXTX, 1); + break; + } + } + } else { + if (Op->StoreSize != 10) { // if it's not 80bits then convert + StackNode = IREmit->_F80CVT(Op->StoreSize, StackNode); + } + if (Op->StoreSize == 10) { // Part of code from StoreResult_WithOpSize() + // For X87 extended doubles, split before storing + IREmit->_StoreMem(FPRClass, 8, AddrNode, StackNode); + auto Upper = IREmit->_VExtractToGPR(16, 8, StackNode, 1); + auto DestAddr = IREmit->_Add(OpSize::i64Bit, AddrNode, GetConstant(8)); + IREmit->_StoreMem(GPRClass, 2, DestAddr, Upper, 8); + } else { + IREmit->_StoreMem(FPRClass, Op->StoreSize, AddrNode, StackNode); + } + } + } + break; + } + + case OP_STORESTACKTOSTACK: { // stores top of stack in another place in stack. + const auto* Op = IROp->C(); + auto Offset = Op->StackLocation; + + if (Offset != 0) { + auto Value = MigrateToSlowPath_IfInvalid(); + + // Need to store st0 to stack location - basically a copy. + if (SlowPath) { + StoreStackValueAtOffset_Slow(LoadStackValueAtOffset_Slow(), Offset); + } else { + StackData.setTop(*Value, Offset); + } + } + break; + } + case OP_POPSTACKDESTROY: { + if (SlowPath) { + SetX87ValidTag(GetTopWithCache_Slow(), false); + } + StackPop(); + break; + } + + case OP_F80STACKXCHANGE: { + const auto* Op = IROp->C(); + auto Offset = Op->SrcStack; + Ref ValueTop = LoadStackValue(); + Ref ValueOffset = LoadStackValue(Offset); + + StoreStackValue(ValueOffset); + StoreStackValue(ValueTop, Offset); + break; + } + + case OP_F80STACKCHANGESIGN: { + Ref Value = LoadStackValue(); + + // We need a couple of intermediate instructions to change the sign + // of a value + Ref ResultNode {}; + if (ReducedPrecisionMode) { + ResultNode = IREmit->_VFNeg(8, 8, Value); + } else { + Ref Low = GetConstant(0); + Ref High = GetConstant(0b1'000'0000'0000'0000ULL); + Ref HelperNode = IREmit->_VCastFromGPR(16, 8, Low); + HelperNode = IREmit->_VInsGPR(16, 8, 1, HelperNode, High); + ResultNode = IREmit->_VXor(16, 1, Value, HelperNode); + } + StoreStackValue(ResultNode); + break; + } + + case OP_F80STACKABS: { + Ref Value = LoadStackValue(); + + Ref ResultNode {}; + if (ReducedPrecisionMode) { + ResultNode = IREmit->_VFAbs(8, 8, Value); + } else { + // Intermediate insts + Ref Low = GetConstant(~0ULL); + Ref High = GetConstant(0b0'111'1111'1111'1111ULL); + Ref HelperNode = IREmit->_VCastFromGPR(16, 8, Low); + HelperNode = IREmit->_VInsGPR(16, 8, 1, HelperNode, High); + ResultNode = IREmit->_VAnd(16, 1, Value, HelperNode); + } + StoreStackValue(ResultNode); + break; + } + + case OP_F80CMPSTACK: { + const auto* Op = IROp->C(); + auto Offset = Op->SrcStack; + Ref StackValue1 = LoadStackValue(); + Ref StackValue2 = LoadStackValue(Offset); + + Ref CmpNode {}; + if (ReducedPrecisionMode) { + CmpNode = IREmit->_FCmp(8, StackValue1, StackValue2); + } else { + CmpNode = IREmit->_F80Cmp(StackValue1, StackValue2); + } + + IREmit->ReplaceUsesWithAfter(CodeNode, CmpNode, CodeNode); + break; + } + case OP_F80STACKTEST: { + const auto* Op = IROp->C(); + auto Offset = Op->SrcStack; + auto StackNode = LoadStackValue(Offset); + Ref ZeroConst = IREmit->_VCastFromGPR(ReducedPrecisionMode ? 8 : 16, 8, GetConstant(0)); + + Ref CmpNode {}; + if (ReducedPrecisionMode) { + CmpNode = IREmit->_FCmp(8, StackNode, ZeroConst); + } else { + CmpNode = IREmit->_F80Cmp(StackNode, ZeroConst); + } + IREmit->ReplaceUsesWithAfter(CodeNode, CmpNode, CodeNode); + break; + } + + + case OP_F80CMPVALUE: { + const auto* Op = IROp->C(); + const auto& Value = CurrentIR.GetNode(Op->X80Src); + auto StackNode = LoadStackValue(); + + Ref CmpNode {}; + if (ReducedPrecisionMode) { + CmpNode = IREmit->_FCmp(8, StackNode, Value); + } else { + CmpNode = IREmit->_F80Cmp(StackNode, Value); + } + IREmit->ReplaceUsesWithAfter(CodeNode, CmpNode, CodeNode); + break; + } + + case OP_F80XTRACTSTACK: { + Ref St0 = LoadStackValue(); + + Ref Exp {}; + Ref Sig {}; + if (ReducedPrecisionMode) { + std::tie(Exp, Sig) = SplitF64SigExp(St0); + } else { + Exp = IREmit->_F80XTRACT_EXP(St0); + Sig = IREmit->_F80XTRACT_SIG(St0); + } + + if (SlowPath) { + // Write exp to top, update top for a push and set sig at new top. + StoreStackValueAtOffset_Slow(Exp, 0, false); + UpdateTopForPush_Slow(); + StoreStackValueAtOffset_Slow(Sig); + } else { + StackData.setTop(StackMemberInfo {Exp}); + StackData.push(StackMemberInfo {Sig}); + } + break; + } + + case OP_SYNCSTACKTOSLOW: { + // This synchronizes stack values but doesn't necessarily moves us off the FastPath! + Ref NewTop = SynchronizeStackValues(); + IREmit->ReplaceUsesWithAfter(CodeNode, NewTop, CodeNode); + break; + } + + case OP_STACKFORCESLOW: { + MigrateToSlowPathIf(true); + break; + } + + case OP_INCSTACKTOP: { + if (SlowPath) { + UpdateTopForPush_Slow(); + } else { + StackData.rotate(false); + } + break; + } + + case OP_DECSTACKTOP: { + if (SlowPath) { + UpdateTopForPop_Slow(); + } else { + StackData.rotate(true); + } + break; + } + + case OP_F80ROUNDSTACK: { + Ref St0 = LoadStackValue(); + + Ref Value {}; + if (ReducedPrecisionMode) { + Value = IREmit->_Vector_FToI(8, 8, St0, Round_Host); + } else { + Value = IREmit->_F80Round(St0); + } + StoreStackValue(Value); + break; + } + + case OP_F80VBSLSTACK: { + const auto* Op = IROp->C(); + + auto StackOffset1 = Op->SrcStack1; + auto StackOffset2 = Op->SrcStack2; + Ref Value1 = LoadStackValue(StackOffset1); + Ref Value2 = LoadStackValue(StackOffset2); + + Ref StackNode = IREmit->_VBSL(16, CurrentIR.GetNode(Op->VectorMask), Value1, Value2); + StoreStackValue(StackNode, 0, StackOffset1 && StackOffset2); + break; + } + + default: LOGMAN_THROW_A_FMT(false, "IROp was expected to be lowered"); + } + IREmit->Remove(CodeNode); + } + + auto Last = CurrentIR.at(BlockIROp->Last); + --Last; + auto [LastCodeNode, LastIROp] = Last(); + LOGMAN_THROW_A_FMT(IsBlockExit(LastIROp->Op), "must be exit"); + IREmit->SetWriteCursorBefore(LastCodeNode); + SynchronizeStackValues(); + } + + return; +} + +fextl::unique_ptr CreateX87StackOptimizationPass() { + return fextl::make_unique(); +} +} // namespace FEXCore::IR diff --git a/docs/SourceOutline.md b/docs/SourceOutline.md index 094c1fe173..4568925c13 100644 --- a/docs/SourceOutline.md +++ b/docs/SourceOutline.md @@ -5,7 +5,7 @@ See [FEXCore/Readme.md](../FEXCore/Readme.md) for more details ### Glossary -- Splatter: a code generator backend that concaternates configurable macros instead of doing isel +- Splatter: a code generator backend that concatenates configurable macros instead of doing isel - IR: Intermediate Representation, our high-level opcode representation, loosely modeling arm64 - SSA: Single Static Assignment, a form of representing IR in memory - Basic Block: A block of instructions with no control flow, terminated by control flow @@ -115,6 +115,7 @@ IR to IR Optimization - [RedundantFlagCalculationElimination.cpp](../FEXCore/Source/Interface/IR/Passes/RedundantFlagCalculationElimination.cpp): This is not used right now, possibly broken - [RegisterAllocationPass.cpp](../FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp) - [RegisterAllocationPass.h](../FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.h) +- [x87StackOptimizationPass.cpp](../FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp): x87 stack optimization pass diff --git a/unittests/gcc-target-tests-32/Known_Failures b/unittests/gcc-target-tests-32/Known_Failures index 89edbff87d..9ea523beac 100644 --- a/unittests/gcc-target-tests-32/Known_Failures +++ b/unittests/gcc-target-tests-32/Known_Failures @@ -1,5 +1,4 @@ pr72867.c.gcc-target-test-32 -pr88240.c.gcc-target-test-32 sse2-mmx-pextrw.c.gcc-target-test-32 # Consistently crashes on Solidrun only in CI diff --git a/unittests/gcc-target-tests-64/Known_Failures b/unittests/gcc-target-tests-64/Known_Failures index d52210b787..46d1bc6c35 100644 --- a/unittests/gcc-target-tests-64/Known_Failures +++ b/unittests/gcc-target-tests-64/Known_Failures @@ -13,15 +13,6 @@ asm-5.c.gcc-target-test-64 # This causes its comparison to fail sse2-mmx-pextrw.c.gcc-target-test-64 -# Fails even on host device -# Stores a large 64bit value in to a union of double and 'unsigned long long' -# 'test' loads this value in to a x87 register, then stores that value on to the stack -# Checks the flag and skips a bunch of x87 logic, and loads that value back from the stack in to rax -# Value has been munged from the fld + fstp step -# 0xFFF279535D540FE4 was the original value -# 0xFFFA79535D540FE4 was the value it turned in to -pr88240.c.gcc-target-test-64 - # These tests fail because of things unrelated to the sse4.1 instructions sse4_1-ceil-sfix-vec.c.gcc-target-test-64 sse4_1-ceilf-sfix-vec.c.gcc-target-test-64 From 774325dcf2f238fea05c4b6ccd54dedb400d87d5 Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Fri, 28 Jun 2024 15:43:40 +0200 Subject: [PATCH 2/3] Tests: X87 Refactoring and Pass --- unittests/ASM/Known_Failures_host | 1 + unittests/ASM/X87/FXAM_Push.asm | 2 +- unittests/ASM/X87/FXAM_Push_2.asm | 2 +- unittests/ASM/X87/FXAM_Push_Simple.asm | 40 ++++++++++++++++ unittests/ASM/X87/FXAM_Push_Simple_2.asm | 51 +++++++++++++++++++++ unittests/ASM/X87/FXAM_Simple.asm | 49 ++++++++++++++++++++ unittests/ASM/X87/Memcopy.asm | 21 +++++++++ unittests/ASM/x87_stack.asm | 26 +++++++++++ unittests/FEXLinuxTests/Known_Failures_Host | 2 + 9 files changed, 192 insertions(+), 2 deletions(-) create mode 100644 unittests/ASM/Known_Failures_host create mode 100644 unittests/ASM/X87/FXAM_Push_Simple.asm create mode 100644 unittests/ASM/X87/FXAM_Push_Simple_2.asm create mode 100644 unittests/ASM/X87/FXAM_Simple.asm create mode 100644 unittests/ASM/X87/Memcopy.asm create mode 100644 unittests/ASM/x87_stack.asm diff --git a/unittests/ASM/Known_Failures_host b/unittests/ASM/Known_Failures_host new file mode 100644 index 0000000000..322f758bca --- /dev/null +++ b/unittests/ASM/Known_Failures_host @@ -0,0 +1 @@ +Test_X87/FXAM_Simple.asm diff --git a/unittests/ASM/X87/FXAM_Push.asm b/unittests/ASM/X87/FXAM_Push.asm index a26e039bc8..d94511f3ca 100644 --- a/unittests/ASM/X87/FXAM_Push.asm +++ b/unittests/ASM/X87/FXAM_Push.asm @@ -11,7 +11,7 @@ mov rdx, 0xe0000000 ; This behaviour was seen around Wine 32-bit libraries ; Anything doing a call to a double application would spin ; the x87 stack on to the stack looking for fxam to return empty -; Empty in this case is that C0 and C3 is set whiel C2 is not +; Empty in this case is that C0 and C3 is set while C2 is not fninit ; Fill the x87 stack diff --git a/unittests/ASM/X87/FXAM_Push_2.asm b/unittests/ASM/X87/FXAM_Push_2.asm index c6ef4ff3fd..78edde24d3 100644 --- a/unittests/ASM/X87/FXAM_Push_2.asm +++ b/unittests/ASM/X87/FXAM_Push_2.asm @@ -11,7 +11,7 @@ mov rdx, 0xe0000000 ; This behaviour was seen around Wine 32-bit libraries ; Anything doing a call to a double application would spin ; the x87 stack on to the stack looking for fxam to return empty -; Empty in this case is that C0 and C3 is set whiel C2 is not +; Empty in this case is that C0 and C3 is set while C2 is not fninit ; Empty stack to make sure we don't push anything diff --git a/unittests/ASM/X87/FXAM_Push_Simple.asm b/unittests/ASM/X87/FXAM_Push_Simple.asm new file mode 100644 index 0000000000..de7ab5086f --- /dev/null +++ b/unittests/ASM/X87/FXAM_Push_Simple.asm @@ -0,0 +1,40 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "8" + } +} +%endif + +fninit +fld1 +fld1 +fld1 +fld1 +fld1 +fld1 +fld1 +fld1 + +mov ebx, 0 + +.ExamineStack: +; Examine st(0) +fxam +fwait +; Get the results in to AX +fnstsw ax +and ax, 0x4500 +; Check for empty +cmp ax, 0x4100 +je .Done + +; Now push the x87 stack value +; We know it isn't empty +fstp st0 +fwait +inc ebx +jmp .ExamineStack +.Done: +mov eax, ebx +hlt diff --git a/unittests/ASM/X87/FXAM_Push_Simple_2.asm b/unittests/ASM/X87/FXAM_Push_Simple_2.asm new file mode 100644 index 0000000000..429a0ae30c --- /dev/null +++ b/unittests/ASM/X87/FXAM_Push_Simple_2.asm @@ -0,0 +1,51 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "8" + } +} +%endif + +mov rdx, 0xe0000000 + +; This behaviour was seen around Wine 32-bit libraries +; Anything doing a call to a double application would spin +; the x87 stack on to the stack looking for fxam to return empty +; Empty in this case is that C0 and C3 is set while C2 is not + +fninit +; Fill the x87 stack +fldz +fldz +fldz +fldz +fldz +fldz +fldz +fldz + +mov eax, 0 +mov ecx, 0 + +.ExamineStack: +; Examine st(0) +fxam +fwait +; Get the results in to AX +fnstsw ax +and ax, 0x4500 +; Check for empty +cmp ax, 0x4100 +je .Done + +; Now push the x87 stack value +; We know it isn't empty +fstp qword [rdx + rcx * 8] +fwait +inc ecx +jmp .ExamineStack + +.Done: +; Save how many we stored +mov eax, ecx +hlt diff --git a/unittests/ASM/X87/FXAM_Simple.asm b/unittests/ASM/X87/FXAM_Simple.asm new file mode 100644 index 0000000000..7e76fbaaa3 --- /dev/null +++ b/unittests/ASM/X87/FXAM_Simple.asm @@ -0,0 +1,49 @@ +;; Simpler versions of FXAM_Push* tests. +;; In hostrunner tests this will fail because we mentioned below there's no support +;; for the zero flag. In hostrunner RCX should contain 0x4000 instead of 0x400. +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x6", + "RBX": "0x0400", + "RCX": "0x0400", + "RDX": "0x4100" + } +} +%endif + +mov rdx, 0xe0000000 + +fninit +;; Before adding anything to the stack, lets examine it. +;; The result should be empty. +fxam +fwait + +fnstsw ax +and ax, 0x4500 ; should be 0x4100 for zero +mov edx, eax + +fldz +fxam +fwait + +fnstsw ax +and ax, 0x4500 ; should be 0x4000 for zero, but there's no support for it at the moment, so it'll return 0x0400 as it does for a normal number. +mov ecx, eax + +fld1 +fxam +fwait + +fnstsw ax +mov ebx, eax +and ebx, 0x4500 ; should be 0x0400 for normal + +;; Top should be 6 +;; right shift status word by 11 and and with 0x7. +shr eax, 11 +and eax, 0x7 + + +hlt diff --git a/unittests/ASM/X87/Memcopy.asm b/unittests/ASM/X87/Memcopy.asm new file mode 100644 index 0000000000..47d299a203 --- /dev/null +++ b/unittests/ASM/X87/Memcopy.asm @@ -0,0 +1,21 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x3ff8000000000000", + "RBX": "0x3ff8000000000000" + }, + "MemoryRegions": { + "0x100000000": "4096" + } +} +%endif + +mov rdx, 0x100000000 +mov rax, 0x3ff8000000000000 ; 1.5 +mov [rdx], rax + +fld qword [rdx] +fstp qword [rdx + 8] + +mov rbx, [rdx + 8] +hlt diff --git a/unittests/ASM/x87_stack.asm b/unittests/ASM/x87_stack.asm new file mode 100644 index 0000000000..f032ca9c60 --- /dev/null +++ b/unittests/ASM/x87_stack.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x4142434445464748", + "RBX": "0" + } +} +%endif + +lea rax, [rel .data] +lea rbx, [rel .data_mov] + +fld qword [rax] +fstp qword [rbx] + +mov rax, [rbx] +mov rbx, [rbx + 8] +hlt + +.data: +dq 0x4142434445464748 +dq 0x5152535455565758 + +.data_mov: +dq 0 +dq 0 diff --git a/unittests/FEXLinuxTests/Known_Failures_Host b/unittests/FEXLinuxTests/Known_Failures_Host index e69de29bb2..81acd73a95 100644 --- a/unittests/FEXLinuxTests/Known_Failures_Host +++ b/unittests/FEXLinuxTests/Known_Failures_Host @@ -0,0 +1,2 @@ +## Unable to support zero flag +FXAM_Simple.asm From 39bc2a82c1698d36e2bfa8303a394ed813651899 Mon Sep 17 00:00:00 2001 From: Paulo Matos Date: Mon, 22 Jul 2024 08:50:01 +0200 Subject: [PATCH 3/3] instcountci: X87 Pass and refactoring --- .../FlagM/HotBlocks_32Bit.json | 2369 +- .../FlagM/x87-HalfLife.json | 4460 +- .../FlagM/x87-Oblivion.json | 109409 ++++++--------- .../FlagM/x87-Psychonauts.json | 45508 ++---- unittests/InstructionCountCI/FlagM/x87.json | 4704 +- .../InstructionCountCI/FlagM/x87_f64.json | 3389 +- unittests/InstructionCountCI/x87.json | 4696 +- unittests/InstructionCountCI/x87_f64.json | 3389 +- 8 files changed, 64683 insertions(+), 113241 deletions(-) diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index 44ae86e9e6..95dc691abd 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -143,7 +143,7 @@ ] }, "Psychonauts matrix swizzle": { - "ExpectedInstructionCount": 2340, + "ExpectedInstructionCount": 165, "Comment": [ "Hottest block in Windows Psychonauts", "Doing a 4x4 32-bit float matrix swizzle", @@ -264,2337 +264,162 @@ "mov x20, #0xffffffffffffffbc", "str w5, [x9, w20, sxtw]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w22, #0x1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w22, w21", - "orr w23, w23, w24", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x24, #0xffffffffffffffc0", - "str s2, [x9, w24, sxtw]", - "lsl w25, w22, w21", - "bic w23, w23, w25", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x21, #0xffffffffffffffc0", + "sub w22, w9, #0x40 (64)", + "str s2, [x22]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w25, w22, w21", - "orr w23, w23, w25", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x25, #0xffffffffffffffc4", - "str s2, [x9, w25, sxtw]", - "lsl w12, w22, w21", - "bic w23, w23, w12", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x22, #0xffffffffffffffc4", + "sub w23, w9, #0x3c (60)", + "str s2, [x23]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w12, w22, w21", - "orr w23, w23, w12", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x12, #0xffffffffffffffc8", - "str s2, [x9, w12, sxtw]", - "lsl w13, w22, w21", - "bic w23, w23, w13", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x23, #0xffffffffffffffc8", + "sub w24, w9, #0x38 (56)", + "str s2, [x24]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w13, w22, w21", - "orr w23, w23, w13", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x13, #0xffffffffffffffcc", - "str s2, [x9, w13, sxtw]", - "lsl w14, w22, w21", - "bic w23, w23, w14", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x24, #0xffffffffffffffcc", + "sub w25, w9, #0x34 (52)", + "str s2, [x25]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w14, w22, w21", - "orr w23, w23, w14", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x14, #0xffffffffffffffd0", - "str s2, [x9, w14, sxtw]", - "lsl w15, w22, w21", - "bic w23, w23, w15", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x25, #0xffffffffffffffd0", + "sub w12, w9, #0x30 (48)", + "str s2, [x12]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w15, w22, w21", - "orr w23, w23, w15", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x15, #0xffffffffffffffd4", - "str s2, [x9, w15, sxtw]", - "lsl w16, w22, w21", - "bic w23, w23, w16", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x12, #0xffffffffffffffd4", + "sub w13, w9, #0x2c (44)", + "str s2, [x13]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w16, w22, w21", - "orr w23, w23, w16", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x16, #0xffffffffffffffd8", - "str s2, [x9, w16, sxtw]", - "lsl w17, w22, w21", - "bic w23, w23, w17", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x13, #0xffffffffffffffd8", + "sub w14, w9, #0x28 (40)", + "str s2, [x14]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w17, w22, w21", - "orr w23, w23, w17", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x17, #0xffffffffffffffdc", - "str s2, [x9, w17, sxtw]", - "lsl w29, w22, w21", - "bic w23, w23, w29", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x14, #0xffffffffffffffdc", + "sub w15, w9, #0x24 (36)", + "str s2, [x15]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w29, w22, w21", - "orr w23, w23, w29", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x29, #0xffffffffffffffe0", - "str s2, [x9, w29, sxtw]", - "lsl w30, w22, w21", - "bic w23, w23, w30", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x15, #0xffffffffffffffe0", + "sub w16, w9, #0x20 (32)", + "str s2, [x16]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w30, w22, w21", - "orr w23, w23, w30", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x30, #0xffffffffffffffe4", - "str s2, [x9, w30, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x16, #0xffffffffffffffe4", + "sub w17, w9, #0x1c (28)", + "str s2, [x17]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xffffffffffffffe8", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x17, #0xffffffffffffffe8", + "sub w29, w9, #0x18 (24)", + "str s2, [x29]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xffffffffffffffec", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x29, #0xffffffffffffffec", + "sub w30, w9, #0x14 (20)", + "str s2, [x30]", "ldr w4, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x19, #0xfffffffffffffff0", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "mov x30, #0xfffffffffffffff0", + "sub w19, w9, #0x10 (16)", + "str s2, [x19]", "ldr w5, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x5, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "mov x19, #0xfffffffffffffff4", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "sub w19, w9, #0xc (12)", + "str s2, [x19]", "ldr w6, [x9, w20, sxtw]", - "ldrb w21, [x28, #1019]", "ldr s2, [x6, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "lsl w19, w22, w21", - "orr w23, w23, w19", - "strb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w21, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "mov x19, #0xfffffffffffffff8", - "str s2, [x9, w19, sxtw]", - "lsl w19, w22, w21", - "bic w23, w23, w19", - "add w21, w21, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "sub w19, w9, #0x8 (8)", + "str s2, [x19]", "ldr w4, [x9, w20, sxtw]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w22, w20", - "orr w21, w23, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x23, #0xfffffffffffffffc", - "str s2, [x9, w23, sxtw]", - "lsl w19, w22, w20", - "bic w21, w21, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x20, #0xfffffffffffffffc", + "sub w19, w9, #0x4 (4)", + "str s2, [x19]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", + "ldr s2, [x9, w21, sxtw]", "str s2, [x5]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w22, sxtw]", + "add w21, w6, #0x4 (4)", + "str s2, [x21]", + "ldr w4, [x9, #8]", + "ldr s2, [x9, w23, sxtw]", + "add w21, w4, #0x8 (8)", + "str s2, [x21]", + "ldr w5, [x9, #8]", + "ldr s2, [x9, w24, sxtw]", + "add w21, w5, #0xc (12)", + "str s2, [x21]", + "ldr w6, [x9, #8]", "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w6, #0x10 (16)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x14 (20)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w5, #0x18 (24)", + "str s2, [x21]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w14, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #16]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w6, #0x1c (28)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w15, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x20 (32)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w5, #0x24 (36)", + "str s2, [x21]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w17, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #28]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w6, #0x28 (40)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w4, #0x2c (44)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, w30, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #36]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "add w21, w5, #0x30 (48)", + "str s2, [x21]", "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffe8", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #40]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x21, #0xfffffffffffffff4", + "ldr s2, [x9, w21, sxtw]", + "add w21, w6, #0x34 (52)", + "str s2, [x21]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffec", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x21, #0xfffffffffffffff8", + "ldr s2, [x9, w21, sxtw]", + "add w21, w4, #0x38 (56)", + "str s2, [x21]", "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff0", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #48]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff4", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #52]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #60]", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "ldr s2, [x9, w20, sxtw]", + "add w20, w5, #0x3c (60)", + "str s2, [x20]", "ldr w4, [x9, #8]", "mov x8, x9", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "strb w21, [x28, #1298]" + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json index 0071184b4d..bb2f70b751 100644 --- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 2034, + "ExpectedInstructionCount": 1368, "x86Insts": [ "sub esp,0x2c", "mov ecx,dword [esp + 0x34]", @@ -93,7 +93,6 @@ "ldr w5, [x8, #52]", "ldr w6, [x8, #48]", "ldr w4, [x8, #56]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -122,17 +121,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -144,7 +133,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -157,35 +146,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -198,10 +161,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -213,13 +176,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -231,7 +191,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -244,18 +204,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -267,7 +219,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -280,35 +232,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -321,10 +247,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -336,14 +262,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -356,8 +278,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -369,15 +291,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "fmov s7, s0", + "str s7, [x20]", + "mov w20, #0x8", + "ldr s7, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -389,7 +306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -402,18 +319,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -425,7 +334,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -438,35 +347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -479,10 +362,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -494,14 +377,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -514,8 +393,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -527,15 +406,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "fmov s9, s0", + "str s9, [x21]", + "ldr s9, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -547,7 +420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -560,23 +433,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -589,8 +448,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -607,23 +466,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -650,13 +494,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -685,20 +523,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -711,10 +535,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -726,26 +550,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -758,8 +567,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -771,15 +580,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -791,7 +594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -804,23 +607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -833,10 +622,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -848,30 +637,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -886,8 +655,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -899,35 +668,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -940,8 +684,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -958,32 +702,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -996,10 +715,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1011,35 +730,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1052,10 +746,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1067,27 +761,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "movi v6.2d, #0x0", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1102,8 +779,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1115,18 +792,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #16]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1138,7 +807,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1151,35 +820,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1192,10 +835,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1207,23 +850,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1238,8 +867,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1251,18 +880,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #20]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1274,7 +895,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1287,35 +908,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1328,10 +923,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1343,23 +938,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1374,8 +955,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v4.d[0]", "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1387,18 +968,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #24]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1410,7 +983,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1423,35 +996,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1464,10 +1011,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1479,31 +1026,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,10 +1041,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1531,18 +1056,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s3, [x8, #28]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1554,7 +1071,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s3", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1567,35 +1084,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1608,10 +1099,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1623,23 +1114,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1652,10 +1129,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1667,35 +1144,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q4, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1708,10 +1160,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -1723,18 +1175,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1747,10 +1190,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1762,35 +1205,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v3.16b, v3.16b, v3.16b", - "mov v3.d[0], x0", - "mov v3.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q4, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q4, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1803,8 +1221,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v4.d[0]", - "umov w2, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", @@ -1821,23 +1239,6 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1852,8 +1253,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1865,35 +1266,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1906,8 +1282,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1924,15 +1300,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1963,32 +1330,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2001,10 +1343,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2016,18 +1358,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2040,10 +1373,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2058,32 +1391,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2096,10 +1404,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2111,20 +1419,46 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w22, w22, w20", - "orr w23, w23, w20", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", "rmif x22, #63, #nzCv", "rmif x23, #62, #nZcv", - "eor w26, w20, #0x1", - "strb w21, [x28, #1298]" + "mov w22, #0x1", + "eor w26, w21, #0x1", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x3 (3)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "str q4, [x0, #1040]", + "add w23, w21, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q7, [x0, #1040]", + "add w23, w21, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w23, w21, #0x3 (3)", + "and w23, w23, #0x7", + "sub w20, w20, w21", + "ldrb w21, [x28, #1298]", + "mov w24, #0x707", + "lsr w20, w24, w20", + "orr w20, w21, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w23", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 838, + "ExpectedInstructionCount": 551, "x86Insts": [ "sub esp,0x1c", "mov edx,dword [esp + 0x20]", @@ -2169,7 +1503,6 @@ "subs w8, w8, #0x1c (28)", "ldr w6, [x8, #32]", "ldr w4, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2198,27 +1531,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov x23, #0xffffffffffffffff", - "mov w24, #0x7fff", - "fmov d3, x23", - "mov v3.d[1], x24", + "mov x20, #0xffffffffffffffff", + "mov w21, #0x7fff", + "fmov d3, x20", + "mov v3.d[1], x21", "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2230,7 +1548,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2243,43 +1561,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "fmov d4, x20", + "mov v4.d[1], x21", + "and v3.16b, v3.16b, v4.16b", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2292,10 +1580,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2307,43 +1595,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x25, x20, #1, #1", - "ubfx x12, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w25, w25, w20", - "orr w20, w12, w20", - "rmif x25, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "mov x22, x0", + "ubfx x23, x22, #1, #1", + "ubfx x24, x22, #0, #1", + "ubfx x22, x22, #2, #1", + "orr w23, w23, w22", + "orr w22, w24, w22", + "rmif x23, #63, #nzCv", + "rmif x22, #62, #nZcv", + "mov w22, #0x1", + "csetm x23, hs", + "csel x23, x20, x23, eq", + "dup v4.2d, x23", + "bit v2.16b, v3.16b, v4.16b", + "ldr s3, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2355,7 +1620,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2368,26 +1633,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "fmov d4, x20", + "mov v4.d[1], x21", + "and v3.16b, v3.16b, v4.16b", + "ldr s4, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2399,7 +1651,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2412,43 +1664,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "and v4.16b, v4.16b, v5.16b", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2463,8 +1685,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2476,43 +1698,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x25, x20, #1, #1", - "ubfx x12, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w25, w25, w20", - "orr w20, w12, w20", - "rmif x25, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "mov x23, x0", + "ubfx x24, x23, #1, #1", + "ubfx x25, x23, #0, #1", + "ubfx x23, x23, #2, #1", + "orr w24, w24, w23", + "orr w23, w25, w23", + "rmif x24, #63, #nzCv", + "rmif x23, #62, #nZcv", + "csetm x23, hs", + "csel x23, x20, x23, eq", + "dup v5.2d, x23", + "bit v3.16b, v4.16b, v5.16b", + "mov w23, #0x8", + "ldr s4, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2524,7 +1723,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2537,26 +1736,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "and v4.16b, v4.16b, v5.16b", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2568,7 +1754,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2581,43 +1767,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d6, x20", + "mov v6.d[1], x21", + "and v5.16b, v5.16b, v6.16b", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2630,10 +1786,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2645,60 +1801,18 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x24, x20, #1, #1", - "ubfx x25, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w24, w24, w20", - "orr w20, w25, w20", + "mov x21, x0", + "ubfx x24, x21, #1, #1", + "ubfx x25, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w24, w24, w21", + "orr w21, w25, w21", "rmif x24, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x23, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "rmif x21, #62, #nZcv", + "csetm x21, hs", + "csel x20, x20, x21, eq", + "dup v6.2d, x20", + "bit v4.16b, v5.16b, v6.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2711,8 +1825,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2729,32 +1843,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2769,8 +1858,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2782,18 +1871,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2806,10 +1886,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2824,20 +1904,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2850,10 +1916,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -2865,18 +1931,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2889,10 +1946,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2907,28 +1964,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2954,18 +1989,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2980,8 +2006,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2994,19 +2020,40 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x21, x20, #1, #1", + "ubfx x24, x20, #0, #1", "ubfx x20, x20, #2, #1", - "orr w22, w22, w20", - "orr w23, w23, w20", - "rmif x22, #63, #nzCv", - "rmif x23, #62, #nZcv", + "orr w21, w21, w20", + "orr w24, w24, w20", + "rmif x21, #63, #nzCv", + "rmif x24, #62, #nZcv", "eor w26, w20, #0x1", - "strb w21, [x28, #1298]" + "ldrb w20, [x28, #1019]", + "sub w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", + "sub w20, w23, w20", + "ldrb w23, [x28, #1298]", + "mov w24, #0x303", + "lsr w20, w24, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w21", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block3": { - "ExpectedInstructionCount": 1131, + "ExpectedInstructionCount": 807, "x86Insts": [ "fld dword [ecx]", "fld dword [edx + 0x4]", @@ -3042,7 +2089,6 @@ "fstp dword [esi]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3071,17 +2117,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "ldr s3, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3093,7 +2129,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3106,18 +2142,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3129,7 +2157,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3142,18 +2170,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3165,7 +2185,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3178,18 +2198,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x5, #8]", + "str s6, [x8]", + "ldr s6, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3197,123 +2211,26 @@ "str x8, [x28, #312]", "sub sp, sp, #0x80 (128)", "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3326,10 +2243,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3341,30 +2258,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3377,10 +2273,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3392,18 +2288,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3416,10 +2303,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3431,18 +2318,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3454,7 +2333,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3467,11 +2346,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3484,10 +2361,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3499,25 +2376,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3529,7 +2392,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3542,11 +2405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3559,10 +2420,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3574,30 +2435,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3610,10 +2451,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3628,15 +2469,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3649,10 +2481,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3667,15 +2499,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s5, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3687,7 +2511,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3700,23 +2524,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3729,10 +2539,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3747,32 +2557,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3785,8 +2570,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -3803,32 +2588,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3841,45 +2601,26 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3891,7 +2632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3904,11 +2645,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3923,8 +2662,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3936,19 +2675,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x8]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w20, #0x1", + "strb w20, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3961,8 +2692,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -3976,18 +2707,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3999,7 +2722,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4012,11 +2735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4031,8 +2752,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4044,18 +2765,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4068,10 +2780,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4086,19 +2798,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w21, #0x2 (2)", + "and w22, w22, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w21, w20, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w22, w20, w22", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1019]", + "add w22, w21, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4130,15 +2851,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w20, w21", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4167,16 +2889,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "ldrb w22, [x28, #1298]", + "lsl w20, w20, w21", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "add w20, w21, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block4": { - "ExpectedInstructionCount": 237, + "ExpectedInstructionCount": 206, "x86Insts": [ "push ebp", "push edi", @@ -4245,10 +2968,9 @@ "ldr w4, [x8, #104]", "add w9, w8, #0x38 (56)", "add w10, w8, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "mov w21, #0x2098", - "movk w21, #0x5, lsl #16", - "ldr d2, [x21]", + "mov w20, #0x2098", + "movk w20, #0x5, lsl #16", + "ldr d2, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4276,23 +2998,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w10, [x8, #12]", "ldr w11, [x8, #100]", "str w9, [x8, #8]", "ldr w7, [x8, #108]", "str w4, [x8, #40]", "ldr w4, [x8, #96]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4304,7 +3016,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4317,11 +3029,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4334,10 +3044,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4352,11 +3062,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4383,13 +3089,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4418,16 +3118,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4455,26 +3145,28 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "mov w20, #0x423", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0bc", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0bc", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block5": { - "ExpectedInstructionCount": 1198, + "ExpectedInstructionCount": 971, "x86Insts": [ "fld dword [esp + 0x80]", "fsub dword [esp + 0x7c]", @@ -4527,7 +3219,6 @@ "test al,al" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4556,17 +3247,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4578,7 +3259,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4591,11 +3272,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4608,10 +3287,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4626,15 +3305,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x8, #136]", "ldr w5, [x8, #140]", "ldr s17, [x8, #124]", "str w6, [x8, #56]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4660,10 +3335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4675,48 +3349,22 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4729,10 +3377,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4747,27 +3395,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4779,7 +3408,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4792,11 +3421,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4809,10 +3436,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4827,11 +3454,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4858,13 +3481,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4893,15 +3510,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9]", + "ldr s4, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4913,7 +3522,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4926,11 +3535,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4943,10 +3550,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4961,16 +3568,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr s16, [x8, #44]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4983,10 +3581,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5001,10 +3599,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9]", + "ldr s4, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5016,7 +3611,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5029,11 +3624,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5046,10 +3639,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5064,11 +3657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5095,13 +3684,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5130,15 +3713,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #4]", + "ldr s4, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5150,7 +3725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5163,11 +3738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5180,10 +3753,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5198,15 +3771,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5219,10 +3783,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5237,10 +3801,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #4]", + "ldr s4, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5252,7 +3813,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5265,11 +3826,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5282,10 +3841,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5300,11 +3859,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5331,13 +3886,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5366,15 +3915,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #8]", + "ldr s4, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5386,7 +3927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5399,11 +3940,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5416,10 +3955,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5434,15 +3973,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5473,15 +4003,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, #8]", + "ldr s3, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5493,7 +4015,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5506,11 +4028,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5523,10 +4043,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5541,17 +4061,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "str w5, [x8, #28]", "str s16, [x8, #16]", "add w5, w8, #0x44 (68)", "str s17, [x8, #12]", "str w5, [x8, #24]", "str w9, [x8, #20]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5571,30 +4087,16 @@ "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5606,7 +4108,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5619,35 +4121,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5660,10 +4137,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -5675,34 +4152,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x23, x0", - "ubfx x24, x23, #1, #1", - "ubfx x25, x23, #0, #1", - "ubfx x23, x23, #2, #1", - "orr w24, w24, w23", - "orr w25, w25, w23", - "rmif x24, #63, #nzCv", - "rmif x25, #62, #nZcv", - "eor w26, w23, #0x1", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "mov x20, x0", + "ubfx x21, x20, #1, #1", + "ubfx x22, x20, #0, #1", + "ubfx x20, x20, #2, #1", + "orr w21, w21, w20", + "orr w22, w22, w20", + "rmif x21, #63, #nzCv", + "rmif x22, #62, #nZcv", + "mov w21, #0x1", + "eor w26, w20, #0x1", "cset x20, lo", "csel x20, x20, xzr, ne", "strb w20, [x8, #48]", @@ -5720,7 +4179,13 @@ "movk w22, #0x2, lsl #16", "add w22, w20, w22", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w23, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", @@ -5728,7 +4193,7 @@ ] }, "Block6": { - "ExpectedInstructionCount": 1134, + "ExpectedInstructionCount": 924, "x86Insts": [ "push ebp", "push edi", @@ -5782,7 +4247,6 @@ "ldr w7, [x8, #36]", "ldr w4, [x8, #28]", "ldr w6, [x8, #24]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5811,17 +4275,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #4]", + "ldr s3, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5833,7 +4287,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5846,11 +4300,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5863,10 +4315,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5881,13 +4333,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w9, [x8, #40]", "ldr w11, [x8, #44]", "ldr w10, [x8, #48]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "ldr s3, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5899,7 +4348,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5912,18 +4361,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5935,7 +4376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5948,11 +4389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5967,8 +4406,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5980,18 +4419,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6022,15 +4452,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "ldr s3, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6042,7 +4464,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6055,18 +4477,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w20, #0x8", + "ldr s4, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6078,7 +4493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6091,11 +4506,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6110,8 +4523,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6123,13 +4536,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6141,7 +4551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6154,18 +4564,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6177,7 +4579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6190,11 +4592,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6207,10 +4607,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6222,18 +4622,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6246,10 +4637,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6261,18 +4652,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6284,7 +4667,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6297,18 +4680,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6320,7 +4695,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6332,12 +4707,10 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6350,10 +4723,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6365,13 +4738,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6383,7 +4753,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6396,18 +4766,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6419,7 +4781,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6432,11 +4794,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6449,10 +4809,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6464,18 +4824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6488,10 +4839,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6503,18 +4854,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6526,7 +4869,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6539,23 +4882,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6568,8 +4897,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -6583,13 +4912,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6601,7 +4927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6614,23 +4940,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6643,10 +4955,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6658,18 +4970,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6682,10 +4985,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6697,18 +5000,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6720,7 +5015,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6733,23 +5028,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6762,10 +5043,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6777,18 +5058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6801,10 +5073,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6816,44 +5088,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "movi v6.2d, #0x0", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6866,10 +5105,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6881,34 +5120,50 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x23, x20, #1, #1", - "ubfx x24, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w23, w23, w20", - "orr w24, w24, w20", - "rmif x23, #63, #nzCv", - "rmif x24, #62, #nZcv", - "eor w26, w20, #0x1", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", + "mov x21, x0", + "ubfx x22, x21, #1, #1", + "ubfx x23, x21, #0, #1", + "ubfx x21, x21, #2, #1", + "orr w22, w22, w21", + "orr w23, w23, w21", + "rmif x22, #63, #nzCv", + "rmif x23, #62, #nZcv", + "mov w22, #0x1", + "eor w26, w21, #0x1", + "ldrb w21, [x28, #1019]", + "sub w21, w21, #0x4 (4)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", + "str q5, [x0, #1040]", + "add w23, w21, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q4, [x0, #1040]", + "add w23, w21, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add w23, w21, #0x3 (3)", "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w23, w21, #0x7 (7)", + "and w23, w23, #0x7", + "sub w20, w20, w21", + "ldrb w21, [x28, #1298]", + "mov w24, #0xf0f", + "lsr w20, w24, w20", + "orr w20, w21, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w21, w22, w23", + "bic w20, w20, w21", + "strb w20, [x28, #1298]" ] }, "Block7": { - "ExpectedInstructionCount": 1044, + "ExpectedInstructionCount": 851, "x86Insts": [ "fld dword [ebx + 0x4]", "fld dword [ebx]", @@ -6937,7 +5192,6 @@ "fstp dword [edi]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6966,17 +5220,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7]", + "ldr s3, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6988,7 +5232,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7001,18 +5245,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7024,7 +5260,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7037,18 +5273,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7060,7 +5288,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7073,23 +5301,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7102,8 +5316,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -7117,13 +5331,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7135,7 +5346,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7148,23 +5359,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7177,10 +5374,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7192,18 +5389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7216,10 +5404,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7231,18 +5419,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7254,7 +5434,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7267,11 +5447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7284,10 +5462,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7299,25 +5477,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "ldr s6, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7329,7 +5493,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7342,11 +5506,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7361,8 +5523,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7374,13 +5536,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7392,7 +5551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7405,23 +5564,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7434,10 +5579,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7449,18 +5594,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7473,10 +5609,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7488,18 +5624,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7511,7 +5639,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7524,11 +5652,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7543,8 +5669,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7556,18 +5682,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7580,10 +5697,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7595,18 +5712,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7618,7 +5727,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7631,11 +5740,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7648,10 +5755,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7663,25 +5770,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, #8]", + "ldr s5, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7693,7 +5786,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7706,11 +5799,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7722,11 +5813,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7741,15 +5832,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7762,10 +5844,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7780,27 +5862,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7812,7 +5875,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7825,11 +5888,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7842,10 +5903,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7860,15 +5921,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7899,17 +5951,27 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldrb w20, [x28, #1298]", + "lsl w22, w21, w22", + "bic w20, w20, w22", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7945,7 +6007,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -7975,16 +6036,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block8": { - "ExpectedInstructionCount": 257, + "ExpectedInstructionCount": 254, "x86Insts": [ "fstp st0", "fstp st3", @@ -8014,88 +6076,81 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8124,25 +6179,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8171,25 +6227,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8218,13 +6275,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8254,26 +6312,27 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x893", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0b4", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0b4", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block9": { - "ExpectedInstructionCount": 257, + "ExpectedInstructionCount": 254, "x86Insts": [ "fstp st0", "fstp st3", @@ -8303,88 +6362,81 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w22, w23, w22", - "orr w21, w21, w22", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8413,25 +6465,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8460,25 +6513,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8507,13 +6561,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8543,20 +6598,21 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "ldrb w22, [x28, #1298]", + "lsl w21, w21, w20", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x973", "movk w20, #0x1, lsl #16", - "mov w22, #0xd0b4", - "movk w22, #0x6, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd0b4", + "movk w21, #0x6, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json index 0310137a80..80af6ce0e4 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 34065, + "ExpectedInstructionCount": 25782, "x86Insts": [ "sub esp,0x118", "fld dword [ecx + 0x1084]", @@ -929,7 +929,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x118 (280)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4228]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -958,17 +957,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4104]", + "ldr s3, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -980,7 +969,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -993,11 +982,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1010,10 +997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1028,11 +1015,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1060,12 +1042,6 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1094,15 +1070,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4108]", + "ldr s3, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1114,7 +1082,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1127,11 +1095,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1144,10 +1110,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1162,11 +1128,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1193,13 +1155,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1228,15 +1184,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4112]", + "ldr s3, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1248,7 +1196,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1261,11 +1209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1278,10 +1224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1296,11 +1242,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1327,13 +1269,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1362,15 +1298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4116]", + "ldr s3, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1382,7 +1310,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1395,11 +1323,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1412,10 +1338,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1430,11 +1356,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1461,13 +1383,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4212]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1496,15 +1412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4120]", + "ldr s3, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,7 +1424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1529,11 +1437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1546,10 +1452,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1564,11 +1470,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1595,13 +1497,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1630,15 +1526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4124]", + "ldr s3, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1650,7 +1538,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1663,11 +1551,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1680,10 +1566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1698,11 +1584,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1729,13 +1611,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1764,15 +1640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4128]", + "ldr s3, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1784,7 +1652,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1797,11 +1665,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1814,10 +1680,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1832,11 +1698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1863,13 +1725,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1898,15 +1754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4132]", + "ldr s3, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1918,7 +1766,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1931,11 +1779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1948,10 +1794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1966,11 +1812,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1997,13 +1839,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2032,15 +1868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4136]", + "ldr s3, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2052,7 +1880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2065,11 +1893,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2082,10 +1908,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2100,11 +1926,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2131,13 +1953,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2166,15 +1982,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4140]", + "ldr s3, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2186,7 +1994,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2199,11 +2007,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2216,10 +2022,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2234,11 +2040,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2265,13 +2067,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2300,15 +2096,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4144]", + "ldr s3, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2320,7 +2108,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2333,11 +2121,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2350,10 +2136,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2368,11 +2154,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2399,13 +2181,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2434,15 +2210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4148]", + "ldr s3, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2454,7 +2222,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2467,11 +2235,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2484,10 +2250,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2502,11 +2268,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2533,13 +2295,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2568,15 +2324,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4152]", + "ldr s3, [x5, #4152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2604,8 +2438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2617,11 +2450,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2636,11 +2496,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2667,14 +2523,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4176]", + "str s2, [x20]", + "ldr s2, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2702,15 +2552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4156]", + "ldr s3, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2722,7 +2564,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2735,11 +2577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2752,10 +2592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2770,11 +2610,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2801,14 +2637,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4172]", + "str s2, [x20]", + "ldr s2, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2836,15 +2666,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4160]", + "ldr s3, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2856,7 +2678,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2869,11 +2691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2886,10 +2706,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2904,11 +2724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2935,14 +2751,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4168]", + "str s2, [x20]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2970,15 +2780,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4164]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2990,7 +2792,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3003,11 +2805,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3020,10 +2820,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3035,14 +2835,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mov w20, #0x0", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3055,8 +2853,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3068,15 +2866,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3088,7 +2880,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3101,31 +2893,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3137,7 +2908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3150,35 +2921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3191,10 +2936,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3206,31 +2951,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3243,8 +2968,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3256,15 +2981,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3276,7 +2995,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3289,30 +3008,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3324,7 +3023,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3337,35 +3036,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3378,10 +3051,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3393,31 +3066,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3430,8 +3083,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3443,15 +3096,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3463,7 +3110,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3476,30 +3123,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3511,7 +3138,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3524,35 +3151,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3565,10 +3166,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3580,31 +3181,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3617,8 +3197,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3630,15 +3210,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3650,7 +3224,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3663,18 +3237,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3686,7 +3252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3699,11 +3265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3716,10 +3280,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3731,14 +3295,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3751,8 +3311,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3764,15 +3324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3784,7 +3338,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3797,18 +3351,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3820,7 +3366,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3833,11 +3379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3850,10 +3394,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3865,14 +3409,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3885,8 +3425,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3898,15 +3438,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3918,7 +3452,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3931,18 +3465,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3954,7 +3480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3967,11 +3493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3984,10 +3508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3999,14 +3523,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4019,8 +3539,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4032,15 +3552,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4052,7 +3566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4065,18 +3579,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4088,7 +3594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4101,11 +3607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4118,10 +3622,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4133,14 +3637,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4153,8 +3653,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4166,15 +3666,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4186,10 +3680,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -4202,15 +3699,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "mov w21, #0xc1d0", + "movk w21, #0xb3, lsl #16", + "ldr s3, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4222,7 +3713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4235,11 +3726,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4252,11 +3741,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -4270,11 +3759,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4301,31 +3787,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4338,10 +3800,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4356,17 +3818,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0xc1d0", - "movk w24, #0xb3, lsl #16", - "ldr s2, [x24]", + "mov w22, #0xc1d4", + "movk w22, #0xb3, lsl #16", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4378,7 +3832,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4391,23 +3845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4420,10 +3860,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4438,28 +3878,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w23, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4486,19 +3905,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4511,10 +3918,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4529,17 +3936,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0xc1d4", - "movk w25, #0xb3, lsl #16", - "ldr s2, [x25]", + "mov w23, #0xc1d8", + "movk w23, #0xb3, lsl #16", + "ldr s3, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4551,7 +3950,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4564,11 +3963,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4581,10 +3978,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4599,11 +3996,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w24, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4630,19 +4023,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x24]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4654,13 +4036,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -4673,17 +4052,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0xc1d8", - "movk w12, #0xb3, lsl #16", - "ldr s2, [x12]", + "ldr s3, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4695,7 +4064,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4708,11 +4077,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w24, #0xc1dc", + "movk w24, #0xb3, lsl #16", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4724,11 +4124,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4743,11 +4170,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w25, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4774,14 +4197,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x25]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4809,15 +4226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4829,7 +4238,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4842,11 +4251,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4859,10 +4266,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4877,12 +4284,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0xc1dc", - "movk w13, #0xb3, lsl #16", - "ldr s2, [x13]", + "mov w25, #0xc1e0", + "movk w25, #0xb3, lsl #16", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4894,7 +4298,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4907,11 +4311,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4924,10 +4326,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4942,11 +4344,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w12, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4973,14 +4371,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "str s2, [x12]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5008,15 +4400,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s3, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5028,7 +4412,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5041,11 +4425,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5058,10 +4440,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5076,12 +4458,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0xc1e0", - "movk w14, #0xb3, lsl #16", - "ldr s2, [x14]", + "mov w12, #0xc1e4", + "movk w12, #0xb3, lsl #16", + "ldr s3, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5093,7 +4472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5106,11 +4485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5123,10 +4500,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5141,11 +4518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w13, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5172,14 +4545,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x13]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5207,15 +4574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5227,7 +4586,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5240,11 +4599,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5257,10 +4614,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5275,12 +4632,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w15, #0xc1e4", - "movk w15, #0xb3, lsl #16", - "ldr s2, [x15]", + "mov w13, #0xc1e8", + "movk w13, #0xb3, lsl #16", + "ldr s3, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5292,7 +4646,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5305,11 +4659,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5322,10 +4674,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5340,11 +4692,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w14, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5371,14 +4719,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "str s2, [x14]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5406,15 +4748,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5426,7 +4760,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5439,11 +4773,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5456,10 +4788,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5474,12 +4806,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w16, #0xc1e8", - "movk w16, #0xb3, lsl #16", - "ldr s2, [x16]", + "mov w14, #0xc1ec", + "movk w14, #0xb3, lsl #16", + "ldr s3, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5491,7 +4820,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5504,11 +4833,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5521,10 +4848,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5539,11 +4866,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5570,14 +4893,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x15]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5605,15 +4922,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5625,7 +4934,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5638,11 +4947,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5655,11 +4962,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -5670,15 +4977,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w17, #0xc1ec", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5690,7 +4992,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x8]", + "ldr s4, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5703,11 +5033,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5719,12 +5048,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -5735,14 +5091,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w15, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5755,8 +5108,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5768,15 +5121,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "fmov s6, s0", + "str s6, [x15]", + "ldr s6, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5788,7 +5135,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5801,30 +5148,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5836,7 +5163,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5849,35 +5176,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5890,10 +5191,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5905,31 +5206,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5942,8 +5223,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5955,15 +5236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s8, s0", + "str s8, [x15]", + "ldr s8, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5975,7 +5250,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5988,30 +5263,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6023,7 +5278,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6036,35 +5291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6077,10 +5306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6092,31 +5321,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w15, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6129,8 +5337,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6142,15 +5350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "fmov s8, s0", + "str s8, [x15]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6162,10 +5364,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6178,27 +5383,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "mov w15, #0xc1f0", + "movk w15, #0xb3, lsl #16", + "ldr s3, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6210,7 +5397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6223,35 +5410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6264,11 +5425,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6282,28 +5443,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6330,14 +5471,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x15]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6349,10 +5484,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6365,15 +5503,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "mov w15, #0xc1f4", + "movk w15, #0xb3, lsl #16", + "ldr s4, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6385,7 +5517,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6398,11 +5530,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6415,11 +5545,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6433,11 +5563,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w15, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6464,31 +5591,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x4 (4)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x5 (5)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6501,10 +5604,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6519,17 +5622,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f0", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "mov w15, #0xc1f8", + "movk w15, #0xb3, lsl #16", + "ldr s5, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6541,7 +5636,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6554,35 +5649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x6 (6)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6595,10 +5664,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6613,28 +5682,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x5 (5)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w15, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6661,31 +5710,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x15]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6697,13 +5723,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6716,17 +5739,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f4", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "ldr s6, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6738,7 +5751,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6751,35 +5764,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6792,11 +5779,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6810,28 +5797,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w15, #0xc1fc", + "movk w15, #0xb3, lsl #16", + "ldr s6, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6843,11 +5811,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6857,20 +5824,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6885,9 +5841,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -6901,17 +5857,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1f8", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6923,10 +5870,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6936,35 +5884,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6976,13 +5898,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -6995,28 +5914,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s7, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7028,11 +5926,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7042,15 +5939,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7062,10 +5953,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7075,18 +5969,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7098,10 +5985,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7111,11 +5999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7127,13 +6013,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7143,15 +6026,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w29, #0xc1fc", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7163,7 +6041,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7176,35 +6054,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7217,11 +6069,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -7232,31 +6084,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7269,8 +6100,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7282,15 +6113,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7302,7 +6127,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7315,30 +6140,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7350,7 +6155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7363,35 +6168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7404,10 +6183,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7419,31 +6198,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7456,8 +6214,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7469,15 +6227,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7489,7 +6241,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7502,18 +6254,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7525,7 +6269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7538,11 +6282,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7555,10 +6297,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7570,14 +6312,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7590,8 +6328,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7603,15 +6341,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "fmov s8, s0", + "str s8, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7623,10 +6354,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7639,15 +6373,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7659,10 +6384,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7675,8 +6403,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w16, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7689,12 +6416,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7704,14 +6429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7723,11 +6443,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7737,15 +6456,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s7, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7757,7 +6471,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7770,18 +6484,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7793,10 +6498,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -7809,8 +6517,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7823,11 +6529,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -7841,11 +6547,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7872,19 +6574,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x16]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7896,11 +6587,66 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s7, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7915,20 +6661,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x4 (4)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7941,10 +6673,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7959,11 +6691,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7990,14 +6718,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "str s2, [x16]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8025,15 +6747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "ldr s7, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8045,7 +6759,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8058,11 +6772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8075,10 +6787,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8093,15 +6805,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8114,8 +6817,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -8132,11 +6835,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8163,14 +6862,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "str s2, [x16]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8198,15 +6891,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8218,7 +6903,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8231,11 +6916,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8248,11 +6931,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -8263,18 +6946,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x3 (3)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8287,12 +6963,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8302,14 +6976,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s7, s0", + "str s7, [x16]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8321,11 +6990,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8335,15 +7003,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8355,7 +7018,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8368,18 +7031,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8391,10 +7045,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8404,11 +7061,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8421,8 +7077,36 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x16]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -8439,15 +7123,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w16, #0xc200", + "movk w16, #0xb3, lsl #16", + "ldr s6, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8459,11 +7137,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8478,16 +7183,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8514,14 +7211,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x16]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8549,27 +7240,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8581,10 +7251,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8597,32 +7270,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w16, #0xc204", + "movk w16, #0xb3, lsl #16", + "ldr s7, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8634,13 +7284,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8650,31 +7297,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8689,8 +7314,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8700,15 +7327,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8720,10 +7343,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8733,30 +7357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8784,8 +7387,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8797,13 +7399,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8813,14 +7412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8835,8 +7429,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8846,32 +7442,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8884,12 +7458,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8899,20 +7471,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc200", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8924,7 +7485,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8937,35 +7498,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x3 (3)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8977,13 +7513,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -8993,31 +7526,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9030,10 +7541,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9043,15 +7556,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9063,10 +7571,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9076,11 +7585,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9092,13 +7599,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9108,15 +7612,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc204", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9128,10 +7626,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9144,32 +7645,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9182,10 +7657,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9200,28 +7675,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9248,14 +7702,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x16]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9283,27 +7731,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s8, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9315,7 +7743,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9328,11 +7756,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9345,11 +7771,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -9363,11 +7789,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9382,8 +7803,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9393,15 +7816,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9413,10 +7831,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9426,18 +7845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9465,8 +7875,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9478,13 +7887,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9494,14 +7900,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9516,8 +7917,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9527,15 +7930,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9547,10 +7945,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9560,11 +7959,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9576,13 +7973,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9592,18 +7986,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9615,13 +8001,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9631,14 +8014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9651,10 +8029,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9664,15 +8044,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9684,10 +8059,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9697,18 +8073,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9720,7 +8087,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9733,11 +8100,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9750,8 +8115,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -9768,15 +8133,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9789,10 +8145,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9807,11 +8163,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9838,14 +8190,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "str s2, [x16]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9873,27 +8219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s8, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9905,7 +8231,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9918,11 +8244,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9935,11 +8259,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -9953,11 +8277,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9972,8 +8291,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -9983,15 +8304,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10003,10 +8319,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10016,18 +8333,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10055,8 +8363,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10068,13 +8375,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10084,14 +8388,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10106,8 +8405,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10117,15 +8418,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10137,10 +8433,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10150,11 +8447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10166,13 +8461,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10182,18 +8474,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10205,13 +8489,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10221,14 +8502,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10241,10 +8517,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10254,15 +8532,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w16, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10274,10 +8547,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10287,18 +8561,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s8, s0", + "str s8, [x16]", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10310,7 +8575,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10323,11 +8588,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10340,8 +8603,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", @@ -10358,15 +8621,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10379,10 +8633,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10397,11 +8651,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10428,14 +8678,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x16]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10463,27 +8707,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10495,7 +8719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10508,11 +8732,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10525,11 +8777,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -10543,11 +8795,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10574,14 +8822,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x16]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10609,15 +8851,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10629,7 +8863,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10642,11 +8876,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10659,10 +8891,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10674,14 +8906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10694,8 +8921,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10707,15 +8934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10727,7 +8948,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10740,11 +8961,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10757,10 +8976,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10775,15 +8994,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w16, #0xc208", + "movk w16, #0xb3, lsl #16", + "ldr s8, [x16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10795,11 +9008,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10814,11 +9054,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w16, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10845,14 +9082,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "str s2, [x16]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10880,15 +9111,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "ldr s9, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w16, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10916,8 +9225,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10929,11 +9237,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10948,15 +9283,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10969,10 +9295,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10987,11 +9313,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11018,14 +9340,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x16]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11053,27 +9369,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s9, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11085,7 +9381,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11098,11 +9394,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11115,10 +9409,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11133,11 +9427,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11164,14 +9454,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x16]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11199,8 +9483,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11212,13 +9495,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -11228,15 +9508,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w30, #0xc208", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11248,10 +9522,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -11264,32 +9541,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x0 (0)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x2 (2)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11302,10 +9553,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11320,28 +9571,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11368,14 +9598,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x16]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11403,15 +9627,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11423,7 +9639,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11436,11 +9652,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11453,10 +9667,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11471,11 +9685,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11502,14 +9712,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x16]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11537,15 +9741,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr s9, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11557,7 +9753,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11570,11 +9766,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11587,10 +9781,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11605,15 +9799,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11626,10 +9811,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11644,11 +9829,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11675,14 +9856,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x16]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11710,15 +9885,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s9, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11730,7 +9897,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11743,11 +9910,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11760,10 +9925,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11778,11 +9943,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11809,14 +9970,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x16]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11844,15 +9999,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11864,7 +10011,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11877,11 +10024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11894,10 +10039,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11912,15 +10057,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11933,10 +10069,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11951,11 +10087,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11982,14 +10114,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "str s2, [x16]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12017,15 +10143,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s9, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12037,7 +10155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12050,11 +10168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12067,10 +10183,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12085,11 +10201,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12116,14 +10228,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "str s2, [x16]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12151,15 +10257,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12171,7 +10269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12184,11 +10282,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12201,10 +10297,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12219,15 +10315,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12240,10 +10327,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12258,11 +10345,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12289,14 +10372,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "str s2, [x16]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12324,15 +10401,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldr s9, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12344,7 +10413,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12357,11 +10426,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12374,10 +10441,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12392,11 +10459,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12423,14 +10486,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "str s2, [x16]", + "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12458,15 +10515,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "ldr s9, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12478,7 +10527,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12491,11 +10540,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12508,10 +10555,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12526,15 +10573,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12547,10 +10585,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12565,11 +10603,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12596,14 +10630,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "str s2, [x16]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12631,15 +10659,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "ldr s9, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12651,7 +10671,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12664,11 +10684,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12681,10 +10699,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12699,11 +10717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12730,14 +10744,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "str s2, [x16]", + "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12765,15 +10773,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12785,7 +10785,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12798,11 +10798,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12815,10 +10813,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12833,15 +10831,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12854,10 +10843,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12872,11 +10861,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12903,14 +10888,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "str s2, [x16]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12935,18 +10914,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w16, w8, #0xc0 (192)", + "str s2, [x16]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12974,8 +10947,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12988,8 +10959,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -13006,11 +10977,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w16, w8, #0xa0 (160)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13037,14 +11004,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "str s2, [x16]", + "ldr s2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13072,15 +11033,39 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "mov w16, #0x8000", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13108,8 +11093,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13121,13 +11105,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13137,18 +11118,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13161,11 +11133,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -13179,11 +11151,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xdc (220)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13210,14 +11178,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "str s2, [x17]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13245,15 +11207,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13265,7 +11222,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13278,11 +11235,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13294,12 +11280,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -13313,11 +11326,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xfc (252)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13344,14 +11353,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "str s2, [x17]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13376,18 +11379,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w17, w8, #0xc8 (200)", + "str s2, [x17]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13415,8 +11412,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13429,11 +11424,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -13447,15 +11442,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w17, w8, #0xb8 (184)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13468,12 +11455,37 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13486,11 +11498,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13502,11 +11510,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13516,15 +11523,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13536,10 +11537,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13552,16 +11556,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xa8 (168)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13588,9 +11583,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #192]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x17]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13618,8 +11612,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13631,11 +11624,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13650,11 +11670,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13666,11 +11682,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13680,15 +11695,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #160]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13700,10 +11709,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13716,25 +11728,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w30, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x98 (152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13761,14 +11755,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "str s2, [x17]", + "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13796,15 +11784,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13816,10 +11799,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13829,11 +11813,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13845,13 +11827,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13864,11 +11843,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13880,11 +11855,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13894,15 +11868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #220]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13914,10 +11882,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13930,23 +11901,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "add w17, w8, #0xd4 (212)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13958,10 +11913,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -13971,11 +11927,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13987,13 +11941,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14006,10 +11957,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "ldr s9, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14021,7 +11972,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14034,11 +11985,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14051,10 +12000,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14069,11 +12018,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x110 (272)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14088,7 +12033,7 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", + "ldr x3, [x28, #1448]", "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14099,15 +12044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #252]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "mov v9.8b, v0.8b", + "str d9, [x17]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14119,7 +12058,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14132,19 +12071,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14159,8 +12088,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14170,10 +12101,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14185,7 +12116,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14198,11 +12129,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14215,11 +12144,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14233,11 +12162,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14264,14 +12189,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #184]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", + "str s2, [x17]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14299,15 +12218,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14319,7 +12230,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14332,11 +12243,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14349,11 +12258,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14367,11 +12276,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xe4 (228)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14398,14 +12303,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #168]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x17]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14433,15 +12332,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr d9, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14453,9 +12344,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v9.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14466,11 +12357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14483,11 +12372,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14501,10 +12390,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s9, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14516,7 +12402,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14529,11 +12415,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14546,11 +12430,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14564,11 +12448,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x104 (260)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14595,14 +12475,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #152]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", + "str s2, [x17]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14630,24 +12504,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14659,11 +12516,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14673,15 +12529,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14693,10 +12543,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14709,15 +12562,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "add w17, w8, #0xf4 (244)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14729,10 +12574,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14742,11 +12588,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14758,13 +12602,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -14777,11 +12618,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v2.16b, v2.16b, v9.16b", + "add w17, w8, #0x10c (268)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14808,14 +12648,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #212]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x17]", + "ldr s2, [x8, #4]", + "add w17, w8, #0x90 (144)", + "str s2, [x17]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14840,26 +12677,15 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w17, w8, #0xb0 (176)", + "str s2, [x17]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v9.16b, v2.16b", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14871,7 +12697,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14884,11 +12710,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14901,10 +12725,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14919,11 +12743,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xec (236)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14938,7 +12758,7 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", + "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -14949,10 +12769,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #272]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14980,8 +12799,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x5, #4228]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14993,11 +12811,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15012,10 +12857,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "mov w17, #0xc190", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15027,7 +12871,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15040,11 +12884,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15057,11 +12899,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15075,11 +12917,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15106,14 +12943,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x8]", + "ldr s2, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15141,15 +12972,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15161,7 +12984,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15174,11 +12997,42 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "mov w17, #0xc194", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15190,12 +13044,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15209,11 +13090,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15240,14 +13117,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #228]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "str s2, [x17]", + "ldr s2, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15275,15 +13146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #272]", + "ldr s9, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15295,9 +13158,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15308,11 +13171,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15327,8 +13188,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15343,10 +13204,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "mov w17, #0xc198", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15358,7 +13218,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15371,11 +13231,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15388,11 +13246,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -15406,11 +13264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15437,14 +13291,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #260]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x17]", + "ldr s2, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15472,15 +13320,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s9, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15492,7 +13332,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15505,11 +13345,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15522,10 +13360,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15540,11 +13378,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w17, #0xc19c", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15556,11 +13392,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -15570,15 +13405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #244]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15590,10 +13419,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -15606,24 +13438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15650,14 +13465,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #268]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "str s2, [x17]", + "ldr s2, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15685,16 +13494,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x5, #4212]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15709,8 +13536,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -15720,15 +13549,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #144]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w17, #0xc1a0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15740,7 +13566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15753,19 +13579,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15792,17 +13639,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #176]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x17]", + "ldr s2, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15830,8 +13668,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15843,11 +13680,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15862,11 +13726,67 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w17, #0xc1a4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w17, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15893,14 +13813,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #236]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4104]", + "str s2, [x17]", + "ldr s2, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15928,15 +13842,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4228]", + "ldr s9, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15948,7 +13854,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15961,11 +13867,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15978,10 +13882,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15996,12 +13900,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc190", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1a8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16013,7 +13914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16026,11 +13927,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16043,10 +13942,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16061,11 +13960,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16092,14 +13987,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4108]", + "str s2, [x17]", + "ldr s2, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16127,15 +14016,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4224]", + "ldr s9, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16147,7 +14028,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16160,11 +14041,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16177,10 +14056,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16195,12 +14074,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc194", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1ac", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16212,7 +14088,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16225,11 +14101,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16242,10 +14116,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16260,11 +14134,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16291,14 +14161,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4112]", + "str s2, [x17]", + "ldr s2, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16326,15 +14190,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4220]", + "ldr s9, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16346,7 +14202,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16359,11 +14215,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16376,10 +14230,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16394,12 +14248,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc198", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16411,7 +14262,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16424,11 +14275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16441,10 +14290,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16459,11 +14308,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16490,14 +14335,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4116]", + "str s2, [x17]", + "ldr s2, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16525,15 +14364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4216]", + "ldr s9, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16545,7 +14376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16558,11 +14389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16575,10 +14404,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16593,12 +14422,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc19c", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16610,7 +14436,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16623,11 +14449,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16640,10 +14464,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16658,11 +14482,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16689,14 +14509,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4120]", + "str s2, [x17]", + "ldr s2, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16724,15 +14538,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4212]", + "ldr s9, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16744,7 +14550,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16757,11 +14563,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16774,10 +14578,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16792,12 +14596,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1b8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16809,7 +14610,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16822,11 +14623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16839,10 +14638,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -16857,11 +14656,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16888,14 +14683,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4124]", + "str s2, [x17]", + "ldr s2, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16923,15 +14712,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4208]", + "ldr s9, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16943,7 +14724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16956,11 +14737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16973,10 +14752,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16991,12 +14770,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1bc", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17008,7 +14784,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17021,11 +14797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17038,10 +14812,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17056,11 +14830,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17087,14 +14857,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4128]", + "str s2, [x17]", + "ldr s2, [x5, #4152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17122,15 +14886,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4204]", + "ldr s9, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17142,7 +14898,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17155,11 +14911,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17172,10 +14926,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17190,12 +14944,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1a8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c0", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17207,7 +14958,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17220,11 +14971,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17237,10 +14986,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17255,11 +15004,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17286,14 +15031,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4132]", + "str s2, [x17]", + "ldr s2, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17321,15 +15060,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4200]", + "ldr s9, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17341,7 +15072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17354,11 +15085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17371,10 +15100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17389,12 +15118,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1ac", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c4", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17406,7 +15132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17419,11 +15145,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17436,10 +15160,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17454,11 +15178,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17485,14 +15205,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4136]", + "str s2, [x17]", + "ldr s2, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17520,15 +15234,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4196]", + "ldr s9, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17540,7 +15246,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17553,11 +15259,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17570,10 +15274,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17588,12 +15292,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1c8", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17605,7 +15306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17618,11 +15319,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17635,10 +15334,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17653,11 +15352,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17684,14 +15379,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4140]", + "str s2, [x17]", + "ldr s2, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17719,15 +15408,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4192]", + "ldr s9, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17739,7 +15420,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17752,11 +15433,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17769,10 +15448,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17787,12 +15466,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "mov w17, #0xc1cc", + "movk w17, #0xb3, lsl #16", + "ldr s9, [x17]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17804,7 +15480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17817,11 +15493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17834,10 +15508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -17852,11 +15526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17883,14 +15553,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4144]", + "str s2, [x17]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17918,15 +15582,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4188]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17938,7 +15594,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17951,11 +15607,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17968,11 +15622,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -17986,12 +15640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1b8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "add w17, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18003,10 +15652,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18016,11 +15666,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18032,13 +15680,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18051,11 +15696,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18067,11 +15708,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18081,15 +15721,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4148]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18101,10 +15735,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18117,15 +15754,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4184]", + "add w17, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18137,10 +15766,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18150,11 +15780,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18166,13 +15794,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18185,12 +15810,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1bc", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18202,7 +15822,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18215,11 +15835,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18232,11 +15850,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18250,11 +15868,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18281,14 +15895,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4152]", + "str s2, [x17]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18316,15 +15924,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4180]", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18336,7 +15936,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18349,11 +15949,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18366,11 +15964,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18384,12 +15982,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c0", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "add w17, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18401,10 +15994,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18414,11 +16008,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18430,13 +16022,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18449,11 +16038,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18465,11 +16050,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18479,15 +16063,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4156]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18499,10 +16077,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18515,15 +16096,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4176]", + "add w17, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18535,10 +16108,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18548,11 +16122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18564,13 +16136,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18583,12 +16152,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c4", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18600,7 +16164,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18613,11 +16177,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18630,11 +16192,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18648,11 +16210,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w17, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18679,14 +16237,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4160]", + "str s2, [x17]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18714,15 +16266,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4172]", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18734,7 +16278,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18747,11 +16291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18764,11 +16306,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -18782,12 +16324,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1c8", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "add w17, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18799,10 +16336,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18812,11 +16350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18828,13 +16364,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18847,11 +16380,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18863,11 +16392,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18877,15 +16405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4164]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18897,10 +16419,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18913,15 +16438,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4168]", + "add w17, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18933,10 +16450,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18946,11 +16464,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x17]", + "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18962,13 +16478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -18981,12 +16494,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w19, #0xc1cc", - "movk w19, #0xb3, lsl #16", - "ldr s2, [x19]", + "ldr s9, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18998,7 +16506,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19011,11 +16519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19028,11 +16534,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19046,11 +16552,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19062,11 +16564,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19076,15 +16577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19096,10 +16591,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19112,15 +16610,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19132,10 +16622,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19145,11 +16636,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19161,13 +16650,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19180,11 +16666,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19196,11 +16678,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19210,15 +16691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19230,10 +16705,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19246,15 +16724,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s9, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19266,7 +16736,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19279,11 +16749,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19296,11 +16764,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19314,11 +16782,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19345,49 +16809,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19416,8 +16838,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19429,13 +16850,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19445,14 +16863,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19467,8 +16880,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19478,15 +16893,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s9, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19498,7 +16908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19511,18 +16921,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19534,10 +16935,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19550,8 +16954,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19564,12 +16967,37 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19582,11 +17010,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19598,11 +17022,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19612,15 +17035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19632,10 +17049,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19648,15 +17068,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s9, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19668,7 +17080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19681,11 +17093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19698,11 +17108,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19716,11 +17126,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19747,14 +17153,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "str s2, [x21]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19782,15 +17182,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s9, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19802,7 +17194,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19815,11 +17207,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19832,11 +17222,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -19850,11 +17240,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19866,11 +17252,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19880,15 +17265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19900,10 +17279,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19916,15 +17298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19936,10 +17310,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19949,11 +17324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19965,13 +17338,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -19984,11 +17354,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20000,11 +17366,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20014,15 +17379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20034,10 +17393,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20050,15 +17412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldr s9, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20070,7 +17424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20083,11 +17437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20100,11 +17452,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -20118,11 +17470,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20149,14 +17497,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "str s2, [x21]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20184,15 +17526,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w21, w20", - "orr w22, w22, w19", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "ldr s9, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20204,7 +17538,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20217,11 +17551,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20234,10 +17566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20252,10 +17584,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", + "ldr s9, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20267,7 +17596,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20280,11 +17609,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20297,10 +17624,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20315,11 +17642,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20346,14 +17669,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "str s2, [x21]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20381,15 +17698,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "ldr s9, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20401,7 +17710,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20414,11 +17723,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20431,10 +17738,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20449,10 +17756,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s9, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20464,7 +17768,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20477,11 +17781,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20494,10 +17796,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20512,11 +17814,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20543,14 +17841,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20578,15 +17870,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20598,7 +17882,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20611,11 +17895,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20628,11 +17910,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -20646,10 +17928,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20661,10 +17939,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20674,11 +17953,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x8]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20690,13 +17967,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20709,11 +17983,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20725,11 +17995,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20739,15 +18008,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20759,10 +18022,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20775,15 +18041,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20795,10 +18053,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20808,11 +18067,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20824,13 +18081,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -20843,10 +18097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s9, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20858,7 +18109,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20871,11 +18122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20888,11 +18137,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -20906,11 +18155,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20937,14 +18182,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "str s2, [x21]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20972,15 +18211,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s9, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20992,7 +18223,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21005,11 +18236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21022,11 +18251,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -21040,10 +18269,35 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "add w21, w8, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21071,8 +18325,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21084,13 +18337,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21100,14 +18350,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21122,8 +18367,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21133,15 +18380,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21153,10 +18394,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21169,15 +18413,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21189,10 +18425,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21202,11 +18439,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21218,13 +18453,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21237,10 +18469,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x15]", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21252,7 +18481,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21265,11 +18494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21282,11 +18509,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -21300,11 +18527,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21319,8 +18541,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21330,15 +18554,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21350,10 +18569,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21363,18 +18583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21402,8 +18613,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21415,13 +18625,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21431,13 +18638,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x16]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21449,10 +18652,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -21465,8 +18671,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21479,10 +18683,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21497,11 +18701,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21528,14 +18728,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x21]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21563,15 +18757,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s9, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21583,7 +18769,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21596,11 +18782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21613,10 +18797,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21631,10 +18815,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x17]", + "ldr s9, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21646,7 +18827,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21659,11 +18840,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21676,10 +18855,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21694,11 +18873,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21725,14 +18900,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "str s2, [x21]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21760,15 +18929,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s9, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21780,7 +18941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21793,11 +18954,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21810,10 +18969,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21828,11 +18987,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21859,14 +19014,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "str s2, [x21]", + "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21894,15 +19043,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s9, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21914,7 +19055,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21927,11 +19068,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21944,10 +19083,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21962,11 +19101,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21993,14 +19128,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x21]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22028,15 +19157,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s9, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22064,8 +19271,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s9, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22077,11 +19283,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22096,11 +19329,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22127,14 +19356,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x21]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22162,15 +19385,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr s9, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22182,7 +19397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22195,11 +19410,39 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22216,7 +19459,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -22230,11 +19473,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22261,14 +19501,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x21]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22296,15 +19530,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22316,7 +19542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22329,11 +19555,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22346,10 +19570,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22364,15 +19588,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22385,8 +19600,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -22403,11 +19618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22434,14 +19646,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x21]", + "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22469,15 +19675,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldr s3, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22489,7 +19687,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22502,11 +19700,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22519,10 +19715,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22537,15 +19733,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22558,8 +19745,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -22576,11 +19763,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22607,14 +19791,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x21]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22642,15 +19820,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22662,7 +19832,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22675,11 +19845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22692,10 +19860,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22710,15 +19878,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22730,11 +19890,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -22749,11 +19936,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22780,14 +19963,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x21]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22815,15 +19992,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22835,7 +20004,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22848,11 +20017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22865,11 +20032,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -22880,13 +20047,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x29]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22898,10 +20063,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -22911,11 +20077,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22927,13 +20091,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -22943,14 +20104,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22962,11 +20119,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -22976,15 +20132,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22996,10 +20146,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23009,18 +20162,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23032,10 +20177,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23045,11 +20191,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23066,7 +20210,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -23080,11 +20224,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23099,8 +20238,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23110,15 +20251,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23130,10 +20267,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23143,18 +20281,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23182,8 +20311,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23196,11 +20323,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -23214,11 +20341,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23233,8 +20355,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23244,15 +20368,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23264,10 +20383,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23277,18 +20397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23316,8 +20427,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23329,13 +20439,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23345,14 +20452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23367,8 +20469,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23378,15 +20482,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23398,10 +20498,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23411,18 +20512,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23434,7 +20526,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23447,46 +20539,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23498,11 +20554,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23512,15 +20567,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23532,10 +20581,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23545,18 +20597,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23568,10 +20612,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -23581,11 +20626,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23616,15 +20659,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23637,10 +20671,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -23655,28 +20689,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23703,50 +20717,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "str s2, [x21]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23774,8 +20746,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23788,10 +20758,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23806,15 +20776,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23827,10 +20788,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -23845,28 +20806,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23893,14 +20833,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "str s2, [x21]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23928,15 +20862,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23948,7 +20874,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23961,11 +20887,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23978,11 +20902,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -23993,18 +20917,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24017,12 +20934,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24032,31 +20947,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24068,11 +20961,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24082,15 +20974,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24102,7 +20989,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24115,18 +21002,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24138,10 +21016,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24151,11 +21032,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24168,12 +21048,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24183,13 +21061,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x29]", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24201,10 +21075,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24217,8 +21094,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24231,10 +21106,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -24249,11 +21124,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24280,14 +21152,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x21]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24315,27 +21181,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24347,10 +21192,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24363,32 +21211,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24401,11 +21223,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -24419,28 +21241,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24467,14 +21268,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24502,27 +21297,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24534,7 +21309,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24547,11 +21322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24564,10 +21337,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24579,14 +21352,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24599,8 +21369,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24612,32 +21382,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24649,13 +21396,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24665,35 +21409,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24705,13 +21424,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24721,31 +21437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24758,10 +21452,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24771,15 +21467,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24791,10 +21482,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24804,11 +21496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24821,10 +21511,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24839,15 +21529,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24860,8 +21542,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -24878,11 +21560,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24909,14 +21588,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "str s2, [x21]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24944,27 +21617,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24976,10 +21628,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -24992,32 +21647,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25030,11 +21659,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25048,28 +21677,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25096,14 +21704,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "str s2, [x21]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25131,27 +21733,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25163,7 +21745,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25176,11 +21758,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25193,10 +21773,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25208,14 +21788,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25228,8 +21804,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25241,32 +21817,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25297,32 +21849,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25335,10 +21861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25353,28 +21879,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25401,14 +21906,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x21]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25436,8 +21935,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25449,13 +21947,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -25465,18 +21960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25489,11 +21975,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25504,14 +21990,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25524,8 +22007,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25537,63 +22020,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25605,10 +22033,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -25621,32 +22052,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25659,11 +22064,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -25677,28 +22082,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25725,14 +22109,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "str s2, [x21]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25760,27 +22138,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25792,7 +22150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25805,11 +22163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25822,10 +22178,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25837,14 +22193,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25857,8 +22210,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25870,32 +22223,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25926,32 +22255,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25964,10 +22267,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25982,28 +22285,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26030,14 +22312,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "str s2, [x21]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26065,8 +22341,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26083,7 +22385,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26094,18 +22396,38 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26122,7 +22444,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26136,11 +22458,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26155,8 +22472,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26166,15 +22485,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26186,10 +22500,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26199,30 +22514,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26250,32 +22544,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26287,13 +22556,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26303,31 +22569,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26342,8 +22586,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26353,15 +22599,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26373,10 +22615,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26386,30 +22629,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26421,10 +22642,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26437,8 +22661,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26451,11 +22673,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -26469,11 +22691,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26500,31 +22718,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", + "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26536,13 +22731,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26555,32 +22747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26592,13 +22759,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26608,31 +22772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26647,8 +22789,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26658,15 +22802,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26678,10 +22818,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -26691,23 +22832,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26738,20 +22864,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26764,10 +22876,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -26782,16 +22894,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26818,14 +22921,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x21]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26853,27 +22950,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldr s3, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26885,7 +22962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26898,35 +22975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26939,10 +22990,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26954,31 +23005,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26991,8 +23022,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27004,20 +23035,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27048,20 +23067,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27074,10 +23079,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -27092,11 +23097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27123,14 +23124,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x21]", + "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27158,27 +23153,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s3, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27190,7 +23165,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27203,35 +23178,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27244,10 +23193,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27259,31 +23208,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27296,8 +23225,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27309,20 +23238,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27353,20 +23270,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27379,8 +23282,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -27397,11 +23300,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27428,14 +23327,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x21]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27463,27 +23356,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "ldr s3, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27495,7 +23368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27508,35 +23381,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27549,10 +23396,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27564,31 +23411,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27601,8 +23428,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27614,20 +23441,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27639,13 +23455,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27655,23 +23468,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27683,13 +23483,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27699,14 +23496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27719,10 +23511,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27732,15 +23526,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0xbc (188)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27752,10 +23542,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27765,30 +23556,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27800,7 +23570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27813,35 +23583,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27853,13 +23598,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27869,31 +23611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27906,10 +23626,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27919,20 +23641,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27944,13 +23656,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -27960,23 +23669,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27989,11 +23684,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -28004,14 +23699,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0xa4 (164)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28024,8 +23716,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28037,15 +23729,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28057,10 +23742,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28070,30 +23758,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28105,7 +23773,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28118,35 +23786,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28159,10 +23801,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28174,31 +23816,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xb4 (180)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28211,8 +23832,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28224,20 +23845,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28249,13 +23859,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28265,23 +23872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28294,11 +23887,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -28309,14 +23902,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xac (172)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28329,8 +23918,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28342,15 +23931,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28362,10 +23944,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28375,30 +23960,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28410,7 +23975,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28423,35 +23988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28464,10 +24003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28479,31 +24018,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28516,8 +24034,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28529,20 +24047,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28554,13 +24061,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28570,23 +24074,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28598,13 +24089,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28614,14 +24102,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28634,10 +24117,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28647,15 +24132,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x94 (148)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28667,10 +24147,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28680,30 +24161,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28715,7 +24175,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28728,35 +24188,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d8, x20", + "mov v8.d[1], x16", + "eor v6.16b, v6.16b, v8.16b", + "add w21, w8, #0x110 (272)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28769,12 +24207,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28784,31 +24220,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28820,11 +24234,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28834,20 +24247,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28859,13 +24262,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -28875,23 +24275,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28904,11 +24290,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -28919,14 +24305,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28939,8 +24322,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28952,15 +24335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28972,7 +24349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28985,30 +24362,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29020,7 +24377,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29033,35 +24390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29074,10 +24405,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29089,31 +24420,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29126,10 +24435,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29139,20 +24450,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x9c (156)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29165,12 +24466,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29180,23 +24479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29208,13 +24493,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29224,19 +24506,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v6.16b, v6.16b, v9.16b", + "add w21, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29249,8 +24525,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29262,15 +24538,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29282,7 +24552,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29295,30 +24565,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s9, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29330,7 +24580,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29343,35 +24593,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29384,11 +24608,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29399,31 +24623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29436,10 +24638,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29449,15 +24653,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0xd8 (216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29469,10 +24668,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29482,30 +24682,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29517,7 +24696,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29530,35 +24709,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x16", + "eor v6.16b, v6.16b, v9.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29571,11 +24727,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29586,65 +24742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #188]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29656,10 +24756,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29669,18 +24772,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29692,10 +24786,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29705,11 +24802,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29722,12 +24819,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29737,13 +24832,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29755,7 +24846,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29768,35 +24859,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29809,11 +24874,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29824,31 +24889,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29860,11 +24904,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -29874,32 +24917,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #164]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29912,11 +24932,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29927,13 +24947,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29945,7 +24962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29958,11 +24975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29975,11 +24990,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -29990,14 +25005,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xe8 (232)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30010,8 +25021,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30023,15 +25034,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #180]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30043,7 +25048,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30056,23 +25061,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30085,11 +25076,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30100,14 +25091,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30119,11 +25106,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30133,32 +25119,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #172]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30171,11 +25134,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30186,13 +25149,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30204,10 +25163,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30217,11 +25179,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0xe0 (224)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30234,12 +25196,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30249,14 +25209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30268,11 +25223,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30282,15 +25236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30302,10 +25250,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30315,18 +25266,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30338,7 +25281,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30351,11 +25294,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30368,11 +25309,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30383,14 +25324,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30402,11 +25339,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30416,15 +25352,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #148]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30436,10 +25366,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30449,27 +25382,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0xf0 (240)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30482,8 +25398,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30495,15 +25411,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #272]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #272]", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30515,7 +25425,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30528,18 +25438,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30551,7 +25453,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30564,35 +25466,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30605,11 +25481,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30620,31 +25496,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30657,10 +25511,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30670,15 +25526,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x5, #4100]", + "ldr w6, [x5, #4096]", + "strb wzr, [x28, #1017]", + "add w4, w6, w4, lsl #2", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30690,10 +25545,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30703,18 +25559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30726,7 +25573,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30739,11 +25586,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30756,11 +25601,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -30771,18 +25616,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0xf8 (248)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30795,12 +25633,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30810,14 +25646,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30829,11 +25660,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30843,15 +25673,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #156]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d7, x20", + "mov v7.d[1], x16", + "eor v5.16b, v5.16b, v7.16b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30863,10 +25690,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30876,27 +25706,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30909,10 +25722,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30922,15 +25737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30942,10 +25751,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30955,18 +25767,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30978,10 +25782,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -30991,11 +25796,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31007,13 +25810,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31023,18 +25823,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31046,13 +25838,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31062,14 +25851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31082,10 +25866,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31095,15 +25881,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #216]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x108 (264)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31115,10 +25896,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31128,31 +25910,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31165,10 +25924,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31180,35 +25939,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x100 (256)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31221,12 +25956,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31236,35 +25969,23 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #144]", + "str s3, [x4]", + "ldr s3, [x8, #148]", + "add w21, w4, #0x40 (64)", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "add w21, w4, #0x80 (128)", + "str s3, [x21]", + "ldr s3, [x8, #156]", + "add w21, w4, #0xc0 (192)", + "str s3, [x21]", + "ldr s3, [x8, #160]", + "add w21, w4, #0x100 (256)", + "str s3, [x21]", + "ldr s3, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31276,13 +25997,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31292,31 +26010,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x140 (320)", + "str s3, [x21]", + "ldr s3, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31328,11 +26027,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31342,15 +26040,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w4, #0x180 (384)", + "str s3, [x21]", + "ldr s3, [x8, #172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31362,7 +26057,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31375,35 +26070,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w4, #0x1c0 (448)", + "str s3, [x21]", + "ldr s3, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31415,13 +26087,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31431,18 +26100,15 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w4, #0x200 (512)", + "str s3, [x21]", + "ldr s3, [x8, #180]", + "add w21, w4, #0x240 (576)", + "str s3, [x21]", + "ldr s3, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31454,7 +26120,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31467,23 +26133,19 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w4, #0x280 (640)", + "str s3, [x21]", + "ldr s3, [x8, #188]", + "add w21, w4, #0x2c0 (704)", + "str s3, [x21]", + "ldr s3, [x8, #192]", + "add w21, w4, #0x300 (768)", + "str s3, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x340 (832)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31496,12 +26158,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31511,13 +26171,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #200]", + "add w21, w4, #0x380 (896)", + "str s3, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x3c0 (960)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31529,10 +26189,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31542,11 +26203,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "movi v3.2d, #0x0", + "add w21, w4, #0x400 (1024)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31561,10 +26221,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31574,14 +26232,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x21]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x440 (1088)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31608,14 +26264,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #232]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "str s2, [x21]", + "ldr s2, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31643,20 +26293,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x480 (1152)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31671,10 +26311,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31684,18 +26322,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s2, s0", + "str s2, [x21]", + "strb wzr, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v4.16b, v2.16b", + "add w21, w4, #0x4c0 (1216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31707,10 +26340,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31720,23 +26354,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31748,69 +26368,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31823,28 +26384,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x500 (1280)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31871,14 +26414,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #224]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "str s2, [x21]", + "ldr s2, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31906,32 +26443,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x540 (1344)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31946,46 +26461,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -31995,23 +26472,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "strb wzr, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v9.16b, v2.16b", + "add w21, w4, #0x580 (1408)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32026,10 +26493,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -32039,13 +26504,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32073,43 +26534,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x16", + "eor v2.16b, v2.16b, v3.16b", + "add w21, w4, #0x5c0 (1472)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32136,173 +26564,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #240]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x5, #4100]", - "ldr w6, [x5, #4096]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "add w4, w6, w4, lsl #2", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v8.16b, v2.16b", + "add w21, w4, #0x600 (1536)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32329,67 +26596,12 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", + "strb wzr, [x28, #1017]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v7.16b, v2.16b", + "add w21, w4, #0x640 (1600)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32404,10 +26616,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -32417,31 +26627,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v6.16b, v2.16b", + "add w21, w4, #0x680 (1664)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32468,63 +26660,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #248]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x21]", + "fmov d2, x20", + "mov v2.d[1], x16", + "eor v2.16b, v5.16b, v2.16b", + "add w20, w4, #0x6c0 (1728)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32537,524 +26677,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #264]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #256]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -33065,48316 +26691,27680 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #192]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #256]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #164]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #320]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #384]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #172]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #448]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #512]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #576]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #640]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #704]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #768]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #832]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #896]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #960]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1024]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1088]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1152]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1216]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1280]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #188]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1344]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1408]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1472]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1536]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1600]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1664]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x30", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1728]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1792]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1856]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1920]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #272]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #1984]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w20, [x5, #4096]", - "eor w27, w20, w5", - "subs w26, w20, w5", - "cfinv", - "add w4, w5, #0x800 (2048)", - "strb w21, [x28, #1298]" - ] - }, - "Block2": { - "ExpectedInstructionCount": 22089, - "x86Insts": [ - "mov eax,dword [ebp + 0x8]", - "fld dword [eax + 0x40]", - "fld dword [eax + 0x44]", - "fadd st0,st1", - "fstp dword [eax + 0x44]", - "fld dword [eax + 0x3c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x40]", - "fld dword [eax + 0x38]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x3c]", - "fld dword [eax + 0x34]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x38]", - "fld dword [eax + 0x30]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x34]", - "fld dword [eax + 0x2c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x30]", - "fld dword [eax + 0x28]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x2c]", - "fld dword [eax + 0x24]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x28]", - "fld dword [eax + 0x20]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x24]", - "fld dword [eax + 0x1c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x20]", - "fld dword [eax + 0x18]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x1c]", - "fld dword [eax + 0x14]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x18]", - "fld dword [eax + 0x10]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x14]", - "fld dword [eax + 0xc]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x10]", - "fld dword [eax + 0x8]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0xc]", - "fld dword [eax + 0x4]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x8]", - "fld dword [eax]", - "fst qword [esp + 0x20]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fst dword [eax + 0x4]", - "fld dword [eax + 0x3c]", - "fld dword [eax + 0x44]", - "fadd st0,st1", - "fstp dword [eax + 0x44]", - "fld dword [eax + 0x34]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x3c]", - "fld dword [eax + 0x2c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x34]", - "fld dword [eax + 0x24]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x2c]", - "fld dword [eax + 0x1c]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x24]", - "fld dword [eax + 0x14]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x1c]", - "fld dword [eax + 0xc]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [eax + 0x14]", - "faddp", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fstp dword [eax + 0xc]", - "fadd st0,st0", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x30]", - "fst qword [esp + 0x18]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0x28]", - "faddp", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x10]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0x80]", - "fld dword [eax + 0x20]", - "fld dword [eax + 0x40]", - "fld st3", - "fld qword [0x00a77b70]", - "fmul st1", - "fxch", - "faddp st4,st0", - "fld st2", - "fld qword [0x00a77b68]", - "fmul st1", - "fxch st5", - "faddp", - "fld st2", - "fld qword [0x00a77b60]", - "fmul st1", - "fxch st2", - "faddp", - "fstp dword [esp + 0xc0]", - "fld qword [esp + 0x28]", - "fadd st0,st6", - "fsub st0,st4", - "fld qword [esp + 0x18]", - "fsub st1,st0", - "fsubp", - "fsub st0,st3", - "fstp dword [esp + 0xd0]", - "fld st5", - "fmul st1", - "fsubr qword [esp + 0x80]", - "fld st4", - "fmul st3", - "fsubp", - "fld st3", - "fmul st6", - "faddp", - "fstp dword [esp + 0xb8]", - "fld st5", - "fmul st5", - "fsubr qword [esp + 0x80]", - "fld st4", - "fmul st2", - "faddp", - "fld st3", - "fmul st3", - "fsubp", - "fstp dword [esp + 0xc8]", - "fld qword [esp + 0x20]", - "fsubrp st6,st0", - "fxch st5", - "faddp st3,st0", - "fxch st2", - "fsub qword [esp + 0x18]", - "faddp", - "fstp dword [esp + 0x80]", - "fld dword [eax + 0x18]", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x8]", - "fst qword [esp + 0x18]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0x20]", - "fld dword [eax + 0x28]", - "fst qword [esp + 0x90]", - "fld dword [eax + 0x38]", - "fst qword [esp + 0x28]", - "fld qword [0x00a77b50]", - "fmul st4", - "fxch st4", - "faddp st3,st0", - "fld qword [0x00a77b48]", - "fmul st2", - "fxch st3", - "faddp st2,st0", - "fld qword [0x00a77b40]", - "fmul st1", - "fxch st2", - "faddp", - "fstp dword [esp + 0xb4]", - "fld qword [esp + 0x18]", - "fld qword [esp + 0x90]", - "fsub st1,st0", - "fxch", - "fsub qword [esp + 0x28]", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0xc4]", - "fld qword [esp + 0x18]", - "fmul st3", - "fsub qword [esp + 0x20]", - "fxch", - "fmul st2", - "fsubp", - "fld qword [esp + 0x28]", - "fmul st4", - "faddp", - "fstp dword [esp + 0xa8]", - "fld qword [esp + 0x18]", - "fmul st1", - "fsub qword [esp + 0x20]", - "fld qword [esp + 0x90]", - "fmul st4", - "faddp", - "fld qword [esp + 0x28]", - "fmul st3", - "fsubp", - "fstp dword [esp + 0x90]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x8]", - "fadd st0,st0", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x34]", - "fst qword [esp + 0x98]", - "fld dword [esp + 0x14]", - "fst qword [esp + 0xa0]", - "faddp", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0x14]", - "fst qword [esp + 0x20]", - "fld dword [esp + 0x14]", - "fstp qword [esp + 0x88]", - "fld dword [eax + 0x24]", - "fstp qword [esp + 0x18]", - "fld dword [eax + 0x44]", - "fstp qword [esp + 0x28]", - "fmul st4", - "fadd qword [esp + 0x88]", - "fld qword [esp + 0x18]", - "fmul st6", - "faddp", - "fld qword [esp + 0x28]", - "fmul st7", - "faddp", - "fstp dword [esp + 0xb0]", - "fld qword [esp + 0xa0]", - "fadd qword [esp + 0x20]", - "fsub qword [esp + 0x18]", - "fld qword [esp + 0x98]", - "fsub st1,st0", - "fsubp", - "fsub qword [esp + 0x28]", - "fstp dword [esp + 0x30]", - "fld qword [esp + 0x20]", - "fmul st6", - "fsubr qword [esp + 0x88]", - "fld qword [esp + 0x18]", - "fmul st5", - "fsubp", - "fld qword [esp + 0x28]", - "fmul st6", - "faddp", - "fstp dword [esp + 0xa0]", - "fld qword [esp + 0x20]", - "fld st0", - "fmulp st6", - "fld qword [esp + 0x88]", - "fsubrp st6,st0", - "fld qword [esp + 0x18]", - "fmulp st7", - "fxch st5", - "faddp st6,st0", - "fld qword [esp + 0x28]", - "fld st0", - "fmulp st5", - "fxch st6", - "fsubrp st4,st0", - "fxch st3", - "fstp dword [esp + 0x28]", - "fld qword [esp + 0x8]", - "fsubrp st4,st0", - "fxch st3", - "fadd qword [esp + 0x18]", - "fsub qword [esp + 0x98]", - "faddp st4,st0", - "fxch st3", - "fmul qword [0x00a77bd8]", - "fstp dword [esp + 0x18]", - "fld dword [eax + 0x1c]", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fld dword [eax + 0x2c]", - "fld dword [eax + 0x3c]", - "fld dword [esp + 0x4]", - "fmul st6", - "fadd st0,st3", - "fld st2", - "fmul st6", - "faddp", - "fld st1", - "fmul st5", - "faddp", - "fstp dword [esp + 0x14]", - "fld dword [eax + 0xc]", - "fst qword [esp + 0x20]", - "fsub st0,st2", - "fsub st0,st1", - "fmul qword [0x00a77b58]", - "fstp dword [esp + 0x98]", - "fld qword [esp + 0x20]", - "fmul st5", - "fsub st0,st3", - "fld st2", - "fmul st5", - "fsubp", - "fld st1", - "fmul st7", - "faddp", - "fstp dword [esp + 0x88]", - "fld qword [esp + 0x20]", - "fmulp st4", - "fxch st3", - "fsubrp st2,st0", - "fmulp st4", - "faddp st3,st0", - "fmulp", - "fsubp", - "fstp dword [esp + 0x20]", - "fld dword [esp + 0xb4]", - "fld dword [esp + 0xc0]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x14]", - "fld dword [esp + 0xb0]", - "fld st0", - "fadd st0,st2", - "fmul qword [0x00a77b38]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x38]", - "fsubrp", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0xc4]", - "fld dword [esp + 0xd0]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x98]", - "fst qword [esp + 0xd0]", - "fld dword [esp + 0x30]", - "fst qword [esp + 0x98]", - "faddp", - "fmul qword [0x00a77bd0]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x3c]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x78]", - "fld dword [esp + 0xa8]", - "fst qword [esp + 0xa8]", - "fld dword [esp + 0xb8]", - "fst qword [esp + 0xb8]", - "faddp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x88]", - "fst qword [esp + 0x88]", - "fld dword [esp + 0xa0]", - "fst qword [esp + 0xa0]", - "faddp", - "fmul qword [0x00a77b30]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x40]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x90]", - "fst qword [esp + 0x90]", - "fld dword [esp + 0xc8]", - "fst qword [esp + 0xc8]", - "faddp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x20]", - "fst qword [esp + 0x20]", - "fld dword [esp + 0x28]", - "fst qword [esp + 0x28]", - "faddp", - "fmul qword [0x00a77b28]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x44]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x70]", - "fld dword [esp + 0x18]", - "fld dword [esp + 0x80]", - "fst qword [esp + 0x80]", - "fadd st0,st1", - "fstp dword [esp + 0x48]", - "fsubr qword [esp + 0x80]", - "fstp dword [esp + 0x6c]", - "fld qword [esp + 0xc8]", - "fsub qword [esp + 0x90]", - "fstp dword [esp + 0x8]", - "fld qword [esp + 0x28]", - "fsub qword [esp + 0x20]", - "fmul qword [0x00a77b20]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x4c]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x68]", - "fld qword [esp + 0xb8]", - "fsub qword [esp + 0xa8]", - "fstp dword [esp + 0x8]", - "fld qword [esp + 0xa0]", - "fsub qword [esp + 0x88]", - "fmul qword [0x00a77b18]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fst qword [esp + 0x30]", - "fadd st0,st1", - "fstp dword [esp + 0x50]", - "fsubr qword [esp + 0x30]", - "fstp dword [esp + 0x64]", - "fsubrp", - "fstp dword [esp + 0x8]", - "fld qword [esp + 0x98]", - "fsub qword [esp + 0xd0]", - "fmul qword [0x00a77be0]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x54]", - "fsubrp", - "fstp dword [esp + 0x60]", - "fxch st2", - "fsubrp st3,st0", - "fxch st2", - "fstp dword [esp + 0x8]", - "fsubrp", - "fmul qword [0x00a77b10]", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x4]", - "fld dword [esp + 0x8]", - "lea eax,[ecx + ecx*0x8]", - "fld st0", - "mov ecx,dword [ebp + 0xc]", - "fadd st0,st2", - "shl eax,0x4", - "add eax,0xb183d0", - "fstp dword [esp + 0x58]", - "fsubrp", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x5c]", - "fld st0", - "fchs", - "fmul dword [eax]", - "fstp dword [ecx]", - "fld dword [eax + 0x4]", - "fld dword [esp + 0x60]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x4]", - "fld dword [eax + 0x8]", - "fld dword [esp + 0x64]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x8]", - "fld dword [eax + 0xc]", - "fld dword [esp + 0x68]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0xc]", - "fld dword [eax + 0x10]", - "fld dword [esp + 0x6c]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x10]", - "fld dword [eax + 0x14]", - "fld dword [esp + 0x70]", - "fld st0", - "fchs", - "fmulp st2", - "fxch", - "fstp dword [ecx + 0x14]", - "fld dword [eax + 0x18]", - "fld dword [esp + 0x74]", - "fchs", - "fmulp", - "fstp dword [ecx + 0x18]", - "fld dword [eax + 0x1c]", - "fld dword [esp + 0x78]", - "fchs", - "fmulp", - "fstp dword [ecx + 0x1c]", - "fld dword [eax + 0x20]", - "fld dword [esp + 0x7c]", - "fchs", - "fmulp", - "fstp dword [ecx + 0x20]", - "fld dword [eax + 0x24]", - "fmul dword [esp + 0x7c]", - "fstp dword [ecx + 0x24]", - "fld dword [eax + 0x28]", - "fmul dword [esp + 0x78]", - "fstp dword [ecx + 0x28]", - "fld dword [eax + 0x2c]", - "fmul dword [esp + 0x74]", - "fstp dword [ecx + 0x2c]", - "fmul dword [eax + 0x30]", - "fstp dword [ecx + 0x30]", - "fmul dword [eax + 0x34]", - "fstp dword [ecx + 0x34]", - "fmul dword [eax + 0x38]", - "fstp dword [ecx + 0x38]", - "fmul dword [eax + 0x3c]", - "fstp dword [ecx + 0x3c]", - "fmul dword [eax + 0x40]", - "fstp dword [ecx + 0x40]", - "fmul dword [eax + 0x44]", - "fstp dword [ecx + 0x44]", - "fld dword [esp + 0x58]", - "fld dword [eax + 0x48]", - "fmul st1", - "fstp dword [ecx + 0x48]", - "fld dword [esp + 0x54]", - "fld dword [eax + 0x4c]", - "fmul st1", - "fstp dword [ecx + 0x4c]", - "fld dword [esp + 0x50]", - "fld dword [eax + 0x50]", - "fmul st1", - "fstp dword [ecx + 0x50]", - "fld dword [esp + 0x4c]", - "fld dword [eax + 0x54]", - "fmul st1", - "fstp dword [ecx + 0x54]", - "fld dword [esp + 0x48]", - "fld dword [eax + 0x58]", - "fmul st1", - "fstp dword [ecx + 0x58]", - "fld dword [esp + 0x44]", - "fld dword [eax + 0x5c]", - "fmul st1", - "fstp dword [ecx + 0x5c]", - "fld dword [esp + 0x40]", - "fst qword [esp + 0x18]", - "fmul dword [eax + 0x60]", - "fstp dword [ecx + 0x60]", - "fld dword [esp + 0x3c]", - "fst qword [esp + 0x80]", - "fmul dword [eax + 0x64]", - "fstp dword [ecx + 0x64]", - "fld dword [esp + 0x38]", - "fld dword [eax + 0x68]", - "fmul st1", - "fstp dword [ecx + 0x68]", - "fmul dword [eax + 0x6c]", - "fstp dword [ecx + 0x6c]", - "fld dword [eax + 0x70]", - "fmul qword [esp + 0x80]", - "fstp dword [ecx + 0x70]", - "fld dword [eax + 0x74]", - "fmul qword [esp + 0x18]", - "fstp dword [ecx + 0x74]", - "fmul dword [eax + 0x78]", - "fstp dword [ecx + 0x78]", - "fmul dword [eax + 0x7c]", - "fstp dword [ecx + 0x7c]", - "fmul dword [eax + 0x80]", - "fstp dword [ecx + 0x80]", - "fmul dword [eax + 0x84]", - "fstp dword [ecx + 0x84]", - "fmul dword [eax + 0x88]", - "fstp dword [ecx + 0x88]", - "fmul dword [eax + 0x8c]", - "fstp dword [ecx + 0x8c]", - "mov esp,ebp", - "pop ebp" - ], - "ExpectedArm64ASM": [ - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b70", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b68", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b60", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #192]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #184]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b58", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #144]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b50", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b48", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7b40", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #180]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #168]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #144]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #152]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #160]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #136]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x7 (7)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #176]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #160]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x7 (7)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x4 (4)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x7bd8", - "movk w25, #0xa7, lsl #16", - "ldr d2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x6 (6)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x5 (5)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #152]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x7 (7)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b38", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #208]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #208]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #152]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7bd0", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #168]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #184]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #136]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #160]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b30", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #144]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #200]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #40]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b28", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #200]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b20", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #184]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #168]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #160]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b18", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #208]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7be0", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x7b10", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "add w4, w5, w5, lsl #3", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w5, [x9, #12]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "lsl w4, w4, #4", - "mov w20, #0x83d0", - "movk w20, #0xb1, lsl #16", - "mvn w27, w4", - "adds w26, w4, w20", - "mov x4, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w24, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #8]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #16]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #28]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #128]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5, #140]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov x8, x9", - "ldr w9, [x8]", - "add x8, x8, #0x4 (4)", - "strb w21, [x28, #1298]" - ] - }, - "Block3": { - "ExpectedInstructionCount": 20918, - "x86Insts": [ - "fld dword [esi + 0x64]", - "mov eax,dword [esi + 0x88]", - "fstp dword [esp + 0x5c]", - "mov ecx,dword [esi + 0x8c]", - "fld dword [esi + 0x70]", - "mov edx,dword [esi + 0x90]", - "fstp dword [esp + 0x60]", - "mov dword [esp + 0x2e4],0x3f", - "fld dword [esi + 0x7c]", - "mov dword [esp + 0x94],eax", - "fstp dword [esp + 0x64]", - "mov dword [esp + 0x98],ecx", - "fld dword [esi + 0x68]", - "mov dword [esp + 0x9c],edx", - "fstp dword [esp + 0x14]", - "mov dword [esp + 0xe8],eax", - "fld dword [esi + 0x74]", - "mov dword [esp + 0xec],ecx", - "fstp dword [esp + 0x18]", - "mov dword [esp + 0xf0],edx", - "fld dword [esi + 0x80]", - "fstp dword [esp + 0x1c]", - "fld dword [esi + 0xf4]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x14]", - "fmul st1", - "fstp dword [esp + 0x8c]", - "fld dword [esp + 0x18]", - "fmul st1", - "fstp dword [esp + 0x7c]", - "fmul dword [esp + 0x1c]", - "fstp dword [esp + 0x84]", - "fld dword [esi + 0x6c]", - "fstp dword [esp + 0x14]", - "fld dword [esi + 0x78]", - "fstp dword [esp + 0x18]", - "fld dword [esi + 0x84]", - "fstp dword [esp + 0x1c]", - "fld dword [esi + 0xf0]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x14]", - "fmul st1", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x18]", - "fmul st1", - "fstp dword [esp + 0x50]", - "fmul dword [esp + 0x1c]", - "fstp dword [esp + 0x58]", - "fld dword [esi + 0x100]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x54]", - "fmul st1", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fst dword [esp + 0x10]", - "fld dword [esp + 0x50]", - "fmul st2", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fst dword [esp + 0x2c]", - "fld dword [esp + 0x58]", - "fmul st3", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fst dword [esp + 0x14]", - "fld dword [esp + 0x8c]", - "fmul st4", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x7c]", - "fmul st4", - "fstp dword [esp + 0x8c]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x84]", - "fmul st4", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x5c]", - "fmul st4", - "fstp dword [esp + 0x50]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x84]", - "fld dword [esp + 0x60]", - "fmul st4", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x64]", - "fmulp st4", - "fxch st3", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x94]", - "fld dword [esp + 0x84]", - "fadd st0,st1", - "fstp dword [esp + 0x84]", - "fld dword [esp + 0x98]", - "fld dword [esp + 0x7c]", - "fadd st0,st1", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x9c]", - "fld dword [esp + 0x5c]", - "fadd st0,st1", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x84]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x7c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x5c]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x44]", - "fadd dword [esp + 0x10]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x48]", - "fadd dword [esp + 0x2c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x40]", - "fadd dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x10]", - "fstp dword [esp + 0x5c]", - "mov eax,dword [esp + 0x5c]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xf4],eax", - "fstp dword [esp + 0x60]", - "mov ecx,dword [esp + 0x60]", - "fld dword [esp + 0x14]", - "mov dword [esp + 0xf8],ecx", - "fstp dword [esp + 0x64]", - "mov edx,dword [esp + 0x64]", - "fxch st4", - "mov dword [esp + 0xfc],edx", - "fst dword [esp + 0x5c]", - "fxch st3", - "fst dword [esp + 0x84]", - "fxch st5", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "mov eax,dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0x100],eax", - "fstp dword [esp + 0x18]", - "mov ecx,dword [esp + 0x18]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0x104],ecx", - "fstp dword [esp + 0x1c]", - "mov edx,dword [esp + 0x1c]", - "fxch st3", - "mov dword [esp + 0x108],edx", - "fst dword [esp + 0x5c]", - "fxch st5", - "fst dword [esp + 0x84]", - "fxch st3", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "mov eax,dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0x10c],eax", - "fstp dword [esp + 0x18]", - "mov ecx,dword [esp + 0x18]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0x110],ecx", - "fstp dword [esp + 0x1c]", - "mov edx,dword [esp + 0x1c]", - "fxch st5", - "mov dword [esp + 0x114],edx", - "fstp dword [esp + 0x5c]", - "fxch st2", - "fstp dword [esp + 0x84]", - "fxch st3", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "faddp st3,st0", - "fxch st2", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x2c]", - "fadd dword [esp + 0x10]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "mov eax,dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0x118],eax", - "mov eax,dword [ebx + 0x88]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x10]", - "mov ecx,dword [esp + 0x18]", - "fstp dword [esp + 0x1c]", - "mov edx,dword [esp + 0x1c]", - "fld dword [ebx + 0x64]", - "mov dword [esp + 0x11c],ecx", - "mov ecx,dword [ebx + 0x8c]", - "fstp dword [esp + 0x70]", - "fld dword [ebx + 0x70]", - "mov dword [esp + 0x120],edx", - "mov edx,dword [ebx + 0x90]", - "fstp dword [esp + 0x74]", - "fld dword [ebx + 0x7c]", - "mov dword [esp + 0x94],eax", - "mov dword [esp + 0x98],ecx", - "mov dword [esp + 0x9c],edx", - "fstp dword [esp + 0x78]", - "mov dword [esp + 0xac],eax", - "fld dword [ebx + 0x68]", - "mov dword [esp + 0xb0],ecx", - "fstp dword [esp + 0x2c]", - "mov dword [esp + 0xb4],edx", - "fld dword [ebx + 0x74]", - "fstp dword [esp + 0x30]", - "fld dword [ebx + 0x80]", - "fstp dword [esp + 0x34]", - "fld dword [ebx + 0xf4]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x30]", - "fmul st1", - "fstp dword [esp + 0x48]", - "fmul dword [esp + 0x34]", - "fstp dword [esp + 0x44]", - "fld dword [ebx + 0x6c]", - "fstp dword [esp + 0x5c]", - "fld dword [ebx + 0x78]", - "fstp dword [esp + 0x60]", - "fld dword [ebx + 0x84]", - "fstp dword [esp + 0x64]", - "fld dword [ebx + 0xf0]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fld dword [esp + 0x5c]", - "fmul st1", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x60]", - "fmul st1", - "fstp dword [esp + 0x2c]", - "fmul dword [esp + 0x64]", - "fstp dword [esp + 0x10]", - "fld dword [ebx + 0x100]", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x14]", - "fmul st1", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fst dword [esp + 0x5c]", - "fld dword [esp + 0x2c]", - "fmul st2", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fst dword [esp + 0x84]", - "fld dword [esp + 0x10]", - "fmul st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x14]", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x40]", - "fmul st4", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x48]", - "fmul st4", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x44]", - "fmul st4", - "fstp dword [esp + 0x50]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x70]", - "fmul st4", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x74]", - "fmul st4", - "fstp dword [esp + 0x8c]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x78]", - "fmulp st4", - "fxch st3", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x94]", - "fld dword [esp + 0x14]", - "fadd st0,st1", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x98]", - "fld dword [esp + 0x2c]", - "fadd st0,st1", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x9c]", - "fld dword [esp + 0x10]", - "fadd st0,st1", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x70]", - "mov eax,dword [esp + 0x70]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xb8],eax", - "fstp dword [esp + 0x74]", - "mov ecx,dword [esp + 0x74]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0xbc],ecx", - "fstp dword [esp + 0x78]", - "mov edx,dword [esp + 0x78]", - "fxch st4", - "mov dword [esp + 0xc0],edx", - "fst dword [esp + 0x5c]", - "fxch st3", - "fst dword [esp + 0x84]", - "fxch st5", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x70]", - "mov eax,dword [esp + 0x70]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xc4],eax", - "fstp dword [esp + 0x74]", - "mov ecx,dword [esp + 0x74]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0xc8],ecx", - "fstp dword [esp + 0x78]", - "mov edx,dword [esp + 0x78]", - "fxch st3", - "mov dword [esp + 0xcc],edx", - "fst dword [esp + 0x5c]", - "fxch st5", - "fst dword [esp + 0x84]", - "fxch st3", - "fst dword [esp + 0x7c]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x8c]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x4c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd st0,st3", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd st0,st2", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd st0,st5", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x40]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fadd dword [esp + 0x5c]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x2c]", - "fadd dword [esp + 0x84]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x10]", - "fadd dword [esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x14]", - "fstp dword [esp + 0x70]", - "mov eax,dword [esp + 0x70]", - "fld dword [esp + 0x2c]", - "mov dword [esp + 0xd0],eax", - "fstp dword [esp + 0x74]", - "mov ecx,dword [esp + 0x74]", - "fld dword [esp + 0x10]", - "mov dword [esp + 0xd4],ecx", - "fstp dword [esp + 0x78]", - "mov edx,dword [esp + 0x78]", - "mov dword [esp + 0xd8],edx", - "fxch st5", - "push 0x0", - "fstp dword [esp + 0x60]", - "fxch st2", - "fstp dword [esp + 0x88]", - "fxch st3", - "fstp dword [esp + 0x80]", - "fld dword [esp + 0x2c]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x58]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x54]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x5c]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x90]", - "fstp dword [esp + 0x30]", - "fld dword [esp + 0x50]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "faddp st3,st0", - "fxch st2", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x30]", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x30]", - "fadd dword [esp + 0x14]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "fsub dword [esp + 0x44]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x30]", - "fsub dword [esp + 0x4c]", - "fstp dword [esp + 0x30]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x48]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "fsub dword [esp + 0x60]", - "fstp dword [esp + 0x18]", - "fld dword [esp + 0x30]", - "fsub dword [esp + 0x88]", - "fstp dword [esp + 0x30]", - "fld dword [esp + 0x14]", - "fsub dword [esp + 0x80]", - "fstp dword [esp + 0x14]", - "fld dword [esp + 0x18]", - "fstp dword [esp + 0x74]", - "mov eax,dword [esp + 0x74]", - "fld dword [esp + 0x30]", - "mov dword [esp + 0xe0],eax", - "fstp dword [esp + 0x78]", - "mov ecx,dword [esp + 0x78]", - "fld dword [esp + 0x14]", - "mov dword [esp + 0xe4],ecx", - "fstp dword [esp + 0x7c]", - "mov edx,dword [esp + 0x7c]", - "lea ecx,[esp + 0x190]", - "mov dword [esp + 0xe8],edx", - "call 0x0070df30", - "mov dword [esp + 0x198],esi", - "add esi,0xec", - "push esi", - "lea ecx,[esp + 0x190]", - "mov dword [esp + 0x314],0x0", - "call 0x0070e040", - "mov ecx,0x19", - "lea esi,[esp + 0x1b8]", - "lea edi,[esp + 0x21c]", - "rep movsd", - "mov dword [esp + 0x198],ebx", - "add ebx,0xec", - "push ebx", - "lea ecx,[esp + 0x190]", - "call 0x0070e040", - "mov ecx,0x19", - "lea esi,[esp + 0x1b8]", - "lea edi,[esp + 0x284]", - "rep movsd", - "lea esi,[esp + 0x124]", - "mov edi,0x5" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x10, #136]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x10, #140]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w6, [x10, #144]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov w20, #0x3f", - "str w20, [x8, #740]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #148]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w5, [x8, #152]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #156]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w4, [x8, #232]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #236]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #240]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #244]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #240]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #256]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #92]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #244]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #96]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #248]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #100]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #252]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #256]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #260]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #264]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #268]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #272]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #276]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #280]", - "ldr w4, [x7, #136]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w5, [x8, #24]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #28]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #284]", - "ldr w5, [x7, #140]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #288]", - "ldr w6, [x7, #144]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #148]", - "str w5, [x8, #152]", - "str w6, [x8, #156]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w4, [x8, #172]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #104]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #176]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #180]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #244]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #108]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #240]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x7, #256]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #148]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #184]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #120]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #192]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #196]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #200]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #120]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w6, [x8, #204]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #112]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #208]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #212]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #120]", - "str w6, [x8, #216]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "str w24, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #116]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w4, [x8, #224]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x8, #120]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #228]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x8, #124]", - "add w5, w8, #0x190 (400)", - "str w6, [x8, #232]", - "mov w20, #0x2296", - "movk w20, #0x1, lsl #16", - "mov w22, #0xd4f1", - "movk w22, #0x70, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block4": { - "ExpectedInstructionCount": 76, - "x86Insts": [ - "fldz", - "push 0x0", - "push -0x1", - "push 0x1000172", - "push 0x37", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33c14", - "push 0x52424157", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000172", - "push 0x38", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33c04", - "push 0x41574157", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x2b", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bfc", - "push 0x444c4853", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3d", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bf0", - "push 0x48534946", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x44", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bdc", - "push 0x4853494c", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3e", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bcc", - "push 0x48535246", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x52485446", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x1000073", - "push 0xb", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bc4", - "push 0x4e445242", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x1000076", - "push 0xb", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bbc", - "push 0x52485446", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0xe0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa32700", - "push 0x4b434f4c", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0xc0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x0", - "push 0xa33bb4", - "push 0x4e45504f", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x48534946", - "push 0x49465352", - "push 0x4c505344", - "push 0x3", - "push 0x3d", - "push 0x21000475", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33ba8", - "push 0x47444946", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4853494c", - "push 0x48535352", - "push 0x4c505344", - "push 0x3", - "push 0x44", - "push 0x21000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b98", - "push 0x47444853", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x48535246", - "push 0x52465352", - "push 0x4c505344", - "push 0x3", - "push 0x3e", - "push 0x1000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b88", - "push 0x47445246", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x54414241", - "push 0x54414f46", - "push 0x54414552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x100075", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b74", - "push 0x54414744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x45484241", - "push 0x45484f46", - "push 0x45484552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x21000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b64", - "push 0x45484744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x50534241", - "push 0x50534f46", - "push 0x50534552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000075", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b50", - "push 0x50534744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x41464241", - "push 0x41464f46", - "push 0x41464552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000075", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b40", - "push 0x41464744", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x54414241", - "push 0x54414f46", - "push 0x54414552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x100077", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b30", - "push 0x54415244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x4b534241", - "push 0x4b534f46", - "push 0x4c505344", - "push 0x3", - "push 0x40", - "push 0x80077", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b24", - "push 0x4b535244", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x45484241", - "push 0x45484f46", - "push 0x45484552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000077", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b14", - "push 0x45485244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x50534241", - "push 0x50534f46", - "push 0x50534552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000077", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33b00", - "push 0x50535244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x41464241", - "push 0x41464f46", - "push 0x41464552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000077", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33af0", - "push 0x41465244", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x4c505344", - "push 0x49465352", - "push 0x48534946", - "push 0x3", - "push 0x40", - "push 0x100007f", - "push 0x3d", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33adc", - "push 0x49464b57", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4c505344", - "push 0x52465352", - "push 0x48535246", - "push 0x3", - "push 0x40", - "push 0x100007f", - "push 0x3e", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33ac8", - "push 0x52464b57", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4c505344", - "push 0x48535352", - "push 0x4853494c", - "push 0x3", - "push 0x40", - "push 0x100007f", - "push 0x44", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33ab4", - "push 0x48534b57", - "call 0x00417220", - "fldz", - "add esp,0x2c", - "push 0x4c505344", - "push 0x414d5352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x40", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33aa0", - "push 0x414d4b57", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x49445352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x3f", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a8c", - "push 0x49444b57", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x4f505352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x43", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a78", - "push 0x4f504b57", - "call 0x00417220", - "add esp,0x28", - "push 0x4c505344", - "push 0x574e5352", - "push 0x2", - "push 0x40", - "push 0x100007f", - "push 0x41", - "push ecx", - "fldz", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a5c", - "push 0x574e4b57", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x48535246", - "push 0x4853494c", - "push 0x48534946", - "push 0x444c4853", - "push 0x4c505344", - "push 0x5", - "push 0x40", - "push 0x75", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a48", - "push 0x52414944", - "call 0x00417220", - "fldz", - "add esp,0x34", - "push 0x48535246", - "push 0x4853494c", - "push 0x48534946", - "push 0x444c4853", - "push 0x4c505344", - "push 0x5", - "push 0x40", - "push 0x75", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a30", - "push 0x45574944", - "call 0x00417220", - "fldz", - "add esp,0x34", - "push 0x0", - "push 0x3f", - "push 0x10000092", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a24", - "push 0x504d4156", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x14", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a18", - "push 0x47445553", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000112", - "push 0x39", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa33a08", - "push 0x414d5453", - "call 0x00417220", - "add esp,0x20", - "push 0x4f505543", - "push 0x1", - "push 0x43", - "push 0x800000", - "fldz", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa339fc", - "push 0x4e534f50", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x49445543", - "push 0x1", - "push 0x3f", - "push 0x800000", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa339ec", - "push 0x45534944", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x45484241", - "push 0x45484f46", - "push 0x45484552", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x21000075", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x2", - "push 0xa339cc", - "push 0x594d5544", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x0", - "push -0x1", - "push 0x1000172", - "push 0x2f", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa339bc", - "push 0x49564e49", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x2e", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa339b0", - "push 0x4c4d4843", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4c505344", - "push 0x41505543", - "push 0x2", - "push 0x42", - "push 0x1000173", - "push 0x30", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa339a4", - "push 0x41524150", - "call 0x00417220", - "add esp,0x28", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x1000173", - "push 0x31", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa3399c", - "push 0x434e4c53", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x1000062", - "push 0x6", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33994", - "push 0x4d524843", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x594c4152", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x41000066", - "push 0x22", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33988", - "push 0x4f4d4544", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4f4d4544", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x1000062", - "push 0x22", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33980", - "push 0x594c4152", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4d4c4143", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x41000062", - "push 0x21", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33978", - "push 0x5a4e5246", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x5a4e5246", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x41000066", - "push 0x21", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33970", - "push 0x4d4c4143", - "call 0x00417220", - "add esp,0x28", - "push 0x0", - "push -0x1", - "push 0x1000112", - "push 0x29", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33964", - "push 0x4559454e", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x80000072", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa3395c", - "push 0x5448474c", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x81000072", - "push 0x46", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33950", - "push 0x4b524144", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push 0x40", - "push 0xf0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33948", - "push 0x4c505344", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4c505344", - "push 0x1", - "push 0x40", - "push 0x163", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa3393c", - "push 0x50525453", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0x81000242", - "push 0x3c", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33930", - "push 0x454c4554", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x81000012", - "push 0x3a", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33924", - "push 0x54435444", - "call 0x00417220", - "add esp,0x20", - "fldz", - "push 0x0", - "push 0x40", - "push 0x1000072", - "push 0x34", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33910", - "push 0x53424153", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x35", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa33908", - "push 0x434c4652", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100001a", - "push 0x3b", - "push ecx", - "fstp dword [esp]", - "push 0x4", - "push 0xa338f8", - "push 0x47444552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100070", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338e4", - "push 0x54414552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000070", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338d4", - "push 0x45484552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000070", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338bc", - "push 0x50534552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000070", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa338ac", - "push 0x41464552", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100072", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33898", - "push 0x54414f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x80072", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33888", - "push 0x4b534f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000072", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33878", - "push 0x45484f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000072", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33860", - "push 0x50534f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000072", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33850", - "push 0x41464f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4b535244", - "push 0x4b534241", - "push 0x4c505344", - "push 0x3", - "push 0x40", - "push 0x80027", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33840", - "push 0x4b534241", - "call 0x00417220", - "add esp,0x2c", - "push 0x54414744", - "push 0x54415244", - "push 0x54414241", - "fldz", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x100027", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3382c", - "push 0x54414241", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x594d5544", - "push 0x45484744", - "push 0x45485244", - "push 0x45484241", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000025", - "push 0x8", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3381c", - "push 0x45484241", - "call 0x00417220", - "fldz", - "add esp,0x34", - "push 0x41464744", - "push 0x41465244", - "push 0x41464241", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000025", - "push 0xa", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3380c", - "push 0x41464241", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x50534744", - "push 0x50535244", - "push 0x50534241", - "push 0x4c505344", - "push 0x4", - "push 0x40", - "push 0x1000025", - "push 0x9", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337f8", - "push 0x50534241", - "call 0x00417220", - "fldz", - "add esp,0x30", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3d", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337ec", - "push 0x49465352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3e", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337dc", - "push 0x52465352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x44", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337cc", - "push 0x48535352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x40", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337bc", - "push 0x414d5352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x3f", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa337ac", - "push 0x49445352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x43", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3379c", - "push 0x4f505352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x42", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33788", - "push 0x41505352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100007a", - "push 0x41", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33770", - "push 0x574e5352", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x100017a", - "push 0x47", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3375c", - "push 0x44575352", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1f0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa3374c", - "push 0x49445543", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1f0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33740", - "push 0x4f505543", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1f0", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33730", - "push 0x41505543", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x1000012", - "push 0x28", - "push ecx", - "fstp dword [esp]", - "push 0x5", - "push 0xa33714", - "push 0x4d4d4f46", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33704", - "push 0x4f48475a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336f8", - "push 0x43494c5a", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "fldz", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336e8", - "push 0x454b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336d0", - "push 0x414b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa336b4", - "push 0x434b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3369c", - "push 0x484b535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3368c", - "push 0x4152575a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33678", - "push 0x4c52575a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33668", - "push 0x4d4f5a5a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33650", - "push 0x5a44485a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33638", - "push 0x4149465a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33620", - "push 0x4152465a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33608", - "push 0x4154535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335f8", - "push 0x4541445a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335e8", - "push 0x4552445a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335d4", - "push 0x4c52445a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335c4", - "push 0x4143535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa335b0", - "push 0x414c435a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33598", - "push 0x4450535a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33588", - "push 0x5649585a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33578", - "push 0x3130305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33568", - "push 0x3230305a", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "fldz", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33558", - "push 0x3330305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33548", - "push 0x3430305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33538", - "push 0x3530305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33528", - "push 0x3630305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33518", - "push 0x3730305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33508", - "push 0x3830305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334f8", - "push 0x3930305a", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "fldz", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334e8", - "push 0x3031305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334d8", - "push 0x3131305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334c8", - "push 0x3231305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334b8", - "push 0x3331305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa334a8", - "push 0x3431305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33498", - "push 0x3531305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33488", - "push 0x3631305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33478", - "push 0x3731305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33468", - "push 0x3831305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33458", - "push 0x3931305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x40112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33448", - "push 0x3032305a", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x4c505344", - "push 0x1", - "push -0x1", - "push 0x40000062", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33434", - "push 0x55484f43", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x4c505344", - "push 0x1", - "push -0x1", - "push 0x40000062", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x3", - "push 0xa33420", - "push 0x52434f43", - "call 0x00417220", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fldz", - "fstp dword [esp]", - "push 0x1", - "push 0xa33414", - "push 0x58415742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33408", - "push 0x4f425742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333f8", - "push 0x41445742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333ec", - "push 0x414d5742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333e0", - "push 0x57535742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333d4", - "push 0x4f424142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333c4", - "push 0x55434142", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "fldz", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333b4", - "push 0x41474142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa333a4", - "push 0x52474142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33394", - "push 0x45484142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33384", - "push 0x48534142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3336c", - "push 0x31304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33354", - "push 0x32304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3333c", - "push 0x33304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33324", - "push 0x34304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3330c", - "push 0x35304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332f4", - "push 0x36304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332dc", - "push 0x37304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332c4", - "push 0x38304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa332ac", - "push 0x39304142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33294", - "push 0x30314142", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3327c", - "push 0x31305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33264", - "push 0x32305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3324c", - "push 0x33305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33234", - "push 0x34305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3321c", - "push 0x35305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33204", - "push 0x36305742", - "call 0x00417220", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fldz", - "fstp dword [esp]", - "push 0x1", - "push 0xa331ec", - "push 0x37305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa331d4", - "push 0x38305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa331bc", - "push 0x39305742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa331a4", - "push 0x30315742", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x594c4152", - "push 0x4c505344", - "push 0x2", - "push 0x40", - "push 0x40000063", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33198", - "push 0x4e525554", - "call 0x00417220", - "fldz", - "add esp,0x28", - "push 0x4c505344", - "push 0x1", - "push -0x1", - "push 0x170", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x6", - "push 0xa33188", - "push 0x46464553", - "call 0x00417220", - "fldz", - "add esp,0x24", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa3316c", - "push 0x4854594d", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x20112", - "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33154", - "push 0x4c48594d", - "call 0x00417220", - "fldz", - "add esp,0x20", - "push 0x0", - "push -0x1", - "push 0x10000360", + "str s2, [x20]", + "ldr s2, [x8, #140]", + "add w20, w4, #0x700 (1792)", + "str s2, [x20]", + "ldr s2, [x8, #136]", + "add w20, w4, #0x740 (1856)", + "str s2, [x20]", + "ldr s2, [x8, #132]", + "add w20, w4, #0x780 (1920)", + "str s2, [x20]", + "ldr s2, [x8, #272]", + "add w20, w4, #0x7c0 (1984)", + "str s2, [x20]", + "ldr w20, [x5, #4096]", + "eor w27, w20, w5", + "subs w26, w20, w5", + "cfinv", + "add w4, w5, #0x800 (2048)", + "strb wzr, [x28, #1298]" + ] + }, + "Block2": { + "ExpectedInstructionCount": 16635, + "x86Insts": [ + "mov eax,dword [ebp + 0x8]", + "fld dword [eax + 0x40]", + "fld dword [eax + 0x44]", + "fadd st0,st1", + "fstp dword [eax + 0x44]", + "fld dword [eax + 0x3c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x40]", + "fld dword [eax + 0x38]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x3c]", + "fld dword [eax + 0x34]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x38]", + "fld dword [eax + 0x30]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x34]", + "fld dword [eax + 0x2c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x30]", + "fld dword [eax + 0x28]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x2c]", + "fld dword [eax + 0x24]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x28]", + "fld dword [eax + 0x20]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x24]", + "fld dword [eax + 0x1c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x20]", + "fld dword [eax + 0x18]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x1c]", + "fld dword [eax + 0x14]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x18]", + "fld dword [eax + 0x10]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x14]", + "fld dword [eax + 0xc]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x10]", + "fld dword [eax + 0x8]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0xc]", + "fld dword [eax + 0x4]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x8]", + "fld dword [eax]", + "fst qword [esp + 0x20]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fst dword [eax + 0x4]", + "fld dword [eax + 0x3c]", + "fld dword [eax + 0x44]", + "fadd st0,st1", + "fstp dword [eax + 0x44]", + "fld dword [eax + 0x34]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x3c]", + "fld dword [eax + 0x2c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x34]", + "fld dword [eax + 0x24]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x2c]", + "fld dword [eax + 0x1c]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x24]", + "fld dword [eax + 0x14]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x1c]", + "fld dword [eax + 0xc]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [eax + 0x14]", + "faddp", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fstp dword [eax + 0xc]", + "fadd st0,st0", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x30]", + "fst qword [esp + 0x18]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0x28]", + "faddp", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x10]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0x80]", + "fld dword [eax + 0x20]", + "fld dword [eax + 0x40]", + "fld st3", + "fld qword [0x00a77b70]", + "fmul st1", + "fxch", + "faddp st4,st0", + "fld st2", + "fld qword [0x00a77b68]", + "fmul st1", + "fxch st5", + "faddp", + "fld st2", + "fld qword [0x00a77b60]", + "fmul st1", + "fxch st2", + "faddp", + "fstp dword [esp + 0xc0]", + "fld qword [esp + 0x28]", + "fadd st0,st6", + "fsub st0,st4", + "fld qword [esp + 0x18]", + "fsub st1,st0", + "fsubp", + "fsub st0,st3", + "fstp dword [esp + 0xd0]", + "fld st5", + "fmul st1", + "fsubr qword [esp + 0x80]", + "fld st4", + "fmul st3", + "fsubp", + "fld st3", + "fmul st6", + "faddp", + "fstp dword [esp + 0xb8]", + "fld st5", + "fmul st5", + "fsubr qword [esp + 0x80]", + "fld st4", + "fmul st2", + "faddp", + "fld st3", + "fmul st3", + "fsubp", + "fstp dword [esp + 0xc8]", + "fld qword [esp + 0x20]", + "fsubrp st6,st0", + "fxch st5", + "faddp st3,st0", + "fxch st2", + "fsub qword [esp + 0x18]", + "faddp", + "fstp dword [esp + 0x80]", + "fld dword [eax + 0x18]", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x8]", + "fst qword [esp + 0x18]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0x20]", + "fld dword [eax + 0x28]", + "fst qword [esp + 0x90]", + "fld dword [eax + 0x38]", + "fst qword [esp + 0x28]", + "fld qword [0x00a77b50]", + "fmul st4", + "fxch st4", + "faddp st3,st0", + "fld qword [0x00a77b48]", + "fmul st2", + "fxch st3", + "faddp st2,st0", + "fld qword [0x00a77b40]", + "fmul st1", + "fxch st2", + "faddp", + "fstp dword [esp + 0xb4]", + "fld qword [esp + 0x18]", + "fld qword [esp + 0x90]", + "fsub st1,st0", + "fxch", + "fsub qword [esp + 0x28]", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0xc4]", + "fld qword [esp + 0x18]", + "fmul st3", + "fsub qword [esp + 0x20]", + "fxch", + "fmul st2", + "fsubp", + "fld qword [esp + 0x28]", + "fmul st4", + "faddp", + "fstp dword [esp + 0xa8]", + "fld qword [esp + 0x18]", + "fmul st1", + "fsub qword [esp + 0x20]", + "fld qword [esp + 0x90]", + "fmul st4", + "faddp", + "fld qword [esp + 0x28]", + "fmul st3", + "fsubp", + "fstp dword [esp + 0x90]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x8]", + "fadd st0,st0", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x34]", + "fst qword [esp + 0x98]", + "fld dword [esp + 0x14]", + "fst qword [esp + 0xa0]", + "faddp", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0x14]", + "fst qword [esp + 0x20]", + "fld dword [esp + 0x14]", + "fstp qword [esp + 0x88]", + "fld dword [eax + 0x24]", + "fstp qword [esp + 0x18]", + "fld dword [eax + 0x44]", + "fstp qword [esp + 0x28]", + "fmul st4", + "fadd qword [esp + 0x88]", + "fld qword [esp + 0x18]", + "fmul st6", + "faddp", + "fld qword [esp + 0x28]", + "fmul st7", + "faddp", + "fstp dword [esp + 0xb0]", + "fld qword [esp + 0xa0]", + "fadd qword [esp + 0x20]", + "fsub qword [esp + 0x18]", + "fld qword [esp + 0x98]", + "fsub st1,st0", + "fsubp", + "fsub qword [esp + 0x28]", + "fstp dword [esp + 0x30]", + "fld qword [esp + 0x20]", + "fmul st6", + "fsubr qword [esp + 0x88]", + "fld qword [esp + 0x18]", + "fmul st5", + "fsubp", + "fld qword [esp + 0x28]", + "fmul st6", + "faddp", + "fstp dword [esp + 0xa0]", + "fld qword [esp + 0x20]", + "fld st0", + "fmulp st6", + "fld qword [esp + 0x88]", + "fsubrp st6,st0", + "fld qword [esp + 0x18]", + "fmulp st7", + "fxch st5", + "faddp st6,st0", + "fld qword [esp + 0x28]", + "fld st0", + "fmulp st5", + "fxch st6", + "fsubrp st4,st0", + "fxch st3", + "fstp dword [esp + 0x28]", + "fld qword [esp + 0x8]", + "fsubrp st4,st0", + "fxch st3", + "fadd qword [esp + 0x18]", + "fsub qword [esp + 0x98]", + "faddp st4,st0", + "fxch st3", + "fmul qword [0x00a77bd8]", + "fstp dword [esp + 0x18]", + "fld dword [eax + 0x1c]", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fld dword [eax + 0x2c]", + "fld dword [eax + 0x3c]", + "fld dword [esp + 0x4]", + "fmul st6", + "fadd st0,st3", + "fld st2", + "fmul st6", + "faddp", + "fld st1", + "fmul st5", + "faddp", + "fstp dword [esp + 0x14]", + "fld dword [eax + 0xc]", + "fst qword [esp + 0x20]", + "fsub st0,st2", + "fsub st0,st1", + "fmul qword [0x00a77b58]", + "fstp dword [esp + 0x98]", + "fld qword [esp + 0x20]", + "fmul st5", + "fsub st0,st3", + "fld st2", + "fmul st5", + "fsubp", + "fld st1", + "fmul st7", + "faddp", + "fstp dword [esp + 0x88]", + "fld qword [esp + 0x20]", + "fmulp st4", + "fxch st3", + "fsubrp st2,st0", + "fmulp st4", + "faddp st3,st0", + "fmulp", + "fsubp", + "fstp dword [esp + 0x20]", + "fld dword [esp + 0xb4]", + "fld dword [esp + 0xc0]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x14]", + "fld dword [esp + 0xb0]", + "fld st0", + "fadd st0,st2", + "fmul qword [0x00a77b38]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x38]", + "fsubrp", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0xc4]", + "fld dword [esp + 0xd0]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x98]", + "fst qword [esp + 0xd0]", + "fld dword [esp + 0x30]", + "fst qword [esp + 0x98]", + "faddp", + "fmul qword [0x00a77bd0]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x3c]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x78]", + "fld dword [esp + 0xa8]", + "fst qword [esp + 0xa8]", + "fld dword [esp + 0xb8]", + "fst qword [esp + 0xb8]", + "faddp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x88]", + "fst qword [esp + 0x88]", + "fld dword [esp + 0xa0]", + "fst qword [esp + 0xa0]", + "faddp", + "fmul qword [0x00a77b30]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x40]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x90]", + "fst qword [esp + 0x90]", + "fld dword [esp + 0xc8]", + "fst qword [esp + 0xc8]", + "faddp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x20]", + "fst qword [esp + 0x20]", + "fld dword [esp + 0x28]", + "fst qword [esp + 0x28]", + "faddp", + "fmul qword [0x00a77b28]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x44]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x70]", + "fld dword [esp + 0x18]", + "fld dword [esp + 0x80]", + "fst qword [esp + 0x80]", + "fadd st0,st1", + "fstp dword [esp + 0x48]", + "fsubr qword [esp + 0x80]", + "fstp dword [esp + 0x6c]", + "fld qword [esp + 0xc8]", + "fsub qword [esp + 0x90]", + "fstp dword [esp + 0x8]", + "fld qword [esp + 0x28]", + "fsub qword [esp + 0x20]", + "fmul qword [0x00a77b20]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x4c]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x68]", + "fld qword [esp + 0xb8]", + "fsub qword [esp + 0xa8]", + "fstp dword [esp + 0x8]", + "fld qword [esp + 0xa0]", + "fsub qword [esp + 0x88]", + "fmul qword [0x00a77b18]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fst qword [esp + 0x30]", + "fadd st0,st1", + "fstp dword [esp + 0x50]", + "fsubr qword [esp + 0x30]", + "fstp dword [esp + 0x64]", + "fsubrp", + "fstp dword [esp + 0x8]", + "fld qword [esp + 0x98]", + "fsub qword [esp + 0xd0]", + "fmul qword [0x00a77be0]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x54]", + "fsubrp", + "fstp dword [esp + 0x60]", + "fxch st2", + "fsubrp st3,st0", + "fxch st2", + "fstp dword [esp + 0x8]", + "fsubrp", + "fmul qword [0x00a77b10]", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x4]", + "fld dword [esp + 0x8]", + "lea eax,[ecx + ecx*0x8]", + "fld st0", + "mov ecx,dword [ebp + 0xc]", + "fadd st0,st2", + "shl eax,0x4", + "add eax,0xb183d0", + "fstp dword [esp + 0x58]", + "fsubrp", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x5c]", + "fld st0", + "fchs", + "fmul dword [eax]", + "fstp dword [ecx]", + "fld dword [eax + 0x4]", + "fld dword [esp + 0x60]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x4]", + "fld dword [eax + 0x8]", + "fld dword [esp + 0x64]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x8]", + "fld dword [eax + 0xc]", + "fld dword [esp + 0x68]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0xc]", + "fld dword [eax + 0x10]", + "fld dword [esp + 0x6c]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x10]", + "fld dword [eax + 0x14]", + "fld dword [esp + 0x70]", + "fld st0", + "fchs", + "fmulp st2", + "fxch", + "fstp dword [ecx + 0x14]", + "fld dword [eax + 0x18]", + "fld dword [esp + 0x74]", + "fchs", + "fmulp", + "fstp dword [ecx + 0x18]", + "fld dword [eax + 0x1c]", + "fld dword [esp + 0x78]", + "fchs", + "fmulp", + "fstp dword [ecx + 0x1c]", + "fld dword [eax + 0x20]", + "fld dword [esp + 0x7c]", + "fchs", + "fmulp", + "fstp dword [ecx + 0x20]", + "fld dword [eax + 0x24]", + "fmul dword [esp + 0x7c]", + "fstp dword [ecx + 0x24]", + "fld dword [eax + 0x28]", + "fmul dword [esp + 0x78]", + "fstp dword [ecx + 0x28]", + "fld dword [eax + 0x2c]", + "fmul dword [esp + 0x74]", + "fstp dword [ecx + 0x2c]", + "fmul dword [eax + 0x30]", + "fstp dword [ecx + 0x30]", + "fmul dword [eax + 0x34]", + "fstp dword [ecx + 0x34]", + "fmul dword [eax + 0x38]", + "fstp dword [ecx + 0x38]", + "fmul dword [eax + 0x3c]", + "fstp dword [ecx + 0x3c]", + "fmul dword [eax + 0x40]", + "fstp dword [ecx + 0x40]", + "fmul dword [eax + 0x44]", + "fstp dword [ecx + 0x44]", + "fld dword [esp + 0x58]", + "fld dword [eax + 0x48]", + "fmul st1", + "fstp dword [ecx + 0x48]", + "fld dword [esp + 0x54]", + "fld dword [eax + 0x4c]", + "fmul st1", + "fstp dword [ecx + 0x4c]", + "fld dword [esp + 0x50]", + "fld dword [eax + 0x50]", + "fmul st1", + "fstp dword [ecx + 0x50]", + "fld dword [esp + 0x4c]", + "fld dword [eax + 0x54]", + "fmul st1", + "fstp dword [ecx + 0x54]", + "fld dword [esp + 0x48]", + "fld dword [eax + 0x58]", + "fmul st1", + "fstp dword [ecx + 0x58]", + "fld dword [esp + 0x44]", + "fld dword [eax + 0x5c]", + "fmul st1", + "fstp dword [ecx + 0x5c]", + "fld dword [esp + 0x40]", + "fst qword [esp + 0x18]", + "fmul dword [eax + 0x60]", + "fstp dword [ecx + 0x60]", + "fld dword [esp + 0x3c]", + "fst qword [esp + 0x80]", + "fmul dword [eax + 0x64]", + "fstp dword [ecx + 0x64]", + "fld dword [esp + 0x38]", + "fld dword [eax + 0x68]", + "fmul st1", + "fstp dword [ecx + 0x68]", + "fmul dword [eax + 0x6c]", + "fstp dword [ecx + 0x6c]", + "fld dword [eax + 0x70]", + "fmul qword [esp + 0x80]", + "fstp dword [ecx + 0x70]", + "fld dword [eax + 0x74]", + "fmul qword [esp + 0x18]", + "fstp dword [ecx + 0x74]", + "fmul dword [eax + 0x78]", + "fstp dword [ecx + 0x78]", + "fmul dword [eax + 0x7c]", + "fstp dword [ecx + 0x7c]", + "fmul dword [eax + 0x80]", + "fstp dword [ecx + 0x80]", + "fmul dword [eax + 0x84]", + "fstp dword [ecx + 0x84]", + "fmul dword [eax + 0x88]", + "fstp dword [ecx + 0x88]", + "fmul dword [eax + 0x8c]", + "fstp dword [ecx + 0x8c]", + "mov esp,ebp", + "pop ebp" + ], + "ExpectedArm64ASM": [ + "ldr w4, [x9, #8]", + "ldr s2, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w20, #0x0", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w4, #0x4 (4)", + "str s3, [x21]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w4, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "ldr s5, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w4, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #4]", + "add w21, w4, #0xc (12)", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v3.8b, v0.8b", + "str d3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x21]", + "ldr s4, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mov w21, #0x7b70", + "movk w21, #0xa7, lsl #16", + "ldr d6, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v6.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w21, #0x7b68", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w21, #0x7b60", + "movk w21, #0xa7, lsl #16", + "ldr d8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc0 (192)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr d3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xd0 (208)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xb8 (184)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0xc8 (200)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr d3, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr d3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w21, #0x7b58", + "movk w21, #0xa7, lsl #16", + "ldr d3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v3.8b, v0.8b", + "str d3, [x22]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v4.8b, v0.8b", + "str d4, [x22]", + "ldr s4, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w22, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x22]", + "mov w22, #0x7b50", + "movk w22, #0xa7, lsl #16", + "ldr d9, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w22, #0x7b48", + "movk w22, #0xa7, lsl #16", + "ldr d3, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w22, #0x7b40", + "movk w22, #0xa7, lsl #16", + "ldr d4, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v4.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xb4 (180)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr d10, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xc4 (196)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d10, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v10.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xa8 (168)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x98 (152)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "ldr s5, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v5.8b, v0.8b", + "str d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xb0 (176)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #160]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr d2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr d7, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x22]", + "ldr d5, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "ldr d5, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "mov w22, #0x7bd8", + "movk w22, #0xa7, lsl #16", + "ldr d5, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr d5, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v5.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s5, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w22, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x22]", + "ldr s7, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w22, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v8.8b, v0.8b", + "str d8, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr d8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x98 (152)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr d7, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr d7, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #180]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #192]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #176]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mov w21, #0x7b38", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #196]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #208]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xd0 (208)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x98 (152)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7bd0", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #168]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0xa8 (168)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xb8 (184)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #160]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xa0 (160)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b30", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x90 (144)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #200]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0xc8 (200)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x21]", + "ldr s9, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b28", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #200]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #144]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b20", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #184]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #168]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr d8, [x8, #160]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v8.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov w21, #0x7b18", + "movk w21, #0xa7, lsl #16", + "ldr d9, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v10.8b, v0.8b", + "str d10, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w21, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x21]", + "ldr d9, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr d6, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v6.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr d7, [x8, #208]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mov w21, #0x7be0", + "movk w21, #0xa7, lsl #16", + "ldr d7, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v7.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "ldr s6, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x21]", + "strb wzr, [x28, #1017]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w21, #0x7b10", + "movk w21, #0xa7, lsl #16", + "ldr d3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v3.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w4, w5, w5, lsl #3", + "ldr w5, [x9, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "lsl w4, w4, #4", + "mov w21, #0x83d0", + "movk w21, #0xb1, lsl #16", + "mvn w27, w4", + "adds w26, w4, w21", + "mov x4, x26", + "add w21, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mov w21, #0x8000", + "fmov d3, x20", + "mov v3.d[1], x21", + "eor v3.16b, v2.16b, v3.16b", + "ldr s4, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x5]", + "ldr s3, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "fmov d5, x20", + "mov v5.d[1], x21", + "eor v5.16b, v4.16b, v5.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w5, #0x4 (4)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "fmov d6, x20", + "mov v6.d[1], x21", + "eor v6.16b, v5.16b, v6.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w5, #0x8 (8)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x8, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "fmov d7, x20", + "mov v7.d[1], x21", + "eor v7.16b, v6.16b, v7.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w5, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "fmov d8, x20", + "mov v8.d[1], x21", + "eor v8.16b, v7.16b, v8.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w5, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s8, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "fmov d9, x20", + "mov v9.d[1], x21", + "eor v9.16b, v8.16b, v9.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w22, w5, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w5, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w22, w5, #0x1c (28)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x22]", + "ldr s3, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "fmov d10, x20", + "mov v10.d[1], x21", + "eor v9.16b, v9.16b, v10.16b", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x20 (32)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x24 (36)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s9, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x30 (48)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x34 (52)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x3c (60)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w5, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x4, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w5, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w5, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w5, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w5, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x20]", + "ldr s9, [x4, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v9.8b, v0.8b", + "str d9, [x20]", + "ldr s9, [x4, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x64 (100)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w5, #0x68 (104)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #108]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x6c (108)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x70 (112)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr d9, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v9.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w5, #0x74 (116)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w5, #0x78 (120)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w5, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x4, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s6", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w5, #0x80 (128)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w5, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x4, #136]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x4, #140]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w5, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "mov x8, x9", + "ldr w9, [x8]", + "add x8, x8, #0x4 (4)", + "strb wzr, [x28, #1298]" + ] + }, + "Block3": { + "ExpectedInstructionCount": 11537, + "x86Insts": [ + "fld dword [esi + 0x64]", + "mov eax,dword [esi + 0x88]", + "fstp dword [esp + 0x5c]", + "mov ecx,dword [esi + 0x8c]", + "fld dword [esi + 0x70]", + "mov edx,dword [esi + 0x90]", + "fstp dword [esp + 0x60]", + "mov dword [esp + 0x2e4],0x3f", + "fld dword [esi + 0x7c]", + "mov dword [esp + 0x94],eax", + "fstp dword [esp + 0x64]", + "mov dword [esp + 0x98],ecx", + "fld dword [esi + 0x68]", + "mov dword [esp + 0x9c],edx", + "fstp dword [esp + 0x14]", + "mov dword [esp + 0xe8],eax", + "fld dword [esi + 0x74]", + "mov dword [esp + 0xec],ecx", + "fstp dword [esp + 0x18]", + "mov dword [esp + 0xf0],edx", + "fld dword [esi + 0x80]", + "fstp dword [esp + 0x1c]", + "fld dword [esi + 0xf4]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x14]", + "fmul st1", + "fstp dword [esp + 0x8c]", + "fld dword [esp + 0x18]", + "fmul st1", + "fstp dword [esp + 0x7c]", + "fmul dword [esp + 0x1c]", + "fstp dword [esp + 0x84]", + "fld dword [esi + 0x6c]", + "fstp dword [esp + 0x14]", + "fld dword [esi + 0x78]", + "fstp dword [esp + 0x18]", + "fld dword [esi + 0x84]", + "fstp dword [esp + 0x1c]", + "fld dword [esi + 0xf0]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x14]", + "fmul st1", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x18]", + "fmul st1", + "fstp dword [esp + 0x50]", + "fmul dword [esp + 0x1c]", + "fstp dword [esp + 0x58]", + "fld dword [esi + 0x100]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x54]", + "fmul st1", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fst dword [esp + 0x10]", + "fld dword [esp + 0x50]", + "fmul st2", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fst dword [esp + 0x2c]", + "fld dword [esp + 0x58]", + "fmul st3", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fst dword [esp + 0x14]", + "fld dword [esp + 0x8c]", + "fmul st4", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x7c]", + "fmul st4", + "fstp dword [esp + 0x8c]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x84]", + "fmul st4", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x5c]", + "fmul st4", + "fstp dword [esp + 0x50]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x84]", + "fld dword [esp + 0x60]", + "fmul st4", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x64]", + "fmulp st4", + "fxch st3", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x94]", + "fld dword [esp + 0x84]", + "fadd st0,st1", + "fstp dword [esp + 0x84]", + "fld dword [esp + 0x98]", + "fld dword [esp + 0x7c]", + "fadd st0,st1", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x9c]", + "fld dword [esp + 0x5c]", + "fadd st0,st1", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x84]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x7c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x5c]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x44]", + "fadd dword [esp + 0x10]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x48]", + "fadd dword [esp + 0x2c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x40]", + "fadd dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x10]", + "fstp dword [esp + 0x5c]", + "mov eax,dword [esp + 0x5c]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xf4],eax", + "fstp dword [esp + 0x60]", + "mov ecx,dword [esp + 0x60]", + "fld dword [esp + 0x14]", + "mov dword [esp + 0xf8],ecx", + "fstp dword [esp + 0x64]", + "mov edx,dword [esp + 0x64]", + "fxch st4", + "mov dword [esp + 0xfc],edx", + "fst dword [esp + 0x5c]", + "fxch st3", + "fst dword [esp + 0x84]", + "fxch st5", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "mov eax,dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0x100],eax", + "fstp dword [esp + 0x18]", + "mov ecx,dword [esp + 0x18]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0x104],ecx", + "fstp dword [esp + 0x1c]", + "mov edx,dword [esp + 0x1c]", + "fxch st3", + "mov dword [esp + 0x108],edx", + "fst dword [esp + 0x5c]", + "fxch st5", + "fst dword [esp + 0x84]", + "fxch st3", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "mov eax,dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0x10c],eax", + "fstp dword [esp + 0x18]", + "mov ecx,dword [esp + 0x18]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0x110],ecx", + "fstp dword [esp + 0x1c]", + "mov edx,dword [esp + 0x1c]", + "fxch st5", + "mov dword [esp + 0x114],edx", + "fstp dword [esp + 0x5c]", + "fxch st2", + "fstp dword [esp + 0x84]", + "fxch st3", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "faddp st3,st0", + "fxch st2", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x2c]", + "fadd dword [esp + 0x10]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "mov eax,dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0x118],eax", + "mov eax,dword [ebx + 0x88]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x10]", + "mov ecx,dword [esp + 0x18]", + "fstp dword [esp + 0x1c]", + "mov edx,dword [esp + 0x1c]", + "fld dword [ebx + 0x64]", + "mov dword [esp + 0x11c],ecx", + "mov ecx,dword [ebx + 0x8c]", + "fstp dword [esp + 0x70]", + "fld dword [ebx + 0x70]", + "mov dword [esp + 0x120],edx", + "mov edx,dword [ebx + 0x90]", + "fstp dword [esp + 0x74]", + "fld dword [ebx + 0x7c]", + "mov dword [esp + 0x94],eax", + "mov dword [esp + 0x98],ecx", + "mov dword [esp + 0x9c],edx", + "fstp dword [esp + 0x78]", + "mov dword [esp + 0xac],eax", + "fld dword [ebx + 0x68]", + "mov dword [esp + 0xb0],ecx", + "fstp dword [esp + 0x2c]", + "mov dword [esp + 0xb4],edx", + "fld dword [ebx + 0x74]", + "fstp dword [esp + 0x30]", + "fld dword [ebx + 0x80]", + "fstp dword [esp + 0x34]", + "fld dword [ebx + 0xf4]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x30]", + "fmul st1", + "fstp dword [esp + 0x48]", + "fmul dword [esp + 0x34]", + "fstp dword [esp + 0x44]", + "fld dword [ebx + 0x6c]", + "fstp dword [esp + 0x5c]", + "fld dword [ebx + 0x78]", + "fstp dword [esp + 0x60]", + "fld dword [ebx + 0x84]", + "fstp dword [esp + 0x64]", + "fld dword [ebx + 0xf0]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fld dword [esp + 0x5c]", + "fmul st1", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x60]", + "fmul st1", + "fstp dword [esp + 0x2c]", + "fmul dword [esp + 0x64]", + "fstp dword [esp + 0x10]", + "fld dword [ebx + 0x100]", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x14]", + "fmul st1", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fst dword [esp + 0x5c]", + "fld dword [esp + 0x2c]", + "fmul st2", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fst dword [esp + 0x84]", + "fld dword [esp + 0x10]", + "fmul st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x14]", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x40]", + "fmul st4", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x48]", + "fmul st4", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x44]", + "fmul st4", + "fstp dword [esp + 0x50]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x70]", + "fmul st4", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x74]", + "fmul st4", + "fstp dword [esp + 0x8c]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x78]", + "fmulp st4", + "fxch st3", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x94]", + "fld dword [esp + 0x14]", + "fadd st0,st1", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x98]", + "fld dword [esp + 0x2c]", + "fadd st0,st1", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x9c]", + "fld dword [esp + 0x10]", + "fadd st0,st1", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x70]", + "mov eax,dword [esp + 0x70]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xb8],eax", + "fstp dword [esp + 0x74]", + "mov ecx,dword [esp + 0x74]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0xbc],ecx", + "fstp dword [esp + 0x78]", + "mov edx,dword [esp + 0x78]", + "fxch st4", + "mov dword [esp + 0xc0],edx", + "fst dword [esp + 0x5c]", + "fxch st3", + "fst dword [esp + 0x84]", + "fxch st5", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x70]", + "mov eax,dword [esp + 0x70]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xc4],eax", + "fstp dword [esp + 0x74]", + "mov ecx,dword [esp + 0x74]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0xc8],ecx", + "fstp dword [esp + 0x78]", + "mov edx,dword [esp + 0x78]", + "fxch st3", + "mov dword [esp + 0xcc],edx", + "fst dword [esp + 0x5c]", + "fxch st5", + "fst dword [esp + 0x84]", + "fxch st3", + "fst dword [esp + 0x7c]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x8c]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x4c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd st0,st3", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd st0,st2", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd st0,st5", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x40]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fadd dword [esp + 0x5c]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x2c]", + "fadd dword [esp + 0x84]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x10]", + "fadd dword [esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x14]", + "fstp dword [esp + 0x70]", + "mov eax,dword [esp + 0x70]", + "fld dword [esp + 0x2c]", + "mov dword [esp + 0xd0],eax", + "fstp dword [esp + 0x74]", + "mov ecx,dword [esp + 0x74]", + "fld dword [esp + 0x10]", + "mov dword [esp + 0xd4],ecx", + "fstp dword [esp + 0x78]", + "mov edx,dword [esp + 0x78]", + "mov dword [esp + 0xd8],edx", + "fxch st5", "push 0x0", - "push ecx", - "fstp dword [esp]", - "push 0x1", - "push 0xa33148", - "push 0x4e414552", - "call 0x00417220", - "add esp,0x20" + "fstp dword [esp + 0x60]", + "fxch st2", + "fstp dword [esp + 0x88]", + "fxch st3", + "fstp dword [esp + 0x80]", + "fld dword [esp + 0x2c]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x58]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x54]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x5c]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x90]", + "fstp dword [esp + 0x30]", + "fld dword [esp + 0x50]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "faddp st3,st0", + "fxch st2", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x30]", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x30]", + "fadd dword [esp + 0x14]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "fsub dword [esp + 0x44]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x30]", + "fsub dword [esp + 0x4c]", + "fstp dword [esp + 0x30]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x48]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "fsub dword [esp + 0x60]", + "fstp dword [esp + 0x18]", + "fld dword [esp + 0x30]", + "fsub dword [esp + 0x88]", + "fstp dword [esp + 0x30]", + "fld dword [esp + 0x14]", + "fsub dword [esp + 0x80]", + "fstp dword [esp + 0x14]", + "fld dword [esp + 0x18]", + "fstp dword [esp + 0x74]", + "mov eax,dword [esp + 0x74]", + "fld dword [esp + 0x30]", + "mov dword [esp + 0xe0],eax", + "fstp dword [esp + 0x78]", + "mov ecx,dword [esp + 0x78]", + "fld dword [esp + 0x14]", + "mov dword [esp + 0xe4],ecx", + "fstp dword [esp + 0x7c]", + "mov edx,dword [esp + 0x7c]", + "lea ecx,[esp + 0x190]", + "mov dword [esp + 0xe8],edx", + "call 0x0070df30", + "mov dword [esp + 0x198],esi", + "add esi,0xec", + "push esi", + "lea ecx,[esp + 0x190]", + "mov dword [esp + 0x314],0x0", + "call 0x0070e040", + "mov ecx,0x19", + "lea esi,[esp + 0x1b8]", + "lea edi,[esp + 0x21c]", + "rep movsd", + "mov dword [esp + 0x198],ebx", + "add ebx,0xec", + "push ebx", + "lea ecx,[esp + 0x190]", + "call 0x0070e040", + "mov ecx,0x19", + "lea esi,[esp + 0x1b8]", + "lea edi,[esp + 0x284]", + "rep movsd", + "lea esi,[esp + 0x124]", + "mov edi,0x5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr s2, [x10, #100]", + "ldr w4, [x10, #136]", + "add w20, w8, #0x5c (92)", + "str s2, [x20]", + "ldr w5, [x10, #140]", + "ldr s2, [x10, #112]", + "ldr w6, [x10, #144]", + "add w20, w8, #0x60 (96)", + "str s2, [x20]", + "mov w20, #0x3f", + "str w20, [x8, #740]", + "ldr s2, [x10, #124]", + "str w4, [x8, #148]", + "add w20, w8, #0x64 (100)", + "str s2, [x20]", + "str w5, [x8, #152]", + "ldr s2, [x10, #104]", + "str w6, [x8, #156]", + "add w20, w8, #0x14 (20)", + "str s2, [x20]", + "str w4, [x8, #232]", + "ldr s2, [x10, #116]", + "str w5, [x8, #236]", + "add w20, w8, #0x18 (24)", + "str s2, [x20]", + "str w6, [x8, #240]", + "ldr s2, [x10, #128]", + "add w20, w8, #0x1c (28)", + "str s2, [x20]", + "ldr s2, [x10, #244]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x10, #108]", + "add w20, w8, #0x14 (20)", + "str s2, [x20]", + "ldr s2, [x10, #120]", + "add w20, w8, #0x18 (24)", + "str s2, [x20]", + "ldr s2, [x10, #132]", + "add w20, w8, #0x1c (28)", + "str s2, [x20]", + "ldr s2, [x10, #240]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x10, #256]", + "add w20, w8, #0x28 (40)", + "str s2, [x20]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #84]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x10 (16)", + "str s3, [x20]", + "ldr s3, [x8, #80]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", + "str s3, [x20]", + "ldr s3, [x8, #88]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x14 (20)", + "str s3, [x20]", + "ldr s3, [x8, #140]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #76]", + "add w20, w8, #0x44 (68)", + "str s3, [x20]", + "ldr s3, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #140]", + "add w20, w8, #0x48 (72)", + "str s3, [x20]", + "ldr s3, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #88]", + "add w20, w8, #0x40 (64)", + "str s3, [x20]", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #80]", + "add w20, w8, #0x84 (132)", + "str s3, [x20]", + "ldr s3, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #84]", + "add w20, w8, #0x7c (124)", + "str s3, [x20]", + "ldr s3, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mov w20, #0x0", - "str w20, [x8, #-4]!", - "strb w22, [x28, #1298]", - "mov w22, #0xffffffff", - "str w22, [x8, #-4]!", - "mov w22, #0x172", - "movk w22, #0x100, lsl #16", - "str w22, [x8, #-4]!", - "mov w22, #0x37", - "str w22, [x8, #-4]!", - "str w5, [x8, #-4]!", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #40]", + "add w21, w8, #0x5c (92)", + "str s2, [x21]", + "ldr s2, [x8, #148]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #156]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "add w21, w8, #0x5c (92)", + "str s8, [x21]", + "ldr w4, [x8, #92]", + "ldr s8, [x8, #44]", + "str w4, [x8, #244]", + "add w21, w8, #0x60 (96)", + "str s8, [x21]", + "ldr w5, [x8, #96]", + "ldr s8, [x8, #20]", + "str w5, [x8, #248]", + "add w21, w8, #0x64 (100)", + "str s8, [x21]", + "ldr w6, [x8, #100]", + "strb wzr, [x28, #1017]", + "str w6, [x8, #252]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr w4, [x8, #20]", + "ldr s8, [x8, #44]", + "str w4, [x8, #256]", + "add w21, w8, #0x18 (24)", + "str s8, [x21]", + "ldr w5, [x8, #24]", + "ldr s8, [x8, #16]", + "str w5, [x8, #260]", + "add w21, w8, #0x1c (28)", + "str s8, [x21]", + "ldr w6, [x8, #28]", + "strb wzr, [x28, #1017]", + "str w6, [x8, #264]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr w4, [x8, #20]", + "ldr s8, [x8, #44]", + "str w4, [x8, #268]", + "add w21, w8, #0x18 (24)", + "str s8, [x21]", + "ldr w5, [x8, #24]", + "ldr s8, [x8, #16]", + "str w5, [x8, #272]", + "add w21, w8, #0x1c (28)", + "str s8, [x21]", + "ldr w6, [x8, #28]", + "strb wzr, [x28, #1017]", + "str w6, [x8, #276]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x21]", + "ldr s4, [x8, #76]", + "add w21, w8, #0x40 (64)", + "str s4, [x21]", + "ldr s4, [x8, #140]", + "add w21, w8, #0x48 (72)", + "str s4, [x21]", + "ldr s4, [x8, #88]", + "add w21, w8, #0x44 (68)", + "str s4, [x21]", + "ldr s4, [x8, #80]", + "add w21, w8, #0x14 (20)", + "str s4, [x21]", + "ldr s4, [x8, #84]", + "add w21, w8, #0x2c (44)", + "str s4, [x21]", + "ldr s4, [x8, #40]", + "add w21, w8, #0x10 (16)", + "str s4, [x21]", + "ldr s4, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", + "ldr w4, [x8, #20]", + "ldr s2, [x8, #44]", + "str w4, [x8, #280]", + "ldr w4, [x7, #136]", + "add w21, w8, #0x18 (24)", + "str s2, [x21]", + "ldr s2, [x8, #16]", + "ldr w5, [x8, #24]", + "add w21, w8, #0x1c (28)", + "str s2, [x21]", + "ldr w6, [x8, #28]", + "ldr s2, [x7, #100]", + "str w5, [x8, #284]", + "ldr w5, [x7, #140]", + "add w21, w8, #0x70 (112)", + "str s2, [x21]", + "ldr s2, [x7, #112]", + "str w6, [x8, #288]", + "ldr w6, [x7, #144]", + "add w21, w8, #0x74 (116)", + "str s2, [x21]", + "ldr s2, [x7, #124]", + "str w4, [x8, #148]", + "str w5, [x8, #152]", + "str w6, [x8, #156]", + "add w21, w8, #0x78 (120)", + "str s2, [x21]", + "str w4, [x8, #172]", + "ldr s2, [x7, #104]", + "str w5, [x8, #176]", + "add w21, w8, #0x2c (44)", + "str s2, [x21]", + "str w6, [x8, #180]", + "ldr s2, [x7, #116]", + "add w21, w8, #0x30 (48)", + "str s2, [x21]", + "ldr s2, [x7, #128]", + "add w21, w8, #0x34 (52)", + "str s2, [x21]", + "ldr s2, [x7, #244]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x40 (64)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x48 (72)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x7, #108]", + "add w21, w8, #0x5c (92)", + "str s2, [x21]", + "ldr s2, [x7, #120]", + "add w21, w8, #0x60 (96)", + "str s2, [x21]", + "ldr s2, [x7, #132]", + "add w21, w8, #0x64 (100)", + "str s2, [x21]", + "ldr s2, [x7, #240]", + "add w21, w8, #0x14 (20)", + "str s2, [x21]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #100]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x7, #256]", + "add w21, w8, #0x28 (40)", + "str s2, [x21]", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w21, w8, #0x5c (92)", + "str s3, [x21]", + "ldr s3, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w21, w8, #0x84 (132)", + "str s3, [x21]", + "ldr s3, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w21, w8, #0x7c (124)", + "str s3, [x21]", + "ldr s3, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x28 (40)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s3, [x21]", + "ldr s3, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x54 (84)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s3, [x21]", + "ldr s3, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x50 (80)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s3, [x21]", + "ldr s3, [x8, #112]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x58 (88)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s3, [x21]", + "ldr s3, [x8, #116]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x8c (140)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s3, [x21]", + "ldr s3, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x4c (76)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s2, [x21]", + "ldr s2, [x8, #148]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s3, s0", + "str s3, [x21]", + "ldr s3, [x8, #152]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s7, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s7, s0", + "str s7, [x21]", + "ldr s7, [x8, #156]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s7", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", + "ldr w4, [x8, #112]", + "ldr s8, [x8, #44]", + "str w4, [x8, #184]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", + "ldr w5, [x8, #116]", + "ldr s8, [x8, #16]", + "str w5, [x8, #188]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", + "ldr w6, [x8, #120]", + "strb wzr, [x28, #1017]", + "str w6, [x8, #192]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", + "ldr w4, [x8, #112]", + "ldr s8, [x8, #44]", + "str w4, [x8, #196]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", + "ldr w5, [x8, #116]", + "ldr s8, [x8, #16]", + "str w5, [x8, #200]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", + "ldr w6, [x8, #120]", + "strb wzr, [x28, #1017]", + "str w6, [x8, #204]", + "add w21, w8, #0x5c (92)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x84 (132)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "strb wzr, [x28, #1017]", + "add w21, w8, #0x7c (124)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #40]", + "add w21, w8, #0x40 (64)", + "str s8, [x21]", + "ldr s8, [x8, #84]", + "add w21, w8, #0x48 (72)", + "str s8, [x21]", + "ldr s8, [x8, #80]", + "add w21, w8, #0x44 (68)", + "str s8, [x21]", + "ldr s8, [x8, #88]", + "add w21, w8, #0x14 (20)", + "str s8, [x21]", + "ldr s8, [x8, #140]", + "add w21, w8, #0x2c (44)", + "str s8, [x21]", + "ldr s8, [x8, #76]", + "add w21, w8, #0x10 (16)", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81387,8 +54377,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -81400,410 +54390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "bic w21, w23, w21", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "mov w20, #0x3c14", - "movk w20, #0xa3, lsl #16", - "str w20, [x8, #-4]!", - "mov w20, #0x4157", - "movk w20, #0x5242, lsl #16", - "str w20, [x8, #-4]!", - "mov w20, #0x23c9", - "movk w20, #0x1, lsl #16", - "mov w21, #0x71fe", - "movk w21, #0x41, lsl #16", - "add w21, w20, w21", - "str w20, [x8, #-4]!", - "ldr x0, [x28, #2272]", - "and x3, x21, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block5": { - "ExpectedInstructionCount": 586, - "x86Insts": [ - "mov ebx,dword [eax + 0x68]", - "fld dword [esi + 0x2c]", - "mov eax,dword [ebp + 0x68]", - "sub esp,0x14", - "fstp dword [esp + 0x10]", - "movzx ecx,al", - "fld1", - "mov dword [esp + 0x38],ecx", - "fstp dword [esp + 0xc]", - "movzx edx,bl", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "mov dword [esp + 0x40],eax", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],edx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x24]", - "fld dword [esi + 0x2c]", - "movzx eax,byte [esp + 0x41]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x38],eax", - "fld1", - "movzx ecx,bh", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],ecx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x28]", - "mov eax,dword [esp + 0x40]", - "fld dword [esi + 0x2c]", - "fstp dword [esp + 0x10]", - "shr eax,0x10", - "fld1", - "movzx edx,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x40],edx", - "fldz", - "shr ebx,0x10", - "movzx eax,bl", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x40]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x40],eax", - "fild dword [esp + 0x40]", - "fdivrp", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x2c]", - "fld1", - "fst dword [esp + 0x30]", - "mov ecx,dword [esp + 0x24]", - "mov edx,dword [esp + 0x28]", - "mov eax,dword [esp + 0x2c]", - "mov dword [0x00b45e14],ecx", - "mov ecx,dword [esp + 0x30]", - "mov [0x00b45e1c],eax", - "mov dword [0x00b45e20],ecx", - "mov dword [0x00b45e18],edx", - "fld dword [esi + 0x2c]", - "mov eax,dword [ebp + 0x6c]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x40],eax", - "fstp dword [esp + 0xc]", - "movzx eax,al", - "fldz", - "mov dword [esp + 0x38],eax", - "fstp dword [esp + 0x8]", - "mov edx,dword [esi + 0x20]", - "fild dword [esp + 0x38]", - "mov ebx,dword [edx + 0x6c]", - "fld qword [0x00a3ddd8]", - "movzx ecx,bl", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],ecx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x24]", - "fld dword [esi + 0x2c]", - "movzx edx,byte [esp + 0x41]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x38],edx", - "fld1", - "movzx eax,bh", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],eax", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x28]", - "mov eax,dword [esp + 0x40]", - "fld dword [esi + 0x2c]", - "fstp dword [esp + 0x10]", - "shr eax,0x10", - "fld1", - "movzx ecx,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x40],ecx", - "fldz", - "shr ebx,0x10", - "movzx edx,bl", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x40]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x40],edx", - "fild dword [esp + 0x40]", - "fdivrp", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp]", - "call 0x00410eb0", - "mov eax,dword [esp + 0x24]", - "fstp dword [esp + 0x2c]", - "fld1", - "mov ecx,dword [esp + 0x28]", - "mov edx,dword [esp + 0x2c]", - "fst dword [esp + 0x30]", - "mov [0x00b45e24],eax", - "mov eax,dword [esp + 0x30]", - "mov dword [0x00b45e2c],edx", - "mov [0x00b45e30],eax", - "mov dword [0x00b45e28],ecx", - "fld dword [esi + 0x2c]", - "mov eax,dword [ebp + 0x70]", - "fstp dword [esp + 0x10]", - "movzx edx,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x38],edx", - "fldz", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp + 0x8]", - "mov ebx,dword [ecx + 0x70]", - "fild dword [esp + 0x38]", - "mov dword [esp + 0x40],eax", - "fld qword [0x00a3ddd8]", - "movzx eax,bl", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],eax", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x24]", - "fld dword [esi + 0x2c]", - "movzx ecx,byte [esp + 0x41]", - "fstp dword [esp + 0x10]", - "mov dword [esp + 0x38],ecx", - "fld1", - "movzx edx,bh", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x38]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x38],edx", - "fild dword [esp + 0x38]", - "fdivrp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x38]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x28]", - "mov eax,dword [esp + 0x40]", - "fld dword [esi + 0x2c]", - "fstp dword [esp + 0x10]", - "shr eax,0x10", - "fld1", - "movzx eax,al", - "fstp dword [esp + 0xc]", - "mov dword [esp + 0x40],eax", - "fldz", - "fstp dword [esp + 0x8]", - "fild dword [esp + 0x40]", - "fld qword [0x00a3ddd8]", - "fdiv st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "shr ebx,0x10", - "movzx ecx,bl", - "fstp dword [esp + 0x4]", - "mov dword [esp + 0x40],ecx", - "fild dword [esp + 0x40]", - "fdivrp", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x40]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [esp + 0x2c]", - "fld1", - "mov edx,dword [esp + 0x24]", - "mov eax,dword [esp + 0x28]", - "fst dword [esp + 0x30]", - "mov ecx,dword [esp + 0x2c]", - "mov dword [0x00b45e34],edx", - "mov edx,dword [esp + 0x30]", - "mov [0x00b45e38],eax", - "mov dword [0x00b45e3c],ecx", - "mov dword [0x00b45e40],edx", - "fld dword [esi + 0x2c]", - "mov eax,dword [esi + 0x24]", - "fstp dword [esp + 0x10]", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [eax + 0x4c]", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0x4c]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e44]", - "fld dword [esi + 0x2c]", - "mov edx,dword [esi + 0x24]", - "mov eax,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [edx + 0x50]", - "fstp dword [esp + 0x4]", - "fld dword [eax + 0x50]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e48]", - "fld dword [esi + 0x2c]", - "mov ecx,dword [esi + 0x24]", - "add esp,0x8", - "fstp dword [esp + 0x8]", - "fld1", - "fstp dword [esp + 0x4]", - "fldz", - "fstp dword [esp]", - "call 0x004ed660", - "push ecx", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp]", - "call 0x004ed660", - "push ecx", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e4c]", - "mov ecx,dword [esi + 0x24]", - "fld dword [esi + 0x2c]", - "add esp,0x8", - "fstp dword [esp + 0x8]", - "fld1", - "fstp dword [esp + 0x4]", - "fldz", - "fstp dword [esp]", - "call 0x004ed680", - "push ecx", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp]", - "call 0x004ed680", - "push ecx", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e50]", - "fld dword [esi + 0x2c]", - "mov ecx,dword [esi + 0x24]", - "mov edx,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [ecx + 0x58]", - "fstp dword [esp + 0x4]", - "fld dword [edx + 0x58]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e54]", - "fld dword [esi + 0x2c]", - "mov eax,dword [esi + 0x24]", - "mov ecx,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [eax + 0x5c]", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0x5c]", - "fstp dword [esp]", - "call 0x00410eb0", - "fstp dword [0x00b45e58]", - "fld dword [esi + 0x2c]", - "mov edx,dword [esi + 0x24]", - "mov eax,dword [esi + 0x20]", - "fstp dword [esp + 0x10]", - "fld1", - "fstp dword [esp + 0xc]", - "fldz", - "fstp dword [esp + 0x8]", - "fld dword [edx + 0x54]", - "fstp dword [esp + 0x4]", - "fld dword [eax + 0x54]", - "fstp dword [esp]", - "call 0x00410eb0", - "add esp,0x14" - ], - "ExpectedArm64ASM": [ - "ldr w7, [x4, #104]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, #44]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81815,7 +54404,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81828,26 +54417,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #104]", - "mvn w27, w8", - "subs w26, w8, #0x14 (20)", - "cfinv", - "mov x8, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81859,11 +54432,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81873,27 +54445,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "uxtb w5, w4", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr q2, [x28, #2608]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #56]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81906,10 +54460,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81919,26 +54475,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "uxtb w6, w7", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81951,8 +54491,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -81964,49 +54504,37 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr w23, [x8, #56]", - "mov w24, #0x0", - "sxtw x23, w23", - "mrs x25, nzcv", - "cmp x23, #0x0 (0)", - "mov w12, #0x8000", - "csel x13, x12, xzr, lt", - "cneg x23, x23, mi", - "mov w14, #0x3f", - "mov x0, #0x3f", - "clz x15, x23", - "sub x15, x0, x15", - "sub x15, x14, x15", - "lsl x16, x23, x15", - "mov w17, #0x403e", - "sub x15, x17, x15", - "cmp x23, #0x0 (0)", - "csel x23, x24, x15, eq", - "orr x23, x13, x23", - "fmov d2, x16", - "fmov d3, x23", - "mov v2.d[1], v3.d[0]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "msr nzcv, x25", - "str w4, [x8, #64]", - "ldrb w20, [x28, #1019]", - "mov w23, #0xddd8", - "movk w23, #0xa3, lsl #16", - "ldr d2, [x23]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82018,9 +54546,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82031,23 +54559,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82060,11 +54574,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1632]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82075,26 +54589,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82107,8 +54605,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -82120,15 +54618,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82140,7 +54632,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82153,19 +54645,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82177,11 +54660,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82191,48 +54673,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "str w6, [x8, #56]", - "ldrb w20, [x28, #1019]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "ldr w23, [x8, #56]", - "sxtw x23, w23", - "mrs x25, nzcv", - "cmp x23, #0x0 (0)", - "csel x12, x12, xzr, lt", - "cneg x23, x23, mi", - "mov x0, #0x3f", - "clz x13, x23", - "sub x13, x0, x13", - "sub x13, x14, x13", - "lsl x14, x23, x13", - "sub x13, x17, x13", - "cmp x23, #0x0 (0)", - "csel x23, x24, x13, eq", - "orr x23, x12, x23", - "fmov d2, x14", - "fmov d3, x23", - "mov v2.d[1], v3.d[0]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "msr nzcv, x25", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82245,11 +54688,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1632]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82260,19 +54703,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82285,8 +54719,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -82298,15 +54732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82318,7 +54746,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82331,19 +54759,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82354,388 +54773,23 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov w20, #0x3e2b", - "movk w20, #0x1, lsl #16", - "mov w22, #0xe52", - "movk w22, #0x41, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block6": { - "ExpectedInstructionCount": 71, - "x86Insts": [ - "mov eax,dword [esp + 0x110]", - "fldz", - "mov ecx,dword [eax]", - "mov edx,dword [esp + 0x5c]", - "mov ebx,dword [edx + 0x18]", - "mov esi,dword [esp + 0x58]", - "mov dword [ebx + 0xc],ecx", - "mov edx,dword [eax + 0x4]", - "mov dword [ebx + 0x10],edx", - "mov eax,dword [eax + 0x8]", - "mov dword [ebx + 0x14],eax", - "mov ecx,dword [esi + 0x50]", - "push ecx", - "fstp dword [esp]", - "call 0x00784370", - "mov ecx,dword [esi + 0x50]", - "fstp dword [esp + 0x54]", - "fldz", - "push ecx", - "fstp dword [esp]", - "call 0x00784370", - "fstp dword [esp + 0x64]", - "mov eax,dword [esp + 0x11c]", - "lea ebp,[ebx + 0x1c]", - "mov esi,eax", - "mov ecx,0x9", - "mov edi,ebp", - "rep movsd", - "fld dword [eax + 0x4]", - "mov ecx,dword [esp + 0x120]", - "sub esp,0xc", - "fmul dword [ecx + 0x4]", - "fld dword [ecx]", - "fmul dword [eax]", - "faddp", - "fld dword [eax + 0x8]", - "fmul dword [ecx + 0x8]", - "faddp", - "fstp dword [esp + 0x28]", - "fld dword [eax + 0xc]", - "fmul dword [ecx]", - "fld dword [eax + 0x10]", - "fmul dword [ecx + 0x4]", - "faddp", - "fld dword [eax + 0x14]", - "fmul dword [ecx + 0x8]", - "faddp", - "fstp dword [esp + 0x44]", - "fld dword [eax + 0x18]", - "fmul dword [ecx]", - "fld dword [eax + 0x1c]", - "fmul dword [ecx + 0x4]", - "faddp", - "fld dword [eax + 0x20]", - "mov eax,esp", - "fmul dword [ecx + 0x8]", - "faddp", - "fstp dword [esp + 0x34]", - "fld dword [esp + 0x28]", - "fstp dword [esp + 0x48]", - "mov ecx,dword [esp + 0x48]", - "fld dword [esp + 0x44]", - "mov dword [eax],ecx", - "fstp dword [esp + 0x4c]", - "mov edx,dword [esp + 0x4c]", - "fld dword [esp + 0x34]", - "mov dword [eax + 0x4],edx", - "fstp dword [esp + 0x50]", - "mov ecx,dword [esp + 0x50]", - "fld dword [esp + 0x3c]", - "mov dword [eax + 0x8],ecx", - "push ecx", - "mov ecx,ebp", - "fstp dword [esp]", - "call 0x0078f050", - "fld dword [esp + 0x54]", - "sub esp,0x8", - "fstp dword [esp + 0x4]", - "fld dword [esp + 0x6c]", - "fadd dword [esp + 0x3c]", - "fstp dword [esp + 0x24]", - "fld dword [esp + 0x24]", - "mov ecx,ebp", - "fstp dword [esp]", - "call 0x0078ef60", - "fld dword [ebp + 0xc]", - "mov esi,dword [esp + 0x58]", - "fld dword [0x00b2b71c]", - "fld st0", - "fmulp st2", - "fld dword [ebp]", - "fld dword [0x00b2b718]", - "fld st0", - "fmulp st2", - "fxch st3", - "faddp", - "fld dword [ebp + 0x18]", - "fld dword [0x00b2b720]", - "fld st0", - "fmulp st2", - "fxch st2", - "faddp", - "fstp dword [esp + 0x1c]", - "fld dword [ebp + 0x10]", - "fmul st2", - "fld dword [ebp + 0x4]", - "fmul st4", - "faddp", - "fld dword [ebp + 0x1c]", - "fmul st2", - "faddp", - "fstp dword [esp + 0x38]", - "fld dword [ebp + 0x14]", - "fmulp st2", - "fld dword [ebp + 0x8]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul dword [ebp + 0x20]", - "faddp", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x1c]", - "fstp dword [esp + 0x3c]", - "mov edx,dword [esp + 0x3c]", - "fld dword [esp + 0x38]", - "mov dword [ebx],edx", - "fstp dword [esp + 0x40]", - "mov eax,dword [esp + 0x40]", - "fld dword [esp + 0x28]", - "mov dword [ebx + 0x4],eax", - "fstp dword [esp + 0x44]", - "mov ecx,dword [esp + 0x44]", - "fldz", - "mov dword [ebx + 0x8],ecx", - "mov ecx,dword [esi + 0x68]", - "push ecx", - "fstp dword [esp]", - "call 0x00784210", - "fmul dword [esp + 0x6c]", - "fstp dword [ebx + 0x18]", - "mov ecx,dword [esi + 0x5c]", - "fldz", - "push ecx", - "fstp dword [esp]", - "call 0x00784210", - "fmul dword [esp + 0x80]", - "push 0xb2b724", - "mov ecx,ebx", - "fstp dword [esp + 0x54]", - "call 0x0078fcc0", - "fmul qword [0x00a8ba48]", - "fstp dword [esp + 0x34]", - "fld dword [esp + 0x34]", - "fsubr qword [0x00a65a18]", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "fabs", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "fmul qword [0x00a8c698]", - "fld1", - "fsubrp", - "fstp dword [esp + 0x38]", - "fld dword [0x00b2b72c]", - "fld st0", - "fmul dword [ebx + 0x4]", - "fld dword [ebx + 0x8]", - "fld dword [0x00b2b728]", - "fld st0", - "fmulp st2", - "fxch st2", - "fsubrp", - "fstp dword [esp + 0x24]", - "fld dword [ebx + 0x8]", - "fld dword [0x00b2b724]", - "fld st0", - "fmulp st2", - "fld dword [ebx]", - "fmulp st4", - "fxch", - "fsubrp st3,st0", - "fxch st2", - "fstp dword [esp + 0x30]", - "fmul dword [ebx]", - "fld dword [ebx + 0x4]", - "fmulp st2", - "fsubrp", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x30]", - "fld dword [esp + 0x24]", - "fld dword [esp + 0x4c]", - "fld st1", - "fmulp st2", - "fld st2", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul st0", - "faddp", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "call 0x00982c30", - "fstp dword [esp + 0x1c]", - "fld dword [esp + 0x1c]", - "mov ecx,dword [esi + 0x70]", - "fld1", - "push ecx", - "fdivrp", - "fstp dword [esp + 0x20]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x20]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x34]", - "fmul st1", - "fstp dword [esp + 0x44]", - "fmul dword [esp + 0x50]", - "fstp dword [esp + 0x48]", - "fldz", - "fstp dword [esp]", - "call 0x00784210", - "fsub qword [0x00a2faa0]", - "mov edx,dword [esp + 0x3c]", - "mov ecx,dword [esp + 0x40]", - "sub esp,0xc", - "fadd st0,st0", - "mov eax,esp", - "mov dword [eax],edx", - "fmul qword [0x00a3d360]", - "fstp dword [esp + 0x28]", - "fld1", - "fst dword [esp + 0xb8]", - "fldz", - "fst dword [esp + 0xbc]", - "fst dword [esp + 0xc0]", - "fst dword [esp + 0xc4]", - "fst dword [esp + 0xcc]", - "fst dword [esp + 0xd0]", - "fstp dword [esp + 0xd4]", - "fst dword [esp + 0xc8]", - "fstp dword [esp + 0xd8]", - "fld dword [esp + 0x28]", - "mov edx,dword [esp + 0x50]", - "fmul dword [esp + 0x90]", - "mov dword [eax + 0x4],ecx", - "push ecx", - "mov dword [eax + 0x8],edx", - "fmul dword [esp + 0x44]", - "lea ecx,[esp + 0xbc]", - "fmul dword [esp + 0x48]", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x2c]", - "fstp dword [esp]", - "call 0x0078f160", - "lea eax,[esp + 0xac]", - "push eax", - "lea ecx,[esp + 0xd4]", - "push ecx", - "mov ecx,ebp", - "call 0x0078edd0", - "cmp dword [esp + 0x124],0x0", - "mov esi,eax", - "mov ecx,0x9", - "mov edi,ebp", - "rep movsd", - "fld dword [ebp + 0xc]", - "fld dword [0x00b2b71c]", - "fld st0", - "fmulp st2", - "fld dword [ebp]", - "fld dword [0x00b2b718]", - "fld st0", - "fmulp st2", - "fxch st3", - "faddp", - "fld dword [ebp + 0x18]", - "fld dword [0x00b2b720]", - "fld st0", - "fmulp st2", - "fxch st2", - "faddp", - "fstp dword [esp + 0x1c]", - "fld dword [ebp + 0x10]", - "fmul st2", - "fld dword [ebp + 0x4]", - "fmul st4", - "faddp", - "fld dword [ebp + 0x1c]", - "fmul st2", - "faddp", - "fstp dword [esp + 0x38]", - "fld dword [ebp + 0x14]", - "fmulp st2", - "fld dword [ebp + 0x8]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul dword [ebp + 0x20]", - "faddp", - "fstp dword [esp + 0x28]", - "fld dword [esp + 0x1c]", - "fstp dword [esp + 0x3c]", - "mov edx,dword [esp + 0x3c]", - "fld dword [esp + 0x38]", - "mov dword [ebx],edx", - "fstp dword [esp + 0x40]", - "mov eax,dword [esp + 0x40]", - "fld dword [esp + 0x28]", - "mov dword [ebx + 0x4],eax", - "mov eax,dword [esp + 0x10c]", - "fstp dword [esp + 0x44]", - "mov ecx,dword [esp + 0x44]", - "mov dword [ebx + 0x8],ecx" - ], - "ExpectedArm64ASM": [ - "ldr w4, [x8, #272]", - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w5, [x4]", - "ldr w6, [x8, #92]", - "ldr w7, [x6, #24]", - "ldr w10, [x8, #88]", - "str w5, [x7, #12]", - "ldr w6, [x4, #4]", - "str w6, [x7, #16]", - "ldr w4, [x4, #8]", - "str w4, [x7, #20]", - "ldr w5, [x10, #80]", - "str w5, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82748,8 +54802,39 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x14 (20)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -82761,248 +54846,312 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "mov w20, #0x43c4", - "movk w20, #0x1, lsl #16", - "mov w22, #0x433f", - "movk w22, #0x78, lsl #16", - "add w22, w20, w22", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w21, w8, #0x10 (16)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s8, s0", + "str s8, [x21]", + "ldr s8, [x8, #20]", + "add w21, w8, #0x70 (112)", + "str s8, [x21]", + "ldr w4, [x8, #112]", + "ldr s8, [x8, #44]", + "str w4, [x8, #208]", + "add w21, w8, #0x74 (116)", + "str s8, [x21]", + "ldr w5, [x8, #116]", + "ldr s8, [x8, #16]", + "str w5, [x8, #212]", + "add w21, w8, #0x78 (120)", + "str s8, [x21]", + "ldr w6, [x8, #120]", + "str w6, [x8, #216]", + "strb wzr, [x28, #1017]", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block7": { - "ExpectedInstructionCount": 7653, - "x86Insts": [ - "fld dword [ecx + 0xc]", - "fld dword [ecx + 0x18]", - "fadd st0,st1", - "fstp dword [ecx + 0x18]", - "fld dword [ecx]", - "fadd st1,st0", - "fxch", - "fstp dword [ecx + 0xc]", - "fld dword [ecx + -0xc]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [ecx]", - "fld dword [ecx + -0x18]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [ecx + -0xc]", - "fld dword [ecx + -0x24]", - "fld st0", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fst dword [ecx + -0x18]", - "fld dword [ecx]", - "fld dword [ecx + 0x18]", - "fadd st0,st1", - "fstp dword [ecx + 0x18]", - "fadd st0,st1", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fst dword [ecx]", - "fld dword [ecx + -0xc]", - "fmul st6", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0xc]", - "fld st0", - "fmul st6", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fadd st0,st4", - "fstp dword [esp + 0x8]", - "fsubp st3,st0", - "fxch st2", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x8]", - "fld dword [esp + 0x4]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x38]", - "fsubp", - "fstp dword [esp + 0x40]", - "fxch", - "fmul st4", - "fstp dword [esp + 0x4]", - "fld dword [ecx + 0x18]", - "fld st0", - "fmul st4", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fadd st0,st2", - "fstp dword [esp + 0x8]", - "fsubp", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x8]", - "fld dword [esp + 0x4]", - "fld st0", - "fadd st0,st2", - "fstp dword [esp + 0x4c]", - "fsubp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fmul qword [0x00a77be0]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x48]", - "fmul qword [0x00a77bd8]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x4c]", - "fmul qword [0x00a77bd0]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x38]", - "fst dword [esp + 0x8]", - "fld dword [esp + 0x4c]", - "fadd st1,st0", - "fxch", - "fstp dword [esp + 0x38]", - "fsubr dword [esp + 0x8]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x3c]", - "fst dword [esp + 0x8]", - "fld dword [esp + 0x48]", - "fadd st1,st0", - "fxch", - "fstp dword [esp + 0x3c]", - "fsubr dword [esp + 0x8]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x40]", - "fst dword [esp + 0x8]", - "fld dword [esp + 0x44]", - "fadd st1,st0", - "fxch", - "fstp dword [esp + 0x40]", - "fsubr dword [esp + 0x8]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x38]", - "fmul qword [0x00a77bc8]", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x3c]", - "fmul qword [0x00a77bc0]", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x40]", - "fmul qword [0x00a77bb8]", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x44]", - "fmul qword [0x00a77bb0]", - "fstp dword [esp + 0x44]", - "fld dword [esp + 0x48]", - "fmul qword [0x00a77ba8]", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x4c]", - "fmul qword [0x00a77ba0]", - "fstp dword [esp + 0x4c]", - "fld dword [esp + 0x38]", - "fchs", - "fld st0", - "fmul st2", - "fstp dword [esp + 0x58]", - "fld qword [0x00a77b98]", - "fmul st1", - "fxch", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x3c]", - "fchs", - "fld st0", - "fld qword [0x00a77b90]", - "fmul st1", - "fxch", - "fstp dword [esp + 0x54]", - "fxch", - "fmul qword [0x00a77b88]", - "fstp dword [esp + 0x60]", - "fld dword [esp + 0x40]", - "fchs", - "fld qword [0x00a77b80]", - "fmul st1", - "fstp dword [esp + 0x50]", - "fmul qword [0x00a77b78]", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x44]", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x48]", - "fld qword [0x00a77b88]", - "fmul st1", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x4c]", - "fld st0", - "fmulp st4", - "fxch st3", - "fstp dword [esp + 0x40]", - "fxch st2", - "fchs", - "fmul st3", - "add eax,0x18", - "add ecx,0x4", - "sub edx,0x1", - "fstp dword [esp + 0x44]", - "fxch", - "fchs", - "fmulp", - "fstp dword [esp + 0x48]", - "fld dword [esp + 0x38]", - "fld st0", - "fchs", - "fmul qword [0x00a77b80]", - "fstp dword [esp + 0x4c]", - "fmul qword [0x00a77b78]", - "fstp dword [esp + 0x38]", - "fld dword [eax + -0x1c]", - "fadd dword [esp + 0x38]", - "fstp dword [eax + -0x1c]", - "fld dword [eax + -0x18]", - "fadd dword [esp + 0x3c]", - "fstp dword [eax + -0x18]", - "fld dword [esp + 0x40]", - "fadd dword [eax + -0x14]", - "fstp dword [eax + -0x14]", - "fld dword [eax + -0x10]", - "fadd dword [esp + 0x44]", - "fstp dword [eax + -0x10]", - "fld dword [eax + -0xc]", - "fadd dword [esp + 0x48]", - "fstp dword [eax + -0xc]", - "fld dword [eax + -0x8]", - "fadd dword [esp + 0x4c]", - "fstp dword [eax + -0x8]", - "fld dword [esp + 0x50]", - "fadd dword [eax + -0x4]", - "fstp dword [eax + -0x4]", - "fld dword [eax]", - "fadd dword [esp + 0x54]", - "fstp dword [eax]", - "fld dword [eax + 0x4]", - "fadd dword [esp + 0x58]", - "fstp dword [eax + 0x4]", - "fld dword [eax + 0x8]", - "fadd dword [esp + 0x5c]", - "fstp dword [eax + 0x8]", - "fld dword [esp + 0x60]", - "fadd dword [eax + 0xc]", - "fstp dword [eax + 0xc]", - "fld dword [eax + 0x10]", - "fadd dword [esp + 0x64]", - "fstp dword [eax + 0x10]" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #12]", + "add w20, w8, #0x60 (96)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x88 (136)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83014,7 +55163,53 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #44]", + "add w20, w8, #0x44 (68)", + "str s4, [x20]", + "ldr s4, [x8, #88]", + "add w20, w8, #0x4c (76)", + "str s4, [x20]", + "ldr s4, [x8, #84]", + "add w20, w8, #0x48 (72)", + "str s4, [x20]", + "ldr s4, [x8, #92]", + "add w20, w8, #0x18 (24)", + "str s4, [x20]", + "ldr s4, [x8, #144]", + "add w20, w8, #0x30 (48)", + "str s4, [x20]", + "ldr s4, [x8, #80]", + "add w20, w8, #0x14 (20)", + "str s4, [x20]", + "ldr s4, [x8, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83027,20 +55222,69 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x18 (24)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83068,20 +55312,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83112,11 +55342,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83143,14 +55370,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83178,20 +55399,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83204,8 +55411,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -83222,24 +55429,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "mov w24, #0x0", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83266,15 +55456,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff4", - "ldr s2, [x5, w23, sxtw]", + "str s2, [x20]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83302,32 +55485,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83339,12 +55497,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83358,28 +55543,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83406,15 +55570,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x25, #0xffffffffffffffe8", - "ldr s2, [x5, w25, sxtw]", + "str s2, [x20]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83442,32 +55599,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83479,12 +55611,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83498,28 +55657,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83546,15 +55684,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x12, #0xffffffffffffffdc", - "ldr s2, [x5, w12, sxtw]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83582,32 +55713,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83619,12 +55725,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83638,28 +55771,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83686,14 +55798,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x20]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83721,16 +55827,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #96]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83757,9 +55912,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w25, sxtw]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "str s2, [x20]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83787,15 +55941,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "ldr s3, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83807,7 +55953,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83820,23 +55966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83849,11 +55981,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83867,11 +55999,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83898,19 +56026,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #24]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83922,13 +56039,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83941,11 +56055,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83960,8 +56097,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83971,15 +56110,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83991,10 +56125,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84004,19 +56139,2110 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #24]", + "add w20, w8, #0x74 (116)", + "str s2, [x20]", + "ldr w4, [x8, #116]", + "ldr s2, [x8, #48]", + "str w4, [x8, #224]", + "add w20, w8, #0x78 (120)", + "str s2, [x20]", + "ldr w5, [x8, #120]", + "ldr s2, [x8, #20]", + "str w5, [x8, #228]", + "add w20, w8, #0x7c (124)", + "str s2, [x20]", + "ldr w6, [x8, #124]", + "add w5, w8, #0x190 (400)", + "str w6, [x8, #232]", + "mov w20, #0x2296", + "movk w20, #0x1, lsl #16", + "mov w21, #0xd4f1", + "movk w21, #0x70, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w22, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "ldrb w23, [x28, #1298]", + "lsl w20, w22, w20", + "bic w20, w23, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2272]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block4": { + "ExpectedInstructionCount": 63, + "x86Insts": [ + "fldz", + "push 0x0", + "push -0x1", + "push 0x1000172", + "push 0x37", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33c14", + "push 0x52424157", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000172", + "push 0x38", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33c04", + "push 0x41574157", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x2b", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bfc", + "push 0x444c4853", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3d", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bf0", + "push 0x48534946", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x44", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bdc", + "push 0x4853494c", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3e", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bcc", + "push 0x48535246", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x52485446", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x1000073", + "push 0xb", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bc4", + "push 0x4e445242", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x1000076", + "push 0xb", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bbc", + "push 0x52485446", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0xe0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa32700", + "push 0x4b434f4c", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0xc0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x0", + "push 0xa33bb4", + "push 0x4e45504f", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x48534946", + "push 0x49465352", + "push 0x4c505344", + "push 0x3", + "push 0x3d", + "push 0x21000475", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33ba8", + "push 0x47444946", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4853494c", + "push 0x48535352", + "push 0x4c505344", + "push 0x3", + "push 0x44", + "push 0x21000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b98", + "push 0x47444853", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x48535246", + "push 0x52465352", + "push 0x4c505344", + "push 0x3", + "push 0x3e", + "push 0x1000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b88", + "push 0x47445246", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x54414241", + "push 0x54414f46", + "push 0x54414552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x100075", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b74", + "push 0x54414744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x45484241", + "push 0x45484f46", + "push 0x45484552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x21000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b64", + "push 0x45484744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x50534241", + "push 0x50534f46", + "push 0x50534552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000075", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b50", + "push 0x50534744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x41464241", + "push 0x41464f46", + "push 0x41464552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000075", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b40", + "push 0x41464744", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x54414241", + "push 0x54414f46", + "push 0x54414552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x100077", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b30", + "push 0x54415244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x4b534241", + "push 0x4b534f46", + "push 0x4c505344", + "push 0x3", + "push 0x40", + "push 0x80077", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b24", + "push 0x4b535244", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x45484241", + "push 0x45484f46", + "push 0x45484552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000077", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b14", + "push 0x45485244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x50534241", + "push 0x50534f46", + "push 0x50534552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000077", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33b00", + "push 0x50535244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x41464241", + "push 0x41464f46", + "push 0x41464552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000077", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33af0", + "push 0x41465244", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x4c505344", + "push 0x49465352", + "push 0x48534946", + "push 0x3", + "push 0x40", + "push 0x100007f", + "push 0x3d", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33adc", + "push 0x49464b57", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4c505344", + "push 0x52465352", + "push 0x48535246", + "push 0x3", + "push 0x40", + "push 0x100007f", + "push 0x3e", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33ac8", + "push 0x52464b57", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4c505344", + "push 0x48535352", + "push 0x4853494c", + "push 0x3", + "push 0x40", + "push 0x100007f", + "push 0x44", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33ab4", + "push 0x48534b57", + "call 0x00417220", + "fldz", + "add esp,0x2c", + "push 0x4c505344", + "push 0x414d5352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x40", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33aa0", + "push 0x414d4b57", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x49445352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x3f", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a8c", + "push 0x49444b57", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x4f505352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x43", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a78", + "push 0x4f504b57", + "call 0x00417220", + "add esp,0x28", + "push 0x4c505344", + "push 0x574e5352", + "push 0x2", + "push 0x40", + "push 0x100007f", + "push 0x41", + "push ecx", + "fldz", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a5c", + "push 0x574e4b57", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x48535246", + "push 0x4853494c", + "push 0x48534946", + "push 0x444c4853", + "push 0x4c505344", + "push 0x5", + "push 0x40", + "push 0x75", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a48", + "push 0x52414944", + "call 0x00417220", + "fldz", + "add esp,0x34", + "push 0x48535246", + "push 0x4853494c", + "push 0x48534946", + "push 0x444c4853", + "push 0x4c505344", + "push 0x5", + "push 0x40", + "push 0x75", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a30", + "push 0x45574944", + "call 0x00417220", + "fldz", + "add esp,0x34", + "push 0x0", + "push 0x3f", + "push 0x10000092", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a24", + "push 0x504d4156", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x14", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a18", + "push 0x47445553", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000112", + "push 0x39", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa33a08", + "push 0x414d5453", + "call 0x00417220", + "add esp,0x20", + "push 0x4f505543", + "push 0x1", + "push 0x43", + "push 0x800000", + "fldz", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa339fc", + "push 0x4e534f50", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x49445543", + "push 0x1", + "push 0x3f", + "push 0x800000", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa339ec", + "push 0x45534944", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x45484241", + "push 0x45484f46", + "push 0x45484552", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x21000075", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x2", + "push 0xa339cc", + "push 0x594d5544", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x0", + "push -0x1", + "push 0x1000172", + "push 0x2f", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa339bc", + "push 0x49564e49", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x2e", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa339b0", + "push 0x4c4d4843", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4c505344", + "push 0x41505543", + "push 0x2", + "push 0x42", + "push 0x1000173", + "push 0x30", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa339a4", + "push 0x41524150", + "call 0x00417220", + "add esp,0x28", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x1000173", + "push 0x31", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa3399c", + "push 0x434e4c53", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x1000062", + "push 0x6", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33994", + "push 0x4d524843", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x594c4152", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x41000066", + "push 0x22", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33988", + "push 0x4f4d4544", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4f4d4544", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x1000062", + "push 0x22", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33980", + "push 0x594c4152", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4d4c4143", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x41000062", + "push 0x21", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33978", + "push 0x5a4e5246", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x5a4e5246", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x41000066", + "push 0x21", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33970", + "push 0x4d4c4143", + "call 0x00417220", + "add esp,0x28", + "push 0x0", + "push -0x1", + "push 0x1000112", + "push 0x29", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33964", + "push 0x4559454e", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x80000072", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa3395c", + "push 0x5448474c", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x81000072", + "push 0x46", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33950", + "push 0x4b524144", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push 0x40", + "push 0xf0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33948", + "push 0x4c505344", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4c505344", + "push 0x1", + "push 0x40", + "push 0x163", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa3393c", + "push 0x50525453", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0x81000242", + "push 0x3c", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33930", + "push 0x454c4554", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x81000012", + "push 0x3a", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33924", + "push 0x54435444", + "call 0x00417220", + "add esp,0x20", + "fldz", + "push 0x0", + "push 0x40", + "push 0x1000072", + "push 0x34", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33910", + "push 0x53424153", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x35", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa33908", + "push 0x434c4652", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100001a", + "push 0x3b", + "push ecx", + "fstp dword [esp]", + "push 0x4", + "push 0xa338f8", + "push 0x47444552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100070", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338e4", + "push 0x54414552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000070", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338d4", + "push 0x45484552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000070", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338bc", + "push 0x50534552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000070", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa338ac", + "push 0x41464552", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100072", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33898", + "push 0x54414f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x80072", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33888", + "push 0x4b534f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000072", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33878", + "push 0x45484f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000072", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33860", + "push 0x50534f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000072", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33850", + "push 0x41464f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4b535244", + "push 0x4b534241", + "push 0x4c505344", + "push 0x3", + "push 0x40", + "push 0x80027", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33840", + "push 0x4b534241", + "call 0x00417220", + "add esp,0x2c", + "push 0x54414744", + "push 0x54415244", + "push 0x54414241", + "fldz", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x100027", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3382c", + "push 0x54414241", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x594d5544", + "push 0x45484744", + "push 0x45485244", + "push 0x45484241", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000025", + "push 0x8", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3381c", + "push 0x45484241", + "call 0x00417220", + "fldz", + "add esp,0x34", + "push 0x41464744", + "push 0x41465244", + "push 0x41464241", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000025", + "push 0xa", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3380c", + "push 0x41464241", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x50534744", + "push 0x50535244", + "push 0x50534241", + "push 0x4c505344", + "push 0x4", + "push 0x40", + "push 0x1000025", + "push 0x9", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337f8", + "push 0x50534241", + "call 0x00417220", + "fldz", + "add esp,0x30", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3d", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337ec", + "push 0x49465352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3e", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337dc", + "push 0x52465352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x44", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337cc", + "push 0x48535352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x40", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337bc", + "push 0x414d5352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x3f", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa337ac", + "push 0x49445352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x43", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3379c", + "push 0x4f505352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x42", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33788", + "push 0x41505352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100007a", + "push 0x41", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33770", + "push 0x574e5352", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x100017a", + "push 0x47", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3375c", + "push 0x44575352", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1f0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa3374c", + "push 0x49445543", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1f0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33740", + "push 0x4f505543", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1f0", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33730", + "push 0x41505543", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x1000012", + "push 0x28", + "push ecx", + "fstp dword [esp]", + "push 0x5", + "push 0xa33714", + "push 0x4d4d4f46", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33704", + "push 0x4f48475a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336f8", + "push 0x43494c5a", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "fldz", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336e8", + "push 0x454b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336d0", + "push 0x414b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa336b4", + "push 0x434b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3369c", + "push 0x484b535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3368c", + "push 0x4152575a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33678", + "push 0x4c52575a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33668", + "push 0x4d4f5a5a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33650", + "push 0x5a44485a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33638", + "push 0x4149465a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33620", + "push 0x4152465a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33608", + "push 0x4154535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335f8", + "push 0x4541445a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335e8", + "push 0x4552445a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335d4", + "push 0x4c52445a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335c4", + "push 0x4143535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa335b0", + "push 0x414c435a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33598", + "push 0x4450535a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33588", + "push 0x5649585a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33578", + "push 0x3130305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33568", + "push 0x3230305a", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "fldz", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33558", + "push 0x3330305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33548", + "push 0x3430305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33538", + "push 0x3530305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33528", + "push 0x3630305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33518", + "push 0x3730305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33508", + "push 0x3830305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334f8", + "push 0x3930305a", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "fldz", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334e8", + "push 0x3031305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334d8", + "push 0x3131305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334c8", + "push 0x3231305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334b8", + "push 0x3331305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa334a8", + "push 0x3431305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33498", + "push 0x3531305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33488", + "push 0x3631305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33478", + "push 0x3731305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33468", + "push 0x3831305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33458", + "push 0x3931305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x40112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33448", + "push 0x3032305a", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x4c505344", + "push 0x1", + "push -0x1", + "push 0x40000062", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33434", + "push 0x55484f43", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x4c505344", + "push 0x1", + "push -0x1", + "push 0x40000062", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x3", + "push 0xa33420", + "push 0x52434f43", + "call 0x00417220", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fldz", + "fstp dword [esp]", + "push 0x1", + "push 0xa33414", + "push 0x58415742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33408", + "push 0x4f425742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333f8", + "push 0x41445742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333ec", + "push 0x414d5742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333e0", + "push 0x57535742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333d4", + "push 0x4f424142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333c4", + "push 0x55434142", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "fldz", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333b4", + "push 0x41474142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa333a4", + "push 0x52474142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33394", + "push 0x45484142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33384", + "push 0x48534142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3336c", + "push 0x31304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33354", + "push 0x32304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3333c", + "push 0x33304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33324", + "push 0x34304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3330c", + "push 0x35304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332f4", + "push 0x36304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332dc", + "push 0x37304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332c4", + "push 0x38304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa332ac", + "push 0x39304142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33294", + "push 0x30314142", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3327c", + "push 0x31305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33264", + "push 0x32305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3324c", + "push 0x33305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33234", + "push 0x34305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3321c", + "push 0x35305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33204", + "push 0x36305742", + "call 0x00417220", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fldz", + "fstp dword [esp]", + "push 0x1", + "push 0xa331ec", + "push 0x37305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa331d4", + "push 0x38305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa331bc", + "push 0x39305742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa331a4", + "push 0x30315742", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x594c4152", + "push 0x4c505344", + "push 0x2", + "push 0x40", + "push 0x40000063", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33198", + "push 0x4e525554", + "call 0x00417220", + "fldz", + "add esp,0x28", + "push 0x4c505344", + "push 0x1", + "push -0x1", + "push 0x170", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x6", + "push 0xa33188", + "push 0x46464553", + "call 0x00417220", + "fldz", + "add esp,0x24", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa3316c", + "push 0x4854594d", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x20112", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33154", + "push 0x4c48594d", + "call 0x00417220", + "fldz", + "add esp,0x20", + "push 0x0", + "push -0x1", + "push 0x10000360", + "push 0x0", + "push ecx", + "fstp dword [esp]", + "push 0x1", + "push 0xa33148", + "push 0x4e414552", + "call 0x00417220", + "add esp,0x20" + ], + "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", + "mov w20, #0x0", + "str w20, [x8, #-4]!", + "mov w21, #0xffffffff", + "str w21, [x8, #-4]!", + "mov w21, #0x172", + "movk w21, #0x100, lsl #16", + "str w21, [x8, #-4]!", + "mov w21, #0x37", + "str w21, [x8, #-4]!", + "str w5, [x8, #-4]!", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84043,85 +58269,420 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5]", + "str s2, [x8]", + "str w20, [x8, #-4]!", + "mov w20, #0x3c14", + "movk w20, #0xa3, lsl #16", + "str w20, [x8, #-4]!", + "mov w20, #0x4157", + "movk w20, #0x5242, lsl #16", + "str w20, [x8, #-4]!", + "mov w20, #0x23c9", + "movk w20, #0x1, lsl #16", + "mov w21, #0x71fe", + "movk w21, #0x41, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x6 (6)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2272]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block5": { + "ExpectedInstructionCount": 284, + "x86Insts": [ + "mov ebx,dword [eax + 0x68]", + "fld dword [esi + 0x2c]", + "mov eax,dword [ebp + 0x68]", + "sub esp,0x14", + "fstp dword [esp + 0x10]", + "movzx ecx,al", + "fld1", + "mov dword [esp + 0x38],ecx", + "fstp dword [esp + 0xc]", + "movzx edx,bl", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "mov dword [esp + 0x40],eax", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],edx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x24]", + "fld dword [esi + 0x2c]", + "movzx eax,byte [esp + 0x41]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x38],eax", + "fld1", + "movzx ecx,bh", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],ecx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x28]", + "mov eax,dword [esp + 0x40]", + "fld dword [esi + 0x2c]", + "fstp dword [esp + 0x10]", + "shr eax,0x10", + "fld1", + "movzx edx,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x40],edx", + "fldz", + "shr ebx,0x10", + "movzx eax,bl", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x40]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x40],eax", + "fild dword [esp + 0x40]", + "fdivrp", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x2c]", + "fld1", + "fst dword [esp + 0x30]", + "mov ecx,dword [esp + 0x24]", + "mov edx,dword [esp + 0x28]", + "mov eax,dword [esp + 0x2c]", + "mov dword [0x00b45e14],ecx", + "mov ecx,dword [esp + 0x30]", + "mov [0x00b45e1c],eax", + "mov dword [0x00b45e20],ecx", + "mov dword [0x00b45e18],edx", + "fld dword [esi + 0x2c]", + "mov eax,dword [ebp + 0x6c]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x40],eax", + "fstp dword [esp + 0xc]", + "movzx eax,al", + "fldz", + "mov dword [esp + 0x38],eax", + "fstp dword [esp + 0x8]", + "mov edx,dword [esi + 0x20]", + "fild dword [esp + 0x38]", + "mov ebx,dword [edx + 0x6c]", + "fld qword [0x00a3ddd8]", + "movzx ecx,bl", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],ecx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x24]", + "fld dword [esi + 0x2c]", + "movzx edx,byte [esp + 0x41]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x38],edx", + "fld1", + "movzx eax,bh", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],eax", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x28]", + "mov eax,dword [esp + 0x40]", + "fld dword [esi + 0x2c]", + "fstp dword [esp + 0x10]", + "shr eax,0x10", + "fld1", + "movzx ecx,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x40],ecx", + "fldz", + "shr ebx,0x10", + "movzx edx,bl", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x40]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x40],edx", + "fild dword [esp + 0x40]", + "fdivrp", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp]", + "call 0x00410eb0", + "mov eax,dword [esp + 0x24]", + "fstp dword [esp + 0x2c]", + "fld1", + "mov ecx,dword [esp + 0x28]", + "mov edx,dword [esp + 0x2c]", + "fst dword [esp + 0x30]", + "mov [0x00b45e24],eax", + "mov eax,dword [esp + 0x30]", + "mov dword [0x00b45e2c],edx", + "mov [0x00b45e30],eax", + "mov dword [0x00b45e28],ecx", + "fld dword [esi + 0x2c]", + "mov eax,dword [ebp + 0x70]", + "fstp dword [esp + 0x10]", + "movzx edx,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x38],edx", + "fldz", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp + 0x8]", + "mov ebx,dword [ecx + 0x70]", + "fild dword [esp + 0x38]", + "mov dword [esp + 0x40],eax", + "fld qword [0x00a3ddd8]", + "movzx eax,bl", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],eax", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x24]", + "fld dword [esi + 0x2c]", + "movzx ecx,byte [esp + 0x41]", + "fstp dword [esp + 0x10]", + "mov dword [esp + 0x38],ecx", + "fld1", + "movzx edx,bh", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x38]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x38],edx", + "fild dword [esp + 0x38]", + "fdivrp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x38]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x28]", + "mov eax,dword [esp + 0x40]", + "fld dword [esi + 0x2c]", + "fstp dword [esp + 0x10]", + "shr eax,0x10", + "fld1", + "movzx eax,al", + "fstp dword [esp + 0xc]", + "mov dword [esp + 0x40],eax", + "fldz", + "fstp dword [esp + 0x8]", + "fild dword [esp + 0x40]", + "fld qword [0x00a3ddd8]", + "fdiv st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "shr ebx,0x10", + "movzx ecx,bl", + "fstp dword [esp + 0x4]", + "mov dword [esp + 0x40],ecx", + "fild dword [esp + 0x40]", + "fdivrp", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x40]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [esp + 0x2c]", + "fld1", + "mov edx,dword [esp + 0x24]", + "mov eax,dword [esp + 0x28]", + "fst dword [esp + 0x30]", + "mov ecx,dword [esp + 0x2c]", + "mov dword [0x00b45e34],edx", + "mov edx,dword [esp + 0x30]", + "mov [0x00b45e38],eax", + "mov dword [0x00b45e3c],ecx", + "mov dword [0x00b45e40],edx", + "fld dword [esi + 0x2c]", + "mov eax,dword [esi + 0x24]", + "fstp dword [esp + 0x10]", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [eax + 0x4c]", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0x4c]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e44]", + "fld dword [esi + 0x2c]", + "mov edx,dword [esi + 0x24]", + "mov eax,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [edx + 0x50]", + "fstp dword [esp + 0x4]", + "fld dword [eax + 0x50]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e48]", + "fld dword [esi + 0x2c]", + "mov ecx,dword [esi + 0x24]", + "add esp,0x8", + "fstp dword [esp + 0x8]", + "fld1", + "fstp dword [esp + 0x4]", + "fldz", + "fstp dword [esp]", + "call 0x004ed660", + "push ecx", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp]", + "call 0x004ed660", + "push ecx", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e4c]", + "mov ecx,dword [esi + 0x24]", + "fld dword [esi + 0x2c]", + "add esp,0x8", + "fstp dword [esp + 0x8]", + "fld1", + "fstp dword [esp + 0x4]", + "fldz", + "fstp dword [esp]", + "call 0x004ed680", + "push ecx", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp]", + "call 0x004ed680", + "push ecx", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e50]", + "fld dword [esi + 0x2c]", + "mov ecx,dword [esi + 0x24]", + "mov edx,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [ecx + 0x58]", + "fstp dword [esp + 0x4]", + "fld dword [edx + 0x58]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e54]", + "fld dword [esi + 0x2c]", + "mov eax,dword [esi + 0x24]", + "mov ecx,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [eax + 0x5c]", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0x5c]", + "fstp dword [esp]", + "call 0x00410eb0", + "fstp dword [0x00b45e58]", + "fld dword [esi + 0x2c]", + "mov edx,dword [esi + 0x24]", + "mov eax,dword [esi + 0x20]", + "fstp dword [esp + 0x10]", + "fld1", + "fstp dword [esp + 0xc]", + "fldz", + "fstp dword [esp + 0x8]", + "fld dword [edx + 0x54]", + "fstp dword [esp + 0x4]", + "fld dword [eax + 0x54]", + "fstp dword [esp]", + "call 0x00410eb0", + "add esp,0x14" + ], + "ExpectedArm64ASM": [ + "ldr w7, [x4, #104]", + "ldr s2, [x10, #44]", + "ldr w4, [x9, #104]", + "mvn w27, w8", + "subs w26, w8, #0x14 (20)", + "cfinv", + "mov x8, x26", + "add w20, w8, #0x10 (16)", + "str s2, [x20]", + "uxtb w5, w4", + "ldr q2, [x28, #2608]", + "str w5, [x8, #56]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84148,102 +58709,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x6 (6)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "uxtb w6, w7", + "movi v2.2d, #0x0", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84270,14 +58739,34 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x20]", + "ldr w20, [x8, #56]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x24, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w25, #0x3f", + "mov x0, #0x3f", + "clz x12, x20", + "sub x12, x0, x12", + "sub x12, x25, x12", + "lsl x13, x20, x12", + "mov w14, #0x403e", + "sub x12, x14, x12", + "cmp x20, #0x0 (0)", + "csel x20, x22, x12, eq", + "orr x20, x24, x20", + "fmov d2, x13", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", + "str w4, [x8, #64]", + "mov w20, #0xddd8", + "movk w20, #0xa3, lsl #16", + "ldr d3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84289,9 +58778,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84302,23 +58791,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84331,11 +58806,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84349,11 +58824,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84380,19 +58852,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", + "ldr s2, [x8, #56]", + "add w20, w8, #0x4 (4)", + "str s2, [x20]", + "str w6, [x8, #56]", + "ldr w20, [x8, #56]", + "sxtw x20, w20", + "mrs x21, nzcv", + "cmp x20, #0x0 (0)", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov x0, #0x3f", + "clz x24, x20", + "sub x24, x0, x24", + "sub x24, x25, x24", + "lsl x25, x20, x24", + "sub x24, x14, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d4, x20", + "mov v2.d[1], v4.d[0]", + "msr nzcv, x21", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84409,7 +58892,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84423,28 +58906,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84471,138 +58933,362 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "str s2, [x20]", + "ldr s2, [x8, #56]", + "str s2, [x8]", + "mov w20, #0x3e2b", + "movk w20, #0x1, lsl #16", + "mov w21, #0xe52", + "movk w21, #0x41, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", + "add w20, w20, #0x6 (6)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2272]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block6": { + "ExpectedInstructionCount": 58, + "x86Insts": [ + "mov eax,dword [esp + 0x110]", + "fldz", + "mov ecx,dword [eax]", + "mov edx,dword [esp + 0x5c]", + "mov ebx,dword [edx + 0x18]", + "mov esi,dword [esp + 0x58]", + "mov dword [ebx + 0xc],ecx", + "mov edx,dword [eax + 0x4]", + "mov dword [ebx + 0x10],edx", + "mov eax,dword [eax + 0x8]", + "mov dword [ebx + 0x14],eax", + "mov ecx,dword [esi + 0x50]", + "push ecx", + "fstp dword [esp]", + "call 0x00784370", + "mov ecx,dword [esi + 0x50]", + "fstp dword [esp + 0x54]", + "fldz", + "push ecx", + "fstp dword [esp]", + "call 0x00784370", + "fstp dword [esp + 0x64]", + "mov eax,dword [esp + 0x11c]", + "lea ebp,[ebx + 0x1c]", + "mov esi,eax", + "mov ecx,0x9", + "mov edi,ebp", + "rep movsd", + "fld dword [eax + 0x4]", + "mov ecx,dword [esp + 0x120]", + "sub esp,0xc", + "fmul dword [ecx + 0x4]", + "fld dword [ecx]", + "fmul dword [eax]", + "faddp", + "fld dword [eax + 0x8]", + "fmul dword [ecx + 0x8]", + "faddp", + "fstp dword [esp + 0x28]", + "fld dword [eax + 0xc]", + "fmul dword [ecx]", + "fld dword [eax + 0x10]", + "fmul dword [ecx + 0x4]", + "faddp", + "fld dword [eax + 0x14]", + "fmul dword [ecx + 0x8]", + "faddp", + "fstp dword [esp + 0x44]", + "fld dword [eax + 0x18]", + "fmul dword [ecx]", + "fld dword [eax + 0x1c]", + "fmul dword [ecx + 0x4]", + "faddp", + "fld dword [eax + 0x20]", + "mov eax,esp", + "fmul dword [ecx + 0x8]", + "faddp", + "fstp dword [esp + 0x34]", + "fld dword [esp + 0x28]", + "fstp dword [esp + 0x48]", + "mov ecx,dword [esp + 0x48]", + "fld dword [esp + 0x44]", + "mov dword [eax],ecx", + "fstp dword [esp + 0x4c]", + "mov edx,dword [esp + 0x4c]", + "fld dword [esp + 0x34]", + "mov dword [eax + 0x4],edx", + "fstp dword [esp + 0x50]", + "mov ecx,dword [esp + 0x50]", + "fld dword [esp + 0x3c]", + "mov dword [eax + 0x8],ecx", + "push ecx", + "mov ecx,ebp", + "fstp dword [esp]", + "call 0x0078f050", + "fld dword [esp + 0x54]", + "sub esp,0x8", + "fstp dword [esp + 0x4]", + "fld dword [esp + 0x6c]", + "fadd dword [esp + 0x3c]", + "fstp dword [esp + 0x24]", + "fld dword [esp + 0x24]", + "mov ecx,ebp", + "fstp dword [esp]", + "call 0x0078ef60", + "fld dword [ebp + 0xc]", + "mov esi,dword [esp + 0x58]", + "fld dword [0x00b2b71c]", + "fld st0", + "fmulp st2", + "fld dword [ebp]", + "fld dword [0x00b2b718]", + "fld st0", + "fmulp st2", + "fxch st3", + "faddp", + "fld dword [ebp + 0x18]", + "fld dword [0x00b2b720]", + "fld st0", + "fmulp st2", + "fxch st2", + "faddp", + "fstp dword [esp + 0x1c]", + "fld dword [ebp + 0x10]", + "fmul st2", + "fld dword [ebp + 0x4]", + "fmul st4", + "faddp", + "fld dword [ebp + 0x1c]", + "fmul st2", + "faddp", + "fstp dword [esp + 0x38]", + "fld dword [ebp + 0x14]", + "fmulp st2", + "fld dword [ebp + 0x8]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul dword [ebp + 0x20]", + "faddp", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x1c]", + "fstp dword [esp + 0x3c]", + "mov edx,dword [esp + 0x3c]", + "fld dword [esp + 0x38]", + "mov dword [ebx],edx", + "fstp dword [esp + 0x40]", + "mov eax,dword [esp + 0x40]", + "fld dword [esp + 0x28]", + "mov dword [ebx + 0x4],eax", + "fstp dword [esp + 0x44]", + "mov ecx,dword [esp + 0x44]", + "fldz", + "mov dword [ebx + 0x8],ecx", + "mov ecx,dword [esi + 0x68]", + "push ecx", + "fstp dword [esp]", + "call 0x00784210", + "fmul dword [esp + 0x6c]", + "fstp dword [ebx + 0x18]", + "mov ecx,dword [esi + 0x5c]", + "fldz", + "push ecx", + "fstp dword [esp]", + "call 0x00784210", + "fmul dword [esp + 0x80]", + "push 0xb2b724", + "mov ecx,ebx", + "fstp dword [esp + 0x54]", + "call 0x0078fcc0", + "fmul qword [0x00a8ba48]", + "fstp dword [esp + 0x34]", + "fld dword [esp + 0x34]", + "fsubr qword [0x00a65a18]", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "fabs", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "fmul qword [0x00a8c698]", + "fld1", + "fsubrp", + "fstp dword [esp + 0x38]", + "fld dword [0x00b2b72c]", + "fld st0", + "fmul dword [ebx + 0x4]", + "fld dword [ebx + 0x8]", + "fld dword [0x00b2b728]", + "fld st0", + "fmulp st2", + "fxch st2", + "fsubrp", + "fstp dword [esp + 0x24]", + "fld dword [ebx + 0x8]", + "fld dword [0x00b2b724]", + "fld st0", + "fmulp st2", + "fld dword [ebx]", + "fmulp st4", + "fxch", + "fsubrp st3,st0", + "fxch st2", + "fstp dword [esp + 0x30]", + "fmul dword [ebx]", + "fld dword [ebx + 0x4]", + "fmulp st2", + "fsubrp", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x30]", + "fld dword [esp + 0x24]", + "fld dword [esp + 0x4c]", + "fld st1", + "fmulp st2", + "fld st2", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul st0", + "faddp", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "call 0x00982c30", + "fstp dword [esp + 0x1c]", + "fld dword [esp + 0x1c]", + "mov ecx,dword [esi + 0x70]", + "fld1", + "push ecx", + "fdivrp", + "fstp dword [esp + 0x20]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x20]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x34]", + "fmul st1", + "fstp dword [esp + 0x44]", + "fmul dword [esp + 0x50]", + "fstp dword [esp + 0x48]", + "fldz", + "fstp dword [esp]", + "call 0x00784210", + "fsub qword [0x00a2faa0]", + "mov edx,dword [esp + 0x3c]", + "mov ecx,dword [esp + 0x40]", + "sub esp,0xc", + "fadd st0,st0", + "mov eax,esp", + "mov dword [eax],edx", + "fmul qword [0x00a3d360]", + "fstp dword [esp + 0x28]", + "fld1", + "fst dword [esp + 0xb8]", + "fldz", + "fst dword [esp + 0xbc]", + "fst dword [esp + 0xc0]", + "fst dword [esp + 0xc4]", + "fst dword [esp + 0xcc]", + "fst dword [esp + 0xd0]", + "fstp dword [esp + 0xd4]", + "fst dword [esp + 0xc8]", + "fstp dword [esp + 0xd8]", + "fld dword [esp + 0x28]", + "mov edx,dword [esp + 0x50]", + "fmul dword [esp + 0x90]", + "mov dword [eax + 0x4],ecx", + "push ecx", + "mov dword [eax + 0x8],edx", + "fmul dword [esp + 0x44]", + "lea ecx,[esp + 0xbc]", + "fmul dword [esp + 0x48]", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x2c]", + "fstp dword [esp]", + "call 0x0078f160", + "lea eax,[esp + 0xac]", + "push eax", + "lea ecx,[esp + 0xd4]", + "push ecx", + "mov ecx,ebp", + "call 0x0078edd0", + "cmp dword [esp + 0x124],0x0", + "mov esi,eax", + "mov ecx,0x9", + "mov edi,ebp", + "rep movsd", + "fld dword [ebp + 0xc]", + "fld dword [0x00b2b71c]", + "fld st0", + "fmulp st2", + "fld dword [ebp]", + "fld dword [0x00b2b718]", + "fld st0", + "fmulp st2", + "fxch st3", + "faddp", + "fld dword [ebp + 0x18]", + "fld dword [0x00b2b720]", + "fld st0", + "fmulp st2", + "fxch st2", + "faddp", + "fstp dword [esp + 0x1c]", + "fld dword [ebp + 0x10]", + "fmul st2", + "fld dword [ebp + 0x4]", + "fmul st4", + "faddp", + "fld dword [ebp + 0x1c]", + "fmul st2", + "faddp", + "fstp dword [esp + 0x38]", + "fld dword [ebp + 0x14]", + "fmulp st2", + "fld dword [ebp + 0x8]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul dword [ebp + 0x20]", + "faddp", + "fstp dword [esp + 0x28]", + "fld dword [esp + 0x1c]", + "fstp dword [esp + 0x3c]", + "mov edx,dword [esp + 0x3c]", + "fld dword [esp + 0x38]", + "mov dword [ebx],edx", + "fstp dword [esp + 0x40]", + "mov eax,dword [esp + 0x40]", + "fld dword [esp + 0x28]", + "mov dword [ebx + 0x4],eax", + "mov eax,dword [esp + 0x10c]", + "fstp dword [esp + 0x44]", + "mov ecx,dword [esp + 0x44]", + "mov dword [ebx + 0x8],ecx" + ], + "ExpectedArm64ASM": [ + "ldr w4, [x8, #272]", + "movi v2.2d, #0x0", + "ldr w5, [x4]", + "ldr w6, [x8, #92]", + "ldr w7, [x6, #24]", + "ldr w10, [x8, #88]", + "str w5, [x7, #12]", + "ldr w6, [x4, #4]", + "str w6, [x7, #16]", + "ldr w4, [x4, #8]", + "str w4, [x7, #20]", + "ldr w5, [x10, #80]", + "str w5, [x8, #-4]!", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84629,145 +59315,247 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", + "str s2, [x8]", + "mov w20, #0x43c4", + "movk w20, #0x1, lsl #16", + "mov w21, #0x433f", + "movk w21, #0x78, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2272]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block7": { + "ExpectedInstructionCount": 7397, + "x86Insts": [ + "fld dword [ecx + 0xc]", + "fld dword [ecx + 0x18]", + "fadd st0,st1", + "fstp dword [ecx + 0x18]", + "fld dword [ecx]", + "fadd st1,st0", + "fxch", + "fstp dword [ecx + 0xc]", + "fld dword [ecx + -0xc]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [ecx]", + "fld dword [ecx + -0x18]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [ecx + -0xc]", + "fld dword [ecx + -0x24]", + "fld st0", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fst dword [ecx + -0x18]", + "fld dword [ecx]", + "fld dword [ecx + 0x18]", + "fadd st0,st1", + "fstp dword [ecx + 0x18]", + "fadd st0,st1", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fst dword [ecx]", + "fld dword [ecx + -0xc]", + "fmul st6", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0xc]", + "fld st0", + "fmul st6", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fadd st0,st4", + "fstp dword [esp + 0x8]", + "fsubp st3,st0", + "fxch st2", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x8]", + "fld dword [esp + 0x4]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x38]", + "fsubp", + "fstp dword [esp + 0x40]", + "fxch", + "fmul st4", + "fstp dword [esp + 0x4]", + "fld dword [ecx + 0x18]", + "fld st0", + "fmul st4", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fadd st0,st2", + "fstp dword [esp + 0x8]", + "fsubp", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x8]", + "fld dword [esp + 0x4]", + "fld st0", + "fadd st0,st2", + "fstp dword [esp + 0x4c]", + "fsubp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fmul qword [0x00a77be0]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x48]", + "fmul qword [0x00a77bd8]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x4c]", + "fmul qword [0x00a77bd0]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x38]", + "fst dword [esp + 0x8]", + "fld dword [esp + 0x4c]", + "fadd st1,st0", + "fxch", + "fstp dword [esp + 0x38]", + "fsubr dword [esp + 0x8]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x3c]", + "fst dword [esp + 0x8]", + "fld dword [esp + 0x48]", + "fadd st1,st0", + "fxch", + "fstp dword [esp + 0x3c]", + "fsubr dword [esp + 0x8]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x40]", + "fst dword [esp + 0x8]", + "fld dword [esp + 0x44]", + "fadd st1,st0", + "fxch", + "fstp dword [esp + 0x40]", + "fsubr dword [esp + 0x8]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x38]", + "fmul qword [0x00a77bc8]", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x3c]", + "fmul qword [0x00a77bc0]", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x40]", + "fmul qword [0x00a77bb8]", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x44]", + "fmul qword [0x00a77bb0]", + "fstp dword [esp + 0x44]", + "fld dword [esp + 0x48]", + "fmul qword [0x00a77ba8]", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x4c]", + "fmul qword [0x00a77ba0]", + "fstp dword [esp + 0x4c]", + "fld dword [esp + 0x38]", + "fchs", + "fld st0", + "fmul st2", + "fstp dword [esp + 0x58]", + "fld qword [0x00a77b98]", + "fmul st1", + "fxch", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x3c]", + "fchs", + "fld st0", + "fld qword [0x00a77b90]", + "fmul st1", + "fxch", + "fstp dword [esp + 0x54]", + "fxch", + "fmul qword [0x00a77b88]", + "fstp dword [esp + 0x60]", + "fld dword [esp + 0x40]", + "fchs", + "fld qword [0x00a77b80]", + "fmul st1", + "fstp dword [esp + 0x50]", + "fmul qword [0x00a77b78]", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x44]", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x48]", + "fld qword [0x00a77b88]", + "fmul st1", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x4c]", + "fld st0", + "fmulp st4", + "fxch st3", + "fstp dword [esp + 0x40]", + "fxch st2", + "fchs", + "fmul st3", + "add eax,0x18", + "add ecx,0x4", + "sub edx,0x1", + "fstp dword [esp + 0x44]", + "fxch", + "fchs", + "fmulp", + "fstp dword [esp + 0x48]", + "fld dword [esp + 0x38]", + "fld st0", + "fchs", + "fmul qword [0x00a77b80]", + "fstp dword [esp + 0x4c]", + "fmul qword [0x00a77b78]", + "fstp dword [esp + 0x38]", + "fld dword [eax + -0x1c]", + "fadd dword [esp + 0x38]", + "fstp dword [eax + -0x1c]", + "fld dword [eax + -0x18]", + "fadd dword [esp + 0x3c]", + "fstp dword [eax + -0x18]", + "fld dword [esp + 0x40]", + "fadd dword [eax + -0x14]", + "fstp dword [eax + -0x14]", + "fld dword [eax + -0x10]", + "fadd dword [esp + 0x44]", + "fstp dword [eax + -0x10]", + "fld dword [eax + -0xc]", + "fadd dword [esp + 0x48]", + "fstp dword [eax + -0xc]", + "fld dword [eax + -0x8]", + "fadd dword [esp + 0x4c]", + "fstp dword [eax + -0x8]", + "fld dword [esp + 0x50]", + "fadd dword [eax + -0x4]", + "fstp dword [eax + -0x4]", + "fld dword [eax]", + "fadd dword [esp + 0x54]", + "fstp dword [eax]", + "fld dword [eax + 0x4]", + "fadd dword [esp + 0x58]", + "fstp dword [eax + 0x4]", + "fld dword [eax + 0x8]", + "fadd dword [esp + 0x5c]", + "fstp dword [eax + 0x8]", + "fld dword [esp + 0x60]", + "fadd dword [eax + 0xc]", + "fstp dword [eax + 0xc]", + "fld dword [eax + 0x10]", + "fadd dword [esp + 0x64]", + "fstp dword [eax + 0x10]" + ], + "ExpectedArm64ASM": [ + "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84779,11 +59567,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84793,15 +59580,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #24]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84813,7 +59595,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84826,35 +59608,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84871,7 +59627,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84882,14 +59638,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w5, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84902,8 +59654,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -84915,15 +59667,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84935,7 +59681,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84948,97 +59694,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85055,7 +59713,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85069,16 +59727,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov w20, #0x0", + "strb wzr, [x28, #1017]", + "add w21, w5, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85105,14 +59756,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x21]", + "mov x21, #0xfffffffffffffff4", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85140,15 +59786,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85160,10 +59797,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85173,35 +59813,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85216,10 +59831,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85229,14 +59842,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x5]", + "mov x22, #0xffffffffffffffe8", + "ldr s3, [x5, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85248,11 +59857,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85262,20 +59870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85292,7 +59889,7 @@ "umov w2, v2.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85306,16 +59903,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "sub w23, w5, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85342,14 +59931,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x23]", + "mov x23, #0xffffffffffffffdc", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85377,46 +59961,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7be0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85433,7 +59977,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85444,14 +59988,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "mov w23, #0x8", + "add w24, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85464,8 +60006,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -85477,15 +60019,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "fmov s3, s0", + "str s3, [x24]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85497,7 +60033,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85510,20 +60046,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bd8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "sub w24, w5, #0x18 (24)", + "str s3, [x24]", + "ldr s3, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85535,9 +60063,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85548,46 +60076,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85599,11 +60091,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85613,15 +60104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85633,10 +60118,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85646,20 +60134,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bd0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w24, w5, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85671,10 +60149,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85684,11 +60163,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85703,9 +60179,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85716,14 +60192,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w24, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85736,8 +60208,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -85749,15 +60221,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s3, s0", + "str s3, [x24]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85769,7 +60235,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85782,48 +60248,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "str s3, [x5]", + "ldr s3, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85835,7 +60264,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85848,22 +60277,40 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldrb w24, [x28, #1019]", + "sub w24, w24, #0x4 (4)", + "and w24, w24, #0x7", + "strb w24, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q3, [x0, #1040]", + "mov w25, #0x1", + "add w12, w24, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "str q5, [x0, #1040]", + "add w12, w24, #0x2 (2)", "and w12, w12, #0x7", "add x0, x28, x12, lsl #4", + "str q4, [x0, #1040]", + "add w12, w24, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "sub w23, w23, w24", + "ldrb w24, [x28, #1298]", + "mov w12, #0xf0f", + "lsr w23, w12, w23", + "orr w23, w24, w23", + "strb w23, [x28, #1298]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85881,7 +60328,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85895,22 +60342,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4 (4)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85938,14 +60373,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85973,7 +60409,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85987,11 +60447,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86005,10 +60465,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86036,14 +60496,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86071,16 +60532,21 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86093,10 +60559,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86106,10 +60574,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86121,10 +60593,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86134,22 +60607,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86167,7 +60638,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86181,22 +60652,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86224,13 +60701,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86259,8 +60737,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86272,13 +60758,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86291,11 +60774,32 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86308,10 +60812,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86321,15 +60827,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86341,10 +60846,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86354,19 +60860,21 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86379,10 +60887,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86392,10 +60902,21 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86407,10 +60928,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86420,22 +60942,31 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86453,7 +60984,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86467,22 +60998,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4 (4)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86510,14 +61029,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86545,7 +61065,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86559,11 +61103,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86577,10 +61121,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86608,14 +61152,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86643,45 +61188,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bc8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86699,7 +61219,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86713,10 +61233,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86744,14 +61264,20 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86763,10 +61289,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86779,17 +61308,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bc0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86801,10 +61331,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86814,11 +61345,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86830,13 +61366,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86849,11 +61382,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86865,11 +61403,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86879,15 +61416,35 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86899,10 +61456,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86915,17 +61475,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bb8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86937,10 +61491,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86950,10 +61505,20 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86971,7 +61536,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86985,10 +61550,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87016,14 +61588,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87051,17 +61624,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7bb0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7be0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87089,7 +61663,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87121,10 +61695,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87152,13 +61726,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87187,17 +61762,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7ba8", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bd8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87225,7 +61801,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87257,10 +61833,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87288,13 +61864,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87323,17 +61900,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x7ba0", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bd0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87361,7 +61939,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87393,10 +61971,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87424,13 +62002,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87459,40 +62038,87 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w12, #0x8000", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87510,7 +62136,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87524,10 +62150,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87555,16 +62190,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b98", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87576,9 +62210,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87592,19 +62226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87618,11 +62240,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87636,22 +62258,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87679,13 +62289,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87714,37 +62325,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b90", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87756,9 +62348,37 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87772,19 +62392,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87802,7 +62423,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87816,22 +62437,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87859,28 +62477,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x7b88", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87892,9 +62497,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87908,7 +62513,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87922,11 +62527,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -87940,10 +62545,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87971,13 +62576,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88006,25 +62612,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add w24, w8, #0x8 (8)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0x7b80", - "movk w14, #0xa7, lsl #16", - "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88036,9 +62635,37 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88052,19 +62679,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88082,7 +62710,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88096,10 +62724,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88127,16 +62764,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w15, #0x7b78", - "movk w15, #0xa7, lsl #16", - "ldr d2, [x15]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88148,9 +62784,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88164,7 +62800,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88178,11 +62814,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88196,10 +62832,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88227,14 +62863,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88262,15 +62899,81 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bc8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88298,14 +63001,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88333,15 +63037,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x13]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bc0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88369,19 +63076,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88413,10 +63108,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88444,14 +63139,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88479,31 +63175,46 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x4 (4)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bb8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88535,27 +63246,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88583,39 +63277,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88627,13 +63297,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -88646,17 +63313,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "add w4, w4, #0x18 (24)", - "add w5, w5, #0x4 (4)", - "subs w26, w6, #0x1 (1)", - "cfinv", - "mov x27, x6", - "mov x6, x26", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7bb0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88668,11 +63336,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1432]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -88682,39 +63349,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88746,15 +63384,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88782,14 +63415,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88817,35 +63451,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x24", - "mov v3.d[1], x12", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x14]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7ba8", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88873,7 +63490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88905,10 +63522,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88936,14 +63553,54 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x15]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "mov w24, #0x7ba0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88971,7 +63628,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89003,10 +63660,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w24, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89034,50 +63691,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffe4", - "ldr s2, [x4, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "bic w24, w24, w12", + "strb w24, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89106,7 +63727,39 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w12, w25, w23", + "orr w24, w24, w12", + "strb w24, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mov w24, #0x8000", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89124,7 +63777,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89138,10 +63791,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w12, w8, #0x58 (88)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89169,14 +63822,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, w25, sxtw]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "mov w12, #0x7b98", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89188,9 +63844,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89204,43 +63860,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89258,7 +63891,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89272,10 +63905,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w12, w8, #0x5c (92)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89303,14 +63945,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w25, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89338,16 +63981,36 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xffffffffffffffec", - "ldr s2, [x4, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "mov w12, #0x7b90", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89359,9 +64022,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89375,7 +64038,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89393,7 +64069,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89407,10 +64083,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w12, w8, #0x54 (84)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89438,51 +64123,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff0", - "ldr s2, [x4, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w13, w25, w23", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "strb wzr, [x28, #1017]", + "mov w12, #0x7b88", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89494,9 +64156,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89510,7 +64172,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89528,7 +64190,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89542,10 +64204,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w13, w8, #0x60 (96)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89573,14 +64235,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, w23, sxtw]", + "str s2, [x13]", + "ldrb w13, [x28, #1298]", + "lsl w14, w25, w23", + "bic w13, w13, w14", + "strb w13, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89608,15 +64271,25 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldrb w13, [x28, #1298]", + "lsl w14, w25, w23", + "orr w13, w13, w14", + "strb w13, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "mov w13, #0x7b80", + "movk w13, #0xa7, lsl #16", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89628,9 +64301,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89644,7 +64317,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w14, [x28, #1298]", + "lsl w15, w25, w23", + "orr w14, w14, w15", + "strb w14, [x28, #1298]", + "add w14, w23, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89662,7 +64348,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89676,10 +64362,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w14, w8, #0x50 (80)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89707,15 +64393,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff8", - "ldr s2, [x4, w23, sxtw]", + "str s2, [x14]", + "ldrb w14, [x28, #1298]", + "lsl w15, w25, w23", + "bic w14, w14, w15", + "strb w14, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "mov w14, #0x7b78", + "movk w14, #0xa7, lsl #16", + "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89727,9 +64415,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89743,15 +64431,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89763,10 +64444,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89779,8 +64463,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w15, w8, #0x64 (100)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89793,12 +64480,44 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x15]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "bic w15, w15, w16", + "strb w15, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89811,10 +64530,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "orr w15, w15, w16", + "strb w15, [x28, #1298]", + "add w15, w8, #0x38 (56)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89842,14 +64568,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "str s2, [x15]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "bic w15, w15, w16", + "strb w15, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89877,16 +64604,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x4, w23, sxtw]", + "ldrb w15, [x28, #1298]", + "lsl w16, w25, w23", + "orr w15, w15, w16", + "strb w15, [x28, #1298]", + "ldr d2, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89898,9 +64625,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89914,7 +64641,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89932,7 +64672,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89946,10 +64686,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w12, w8, #0x3c (60)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89977,14 +64717,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90012,43 +64753,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x4 (4)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90066,7 +64795,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90080,10 +64809,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w12, w8, #0x40 (64)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90111,14 +64858,38 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add w12, w23, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90130,10 +64901,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -90146,15 +64920,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "add w4, w4, #0x18 (24)", + "add w5, w5, #0x4 (4)", + "subs w26, w6, #0x1 (1)", + "cfinv", + "mov x27, x6", + "mov x6, x26", + "add w12, w8, #0x44 (68)", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90166,10 +64942,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -90179,10 +64956,36 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "fmov s2, s0", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add w12, w23, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90200,7 +65003,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90214,10 +65017,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add w12, w8, #0x48 (72)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90245,14 +65055,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "bic w12, w12, w15", + "strb w12, [x28, #1298]", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90280,15 +65091,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w12, [x28, #1298]", + "lsl w15, w25, w23", + "orr w12, w12, w15", + "strb w12, [x28, #1298]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x20", + "mov v3.d[1], x24", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90300,9 +65130,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90316,7 +65146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90334,7 +65164,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90348,10 +65178,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w20, w8, #0x4c (76)", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90379,50 +65209,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", + "str s2, [x20]", + "ldrb w20, [x28, #1298]", + "lsl w24, w25, w23", + "bic w20, w20, w24", + "strb w20, [x28, #1298]", + "add w20, w23, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90434,9 +65229,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v2.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90468,7 +65263,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -90484,7 +65279,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x38 (56)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90513,14 +65308,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "mov x23, #0xffffffffffffffe4", + "ldr s2, [x4, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90550,13 +65347,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90618,7 +65416,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w23, w4, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90647,255 +65445,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w25, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "Block8": { - "ExpectedInstructionCount": 8283, - "x86Insts": [ - "movzx eax,word [esi + edx*0x8]", - "fld dword [esi + edx*0x8 + 0x4]", - "fstp dword [esp + 0x24]", - "mov esi,dword [esp + 0x1c8]", - "fld dword [esp + 0x9c]", - "movzx eax,ax", - "mov ecx,eax", - "imul ecx,dword [esp + 0x1e4]", - "lea eax,[eax + eax*0x2]", - "add eax,eax", - "add eax,eax", - "lea edi,[eax + esi*0x1 + 0x8]", - "mov dword [esp + 0x10],edi", - "fmul dword [eax + esi*0x1 + 0x4]", - "fld dword [esp + 0x98]", - "fmul dword [eax + esi*0x1]", - "faddp", - "fld dword [esp + 0xa0]", - "fmul dword [edi]", - "faddp", - "fadd dword [esp + 0x88]", - "fstp dword [esp + 0xd0]", - "fld dword [esp + 0xa8]", - "fmul dword [eax + esi*0x1 + 0x4]", - "fld dword [esp + 0xa4]", - "fmul dword [eax + esi*0x1]", - "faddp", - "fld dword [esp + 0xac]", - "fmul dword [edi]", - "faddp", - "fadd dword [esp + 0x8c]", - "fstp dword [esp + 0xd4]", - "fld dword [esp + 0xb4]", - "fmul dword [eax + esi*0x1 + 0x4]", - "fld dword [esp + 0xb0]", - "fmul dword [eax + esi*0x1]", - "mov esi,edi", - "faddp", - "fld dword [esp + 0xb8]", - "fmul dword [esi]", - "mov esi,dword [esp + 0x38]", - "lea edi,[esi + eax*0x1 + 0x8]", - "mov dword [esp + 0x10],edi", - "faddp", - "fadd dword [esp + 0x90]", - "fstp dword [esp + 0xd8]", - "fld dword [esp + 0x64]", - "fld st0", - "fmul dword [eax + ebx*0x1]", - "fld dword [esp + 0x68]", - "fld st0", - "fmul dword [eax + ebx*0x1 + 0x4]", - "faddp st2,st0", - "fld dword [esp + 0x6c]", - "fld st0", - "fmul dword [eax + ebx*0x1 + 0x8]", - "faddp st3,st0", - "fxch st2", - "fstp dword [esp + 0xe8]", - "fld dword [esp + 0x70]", - "fld st0", - "fmul dword [eax + ebx*0x1]", - "fld dword [esp + 0x74]", - "fld st0", - "fmul dword [eax + ebx*0x1 + 0x4]", - "faddp st2,st0", - "fld dword [esp + 0x78]", - "fmul dword [eax + ebx*0x1 + 0x8]", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0xec]", - "fld dword [esp + 0x7c]", - "fmul dword [eax + ebx*0x1]", - "fld dword [esp + 0x80]", - "fmul dword [eax + ebx*0x1 + 0x4]", - "faddp", - "fld dword [esp + 0x84]", - "fmul dword [eax + ebx*0x1 + 0x8]", - "faddp", - "fstp dword [esp + 0xf0]", - "fld st2", - "fmul dword [esi + eax*0x1 + 0x4]", - "fld st5", - "fmul dword [esi + eax*0x1]", - "faddp", - "fld st4", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x58]", - "fld st0", - "fmul dword [esi + eax*0x1 + 0x4]", - "fld st2", - "fmul dword [esi + eax*0x1]", - "faddp", - "fld dword [esp + 0x78]", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x5c]", - "fld dword [esp + 0x80]", - "fmul dword [esi + eax*0x1 + 0x4]", - "fld dword [esp + 0x7c]", - "fmul dword [esi + eax*0x1]", - "mov esi,edi", - "faddp", - "fld dword [esp + 0x84]", - "fmul dword [esi]", - "mov esi,dword [esp + 0x20]", - "lea edi,[esi + eax*0x1 + 0x4]", - "mov dword [esp + 0x10],edi", - "faddp", - "lea edi,[esi + eax*0x1 + 0x8]", - "mov dword [esp + 0xbc],edi", - "mov edi,dword [esp + 0x10]", - "fstp dword [esp + 0x60]", - "fld dword [esi + eax*0x1]", - "fmulp st5", - "fld dword [edi]", - "mov edi,dword [esp + 0xbc]", - "fmulp st3", - "fxch st4", - "faddp st2,st0", - "fld dword [edi]", - "mov edi,dword [esp + 0x10]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x4c]", - "fmul dword [esi + eax*0x1]", - "fld dword [edi]", - "mov edi,dword [esp + 0xbc]", - "fmulp st2", - "faddp", - "fld dword [esp + 0x78]", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x50]", - "fld dword [esp + 0x7c]", - "fmul dword [esi + eax*0x1]", - "mov eax,dword [esp + 0x10]", - "fld dword [esp + 0x80]", - "fmul dword [eax]", - "mov eax,dword [esp + 0x1d4]", - "faddp", - "fld dword [esp + 0x84]", - "fmul dword [edi]", - "faddp", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0xd0]", - "fld dword [esp + 0x24]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0xc0]", - "fld dword [esp + 0xd4]", - "fmul st1", - "fstp dword [esp + 0xc4]", - "fld dword [esp + 0xd8]", - "fmul st1", - "fstp dword [esp + 0xc8]", - "fld dword [esp + 0xc0]", - "fadd dword [ecx + eax*0x1]", - "fstp dword [ecx + eax*0x1]", - "add edx,0x1", - "cmp edx,dword [esp + 0x1c]", - "fld dword [esp + 0xc4]", - "fadd dword [ecx + eax*0x1 + 0x4]", - "fstp dword [ecx + eax*0x1 + 0x4]", - "lea eax,[ecx + eax*0x1 + 0x8]", - "fld dword [eax]", - "fadd dword [esp + 0xc8]", - "fstp dword [eax]", - "mov eax,dword [esp + 0x1dc]", - "fld dword [esp + 0xe8]", - "fmul st1", - "fstp dword [esp + 0xdc]", - "fld dword [esp + 0xec]", - "fmul st1", - "fstp dword [esp + 0xe0]", - "fld dword [esp + 0xf0]", - "fmul st1", - "fstp dword [esp + 0xe4]", - "fld dword [esp + 0xdc]", - "fadd dword [ecx + ebp*0x1]", - "fstp dword [ecx + ebp*0x1]", - "fld dword [esp + 0xe0]", - "fadd dword [ecx + ebp*0x1 + 0x4]", - "fstp dword [ecx + ebp*0x1 + 0x4]", - "fld dword [esp + 0xe4]", - "fadd dword [ecx + ebp*0x1 + 0x8]", - "fstp dword [ecx + ebp*0x1 + 0x8]", - "fld dword [esp + 0x58]", - "fmul st1", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x5c]", - "fmul st1", - "fstp dword [esp + 0x40]", - "fld dword [esp + 0x60]", - "fmul st1", - "fstp dword [esp + 0x44]", - "fld dword [ecx + eax*0x1]", - "fadd dword [esp + 0x3c]", - "fstp dword [ecx + eax*0x1]", - "fld dword [esp + 0x40]", - "fadd dword [ecx + eax*0x1 + 0x4]", - "fstp dword [ecx + eax*0x1 + 0x4]", - "lea eax,[ecx + eax*0x1 + 0x8]", - "fld dword [esp + 0x44]", - "fadd dword [eax]", - "fstp dword [eax]", - "mov eax,dword [esp + 0x1e0]", - "fld dword [esp + 0x4c]", - "fmul st1", - "fstp dword [esp + 0x2c]", - "fld dword [esp + 0x50]", - "fmul st1", - "fstp dword [esp + 0x30]", - "fmul dword [esp + 0x54]", - "fstp dword [esp + 0x34]", - "fld dword [ecx + eax*0x1]", - "fadd dword [esp + 0x2c]", - "fstp dword [ecx + eax*0x1]", - "fld dword [esp + 0x30]", - "fadd dword [ecx + eax*0x1 + 0x4]", - "fstp dword [ecx + eax*0x1 + 0x4]", - "lea ecx,[ecx + eax*0x1 + 0x8]", - "fld dword [esp + 0x34]", - "fadd dword [ecx]", - "fstp dword [ecx]" - ], - "ExpectedArm64ASM": [ - "add w20, w10, w6, lsl #3", - "ldrh w4, [x20]", - "ldrb w20, [x28, #1019]", - "add w21, w10, #0x4 (4)", - "add w21, w21, w6, lsl #3", - "ldr s2, [x21]", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90923,53 +65481,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w10, [x8, #456]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #156]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90997,27 +65518,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "uxth w4, w4", - "mov x5, x4", - "ldr w20, [x8, #484]", - "mul w5, w5, w20", - "add w4, w4, w4, lsl #1", - "add w4, w4, w4", - "add w4, w4, w4", - "add w20, w4, #0x8 (8)", - "add w11, w20, w10", - "str w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91029,10 +65531,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91046,7 +65551,10 @@ "mov v2.d[0], x0", "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "str q2, [x0, #1040]", + "sub w22, w4, #0x18 (24)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91059,12 +65567,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91074,13 +65580,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #152]", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91110,14 +65619,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "mov x22, #0xffffffffffffffec", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91163,7 +65673,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91179,13 +65689,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w4, #0x14 (20)", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91198,12 +65704,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91213,18 +65717,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #160]", + "mov x22, #0xfffffffffffffff0", + "ldr s2, [x4, w22, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91254,13 +65757,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91306,7 +65810,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91322,13 +65826,44 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w4, #0x10 (16)", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w25, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91340,13 +65875,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91359,15 +65891,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91429,7 +65962,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w4, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91458,14 +65991,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #208]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #168]", + "mov x21, #0xfffffffffffffff8", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91495,15 +66030,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91549,7 +66083,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91565,8 +66099,44 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #164]", + "sub w21, w4, #0x8 (8)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91596,14 +66166,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x4, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91649,7 +66220,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91665,13 +66236,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "sub w21, w4, #0x4 (4)", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91684,12 +66251,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91699,18 +66264,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #172]", + "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91740,13 +66303,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91792,7 +66356,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -91808,13 +66372,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91827,12 +66386,44 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x4]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -91845,15 +66436,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91915,7 +66507,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w4, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91944,14 +66536,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #212]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #180]", + "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91981,15 +66574,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92035,7 +66627,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92051,8 +66643,44 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", + "add w21, w4, #0x8 (8)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92082,14 +66710,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92135,7 +66763,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92151,14 +66779,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "mov x10, x11", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0xc (12)", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92171,12 +66794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92186,18 +66807,16 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #184]", + "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92227,13 +66846,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92279,7 +66899,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92295,17 +66915,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w10, [x8, #56]", - "add w20, w10, #0x8 (8)", - "add w11, w20, w4", - "str w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w4, #0x10 (16)", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92318,12 +66930,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92333,18 +66943,260 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w25, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #144]", + "strb w20, [x28, #1019]" + ] + }, + "Block8": { + "ExpectedInstructionCount": 6590, + "x86Insts": [ + "movzx eax,word [esi + edx*0x8]", + "fld dword [esi + edx*0x8 + 0x4]", + "fstp dword [esp + 0x24]", + "mov esi,dword [esp + 0x1c8]", + "fld dword [esp + 0x9c]", + "movzx eax,ax", + "mov ecx,eax", + "imul ecx,dword [esp + 0x1e4]", + "lea eax,[eax + eax*0x2]", + "add eax,eax", + "add eax,eax", + "lea edi,[eax + esi*0x1 + 0x8]", + "mov dword [esp + 0x10],edi", + "fmul dword [eax + esi*0x1 + 0x4]", + "fld dword [esp + 0x98]", + "fmul dword [eax + esi*0x1]", + "faddp", + "fld dword [esp + 0xa0]", + "fmul dword [edi]", + "faddp", + "fadd dword [esp + 0x88]", + "fstp dword [esp + 0xd0]", + "fld dword [esp + 0xa8]", + "fmul dword [eax + esi*0x1 + 0x4]", + "fld dword [esp + 0xa4]", + "fmul dword [eax + esi*0x1]", + "faddp", + "fld dword [esp + 0xac]", + "fmul dword [edi]", + "faddp", + "fadd dword [esp + 0x8c]", + "fstp dword [esp + 0xd4]", + "fld dword [esp + 0xb4]", + "fmul dword [eax + esi*0x1 + 0x4]", + "fld dword [esp + 0xb0]", + "fmul dword [eax + esi*0x1]", + "mov esi,edi", + "faddp", + "fld dword [esp + 0xb8]", + "fmul dword [esi]", + "mov esi,dword [esp + 0x38]", + "lea edi,[esi + eax*0x1 + 0x8]", + "mov dword [esp + 0x10],edi", + "faddp", + "fadd dword [esp + 0x90]", + "fstp dword [esp + 0xd8]", + "fld dword [esp + 0x64]", + "fld st0", + "fmul dword [eax + ebx*0x1]", + "fld dword [esp + 0x68]", + "fld st0", + "fmul dword [eax + ebx*0x1 + 0x4]", + "faddp st2,st0", + "fld dword [esp + 0x6c]", + "fld st0", + "fmul dword [eax + ebx*0x1 + 0x8]", + "faddp st3,st0", + "fxch st2", + "fstp dword [esp + 0xe8]", + "fld dword [esp + 0x70]", + "fld st0", + "fmul dword [eax + ebx*0x1]", + "fld dword [esp + 0x74]", + "fld st0", + "fmul dword [eax + ebx*0x1 + 0x4]", + "faddp st2,st0", + "fld dword [esp + 0x78]", + "fmul dword [eax + ebx*0x1 + 0x8]", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0xec]", + "fld dword [esp + 0x7c]", + "fmul dword [eax + ebx*0x1]", + "fld dword [esp + 0x80]", + "fmul dword [eax + ebx*0x1 + 0x4]", + "faddp", + "fld dword [esp + 0x84]", + "fmul dword [eax + ebx*0x1 + 0x8]", + "faddp", + "fstp dword [esp + 0xf0]", + "fld st2", + "fmul dword [esi + eax*0x1 + 0x4]", + "fld st5", + "fmul dword [esi + eax*0x1]", + "faddp", + "fld st4", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x58]", + "fld st0", + "fmul dword [esi + eax*0x1 + 0x4]", + "fld st2", + "fmul dword [esi + eax*0x1]", + "faddp", + "fld dword [esp + 0x78]", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x5c]", + "fld dword [esp + 0x80]", + "fmul dword [esi + eax*0x1 + 0x4]", + "fld dword [esp + 0x7c]", + "fmul dword [esi + eax*0x1]", + "mov esi,edi", + "faddp", + "fld dword [esp + 0x84]", + "fmul dword [esi]", + "mov esi,dword [esp + 0x20]", + "lea edi,[esi + eax*0x1 + 0x4]", + "mov dword [esp + 0x10],edi", + "faddp", + "lea edi,[esi + eax*0x1 + 0x8]", + "mov dword [esp + 0xbc],edi", + "mov edi,dword [esp + 0x10]", + "fstp dword [esp + 0x60]", + "fld dword [esi + eax*0x1]", + "fmulp st5", + "fld dword [edi]", + "mov edi,dword [esp + 0xbc]", + "fmulp st3", + "fxch st4", + "faddp st2,st0", + "fld dword [edi]", + "mov edi,dword [esp + 0x10]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x4c]", + "fmul dword [esi + eax*0x1]", + "fld dword [edi]", + "mov edi,dword [esp + 0xbc]", + "fmulp st2", + "faddp", + "fld dword [esp + 0x78]", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x50]", + "fld dword [esp + 0x7c]", + "fmul dword [esi + eax*0x1]", + "mov eax,dword [esp + 0x10]", + "fld dword [esp + 0x80]", + "fmul dword [eax]", + "mov eax,dword [esp + 0x1d4]", + "faddp", + "fld dword [esp + 0x84]", + "fmul dword [edi]", + "faddp", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0xd0]", + "fld dword [esp + 0x24]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0xc0]", + "fld dword [esp + 0xd4]", + "fmul st1", + "fstp dword [esp + 0xc4]", + "fld dword [esp + 0xd8]", + "fmul st1", + "fstp dword [esp + 0xc8]", + "fld dword [esp + 0xc0]", + "fadd dword [ecx + eax*0x1]", + "fstp dword [ecx + eax*0x1]", + "add edx,0x1", + "cmp edx,dword [esp + 0x1c]", + "fld dword [esp + 0xc4]", + "fadd dword [ecx + eax*0x1 + 0x4]", + "fstp dword [ecx + eax*0x1 + 0x4]", + "lea eax,[ecx + eax*0x1 + 0x8]", + "fld dword [eax]", + "fadd dword [esp + 0xc8]", + "fstp dword [eax]", + "mov eax,dword [esp + 0x1dc]", + "fld dword [esp + 0xe8]", + "fmul st1", + "fstp dword [esp + 0xdc]", + "fld dword [esp + 0xec]", + "fmul st1", + "fstp dword [esp + 0xe0]", + "fld dword [esp + 0xf0]", + "fmul st1", + "fstp dword [esp + 0xe4]", + "fld dword [esp + 0xdc]", + "fadd dword [ecx + ebp*0x1]", + "fstp dword [ecx + ebp*0x1]", + "fld dword [esp + 0xe0]", + "fadd dword [ecx + ebp*0x1 + 0x4]", + "fstp dword [ecx + ebp*0x1 + 0x4]", + "fld dword [esp + 0xe4]", + "fadd dword [ecx + ebp*0x1 + 0x8]", + "fstp dword [ecx + ebp*0x1 + 0x8]", + "fld dword [esp + 0x58]", + "fmul st1", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x5c]", + "fmul st1", + "fstp dword [esp + 0x40]", + "fld dword [esp + 0x60]", + "fmul st1", + "fstp dword [esp + 0x44]", + "fld dword [ecx + eax*0x1]", + "fadd dword [esp + 0x3c]", + "fstp dword [ecx + eax*0x1]", + "fld dword [esp + 0x40]", + "fadd dword [ecx + eax*0x1 + 0x4]", + "fstp dword [ecx + eax*0x1 + 0x4]", + "lea eax,[ecx + eax*0x1 + 0x8]", + "fld dword [esp + 0x44]", + "fadd dword [eax]", + "fstp dword [eax]", + "mov eax,dword [esp + 0x1e0]", + "fld dword [esp + 0x4c]", + "fmul st1", + "fstp dword [esp + 0x2c]", + "fld dword [esp + 0x50]", + "fmul st1", + "fstp dword [esp + 0x30]", + "fmul dword [esp + 0x54]", + "fstp dword [esp + 0x34]", + "fld dword [ecx + eax*0x1]", + "fadd dword [esp + 0x2c]", + "fstp dword [ecx + eax*0x1]", + "fld dword [esp + 0x30]", + "fadd dword [ecx + eax*0x1 + 0x4]", + "fstp dword [ecx + eax*0x1 + 0x4]", + "lea ecx,[ecx + eax*0x1 + 0x8]", + "fld dword [esp + 0x34]", + "fadd dword [ecx]", + "fstp dword [ecx]" + ], + "ExpectedArm64ASM": [ + "add w20, w10, w6, lsl #3", + "ldrh w4, [x20]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w6, lsl #3", + "ldr s2, [x20]", + "add w20, w8, #0x24 (36)", + "str s2, [x20]", + "ldr w10, [x8, #456]", + "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92372,8 +67224,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "uxth w4, w4", + "mov x5, x4", + "ldr w20, [x8, #484]", + "mul w5, w5, w20", + "add w4, w4, w4, lsl #1", + "add w4, w4, w4", + "add w4, w4, w4", + "add w20, w4, #0x8 (8)", + "add w11, w20, w10", + "str w11, [x8, #16]", + "add w20, w4, #0x4 (4)", + "add w20, w20, w10", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92385,13 +67248,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92401,14 +67261,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92423,8 +67278,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92434,15 +67291,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #216]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92454,7 +67306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92467,31 +67319,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w10", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92503,7 +67335,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92516,11 +67348,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92535,8 +67365,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -92548,13 +67378,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92566,10 +67392,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92582,29 +67411,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldr s3, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92616,7 +67423,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92629,11 +67436,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92645,13 +67451,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92661,18 +67464,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92687,9 +67481,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -92700,18 +67494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92723,10 +67508,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -92739,29 +67527,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldr s3, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92773,7 +67539,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92786,50 +67552,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92842,10 +67567,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -92860,28 +67585,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xd0 (208)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92908,14 +67612,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #232]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "str s2, [x20]", + "ldr s2, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92943,28 +67641,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "add w20, w4, #0x4 (4)", + "add w20, w20, w10", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92976,7 +67655,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -92989,11 +67668,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93006,10 +67683,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93024,10 +67701,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "ldr s3, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93039,7 +67713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93052,32 +67726,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w10", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93089,7 +67742,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93102,11 +67755,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93121,8 +67772,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93134,18 +67785,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93158,10 +67800,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93176,15 +67818,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s3, [x8, #172]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93196,7 +67830,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93209,20 +67843,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93234,7 +67858,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93247,11 +67871,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93266,8 +67888,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93279,70 +67901,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93357,41 +67918,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #236]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93404,16 +67934,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "ldr s3, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93425,7 +67946,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93438,11 +67959,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93455,11 +67974,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -93473,10 +67992,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "add w20, w8, #0xd4 (212)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93488,10 +68004,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93501,20 +68018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93542,8 +68048,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w20, w4, #0x4 (4)", + "add w20, w20, w10", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93554,14 +68061,11 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93571,18 +68075,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93595,11 +68090,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -93613,15 +68108,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "ldr s3, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93633,7 +68120,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93646,20 +68133,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w10", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93671,7 +68149,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93684,11 +68162,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93703,8 +68179,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93716,18 +68192,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov x10, x11", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93740,10 +68208,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93758,16 +68226,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93779,11 +68238,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93793,29 +68251,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #240]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93827,7 +68266,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -93840,11 +68279,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93859,8 +68296,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -93872,26 +68309,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w10, [x8, #56]", + "add w20, w10, #0x8 (8)", + "add w11, w20, w4", + "str w11, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93903,10 +68327,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93919,8 +68346,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93932,13 +68358,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -93948,18 +68371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93972,10 +68386,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -93990,27 +68404,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "add w20, w8, #0xd8 (216)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94022,10 +68416,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94035,11 +68430,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94051,13 +68444,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94070,15 +68460,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w20, w4, w7", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94090,13 +68473,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94106,19 +68486,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94133,8 +68503,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94144,29 +68516,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94178,7 +68531,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94191,11 +68544,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x4 (4)", + "add w20, w20, w7", + "ldr s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94207,13 +68561,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94223,26 +68574,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94254,10 +68588,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94267,11 +68604,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94286,9 +68621,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -94299,18 +68634,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94322,13 +68649,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94338,18 +68662,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w4, #0x8 (8)", + "add w20, w20, w7", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94361,7 +68679,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94374,18 +68692,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94397,10 +68706,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94410,11 +68722,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94429,9 +68739,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -94442,18 +68752,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "strb wzr, [x28, #1017]", + "add w20, w8, #0xe8 (232)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94468,10 +68771,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94481,19 +68782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94505,11 +68796,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94519,15 +68809,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, w7", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94539,7 +68825,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94552,20 +68838,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94577,10 +68852,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94590,11 +68868,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94606,13 +68883,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94622,13 +68896,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x4 (4)", + "add w20, w20, w7", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94640,7 +68913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94653,19 +68926,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94677,10 +68940,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94690,11 +68956,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94707,11 +68971,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -94722,19 +68986,67 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "mov x10, x11", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s8", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x8 (8)", + "add w20, w20, w7", + "ldr s9, [x20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s9", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94747,11 +69059,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -94762,18 +69074,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94785,10 +69088,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94798,18 +69104,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "strb wzr, [x28, #1017]", + "add w20, w8, #0xec (236)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94821,10 +69120,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94834,11 +69134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94850,13 +69148,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94866,22 +69161,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w10, [x8, #32]", - "add w20, w10, #0x4 (4)", - "add w11, w20, w4", - "str w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w4, w7", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94893,13 +69177,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94909,23 +69190,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "add w20, w10, #0x8 (8)", - "add w11, w20, w4", - "str w11, [x8, #188]", - "ldr w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94938,10 +69205,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -94951,16 +69220,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94972,7 +69235,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -94985,23 +69248,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x4 (4)", + "add w20, w20, w7", + "ldr s9, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95013,13 +69265,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95029,18 +69278,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95052,10 +69292,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95065,24 +69308,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95095,11 +69323,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95110,35 +69338,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95150,13 +69353,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95166,18 +69366,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x8 (8)", + "add w20, w20, w7", + "ldr s9, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95189,7 +69383,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95202,24 +69396,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #16]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95232,10 +69411,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95247,35 +69426,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95288,10 +69441,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -95303,31 +69456,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0xf0 (240)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95340,8 +69472,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -95353,16 +69485,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "fmov s6, s0", + "str s6, [x20]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w4", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95374,7 +69501,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95387,11 +69514,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95404,10 +69529,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95419,13 +69544,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, w4", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95437,7 +69560,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95450,24 +69573,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #188]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95480,10 +69588,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95495,23 +69603,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95524,10 +69618,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -95539,18 +69633,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95562,7 +69648,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95575,18 +69661,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95598,10 +69675,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95611,11 +69691,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95628,11 +69706,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95643,18 +69721,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95667,12 +69737,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95682,19 +69750,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", + "add w20, w10, #0x4 (4)", + "add w20, w20, w4", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95706,11 +69766,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95720,15 +69779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95740,10 +69793,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95753,19 +69809,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, w4", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95777,7 +69825,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95790,11 +69838,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95809,8 +69855,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -95822,14 +69868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95841,10 +69882,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95854,18 +69898,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95877,7 +69913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -95890,11 +69926,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95906,35 +69941,22 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", "ldp x6, x7, [x28, #296]", "ldr x8, [x28, #312]", "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x8, #468]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95947,11 +69969,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -95962,18 +69984,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95985,10 +69998,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -95998,18 +70014,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96021,10 +70029,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96034,11 +70043,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96050,13 +70057,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96066,18 +70070,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, #0x4 (4)", + "add w20, w20, w4", + "ldr s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96089,13 +70087,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s8", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96105,19 +70100,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96130,10 +70115,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96143,15 +70130,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #208]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96163,7 +70145,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96176,18 +70158,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w10, w4", + "ldr s9, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96199,7 +70174,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96212,35 +70187,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96253,10 +70202,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -96268,31 +70217,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "mov x10, x11", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96305,10 +70233,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96318,15 +70248,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #192]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #212]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s8, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96338,7 +70263,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96351,23 +70276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96379,13 +70291,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96395,14 +70304,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96415,10 +70319,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96428,15 +70334,13 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #196]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #216]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w10, [x8, #32]", + "add w20, w10, #0x4 (4)", + "add w11, w20, w4", + "str w11, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96448,10 +70352,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96461,23 +70368,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w10, #0x8 (8)", + "add w11, w20, w4", + "str w11, [x8, #188]", + "ldr w11, [x8, #16]", + "add w20, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96490,12 +70388,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96505,14 +70401,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", + "add w20, w10, w4", + "ldr s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96524,11 +70416,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96538,15 +70429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #200]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96558,10 +70443,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96574,16 +70462,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "ldr s6, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96595,7 +70474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96608,11 +70487,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w11, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96625,11 +70503,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -96640,14 +70518,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96660,10 +70534,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96673,21 +70549,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w6, w6, #0x1 (1)", - "ldr w20, [x8, #28]", - "eor w27, w6, w20", - "subs w26, w6, w20", - "cfinv", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #196]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96699,7 +70564,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -96712,20 +70577,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w11, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96737,10 +70592,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96750,11 +70608,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96767,8 +70624,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -96785,11 +70642,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96816,18 +70670,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w4, w20, w4", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "str s2, [x20]", + "add w20, w10, w4", + "ldr s2, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96855,15 +70700,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96875,10 +70711,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96891,8 +70730,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96904,13 +70742,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96920,14 +70755,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w11, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96940,10 +70771,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96953,16 +70786,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #476]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #232]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96974,10 +70800,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -96990,20 +70819,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97015,13 +70831,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97031,14 +70844,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97050,11 +70859,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97064,15 +70872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #220]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #236]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97084,10 +70886,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97097,23 +70902,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97126,11 +70917,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97144,11 +70935,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97175,14 +70962,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #224]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #240]", + "str s2, [x20]", + "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97210,20 +70991,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w20, w10, w4", + "ldr s3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97235,13 +71004,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97251,14 +71017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97273,8 +71034,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97284,15 +71047,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #228]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #220]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr w4, [x8, #16]", + "ldr s3, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97304,7 +71063,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97317,19 +71076,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w9", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97341,7 +71091,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97354,11 +71104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97373,9 +71121,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97386,14 +71134,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x8, #468]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97408,8 +71152,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -97419,16 +71165,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #224]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "ldr s3, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97440,7 +71180,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97453,20 +71193,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w9", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97478,7 +71208,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97491,11 +71221,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97510,8 +71238,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -97526,11 +71284,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97557,16 +71311,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #228]", + "str s2, [x20]", + "ldr s2, [x8, #208]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97594,17 +71340,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x8 (8)", - "add w23, w23, w9", - "ldr s2, [x23]", + "ldr s3, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97616,7 +71352,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -97629,11 +71365,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97646,11 +71380,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97664,11 +71398,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0xc0 (192)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97695,16 +71426,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x8 (8)", - "add w23, w23, w9", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "str s2, [x20]", + "ldr s2, [x8, #212]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97732,20 +71455,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97758,10 +71467,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97776,11 +71485,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc4 (196)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97807,14 +71512,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "str s2, [x20]", + "ldr s2, [x8, #216]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97842,20 +71541,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97868,10 +71553,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -97886,11 +71571,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc8 (200)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97917,14 +71598,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "str s2, [x20]", + "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97952,20 +71627,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w20, w5, w4", + "ldr s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97977,12 +71640,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -97996,11 +71686,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98027,15 +71713,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "str s2, [x20]", + "mov w20, #0x1", + "add w6, w6, #0x1 (1)", + "ldr w21, [x8, #28]", + "eor w27, w6, w21", + "subs w26, w6, w21", + "cfinv", + "ldr s2, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98063,15 +71748,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98083,7 +71762,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98096,11 +71775,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98113,10 +71790,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98131,11 +71808,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98162,15 +71836,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w4, w21, w4", + "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98198,17 +71867,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "ldr s4, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98220,7 +71879,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98233,11 +71892,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98250,10 +71907,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -98268,11 +71925,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98299,18 +71951,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w4, w20, w4", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "str s2, [x4]", + "ldr w4, [x8, #476]", + "ldr s2, [x8, #232]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98338,15 +71981,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0xdc (220)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #236]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98374,8 +72067,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98388,11 +72079,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -98406,11 +72097,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe0 (224)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98437,15 +72124,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x8, #480]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "str s2, [x21]", + "ldr s2, [x8, #240]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98473,20 +72153,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98499,10 +72165,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -98517,11 +72183,35 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0xe4 (228)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #220]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98533,11 +72223,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98547,15 +72236,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98567,7 +72252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -98580,23 +72265,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98609,11 +72280,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -98627,11 +72298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98658,14 +72325,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "str s2, [x21]", + "ldr s2, [x8, #224]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98693,8 +72354,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98706,13 +72368,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98722,14 +72381,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98744,8 +72398,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98755,16 +72411,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w5, w4", - "ldr s2, [x23]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x4 (4)", + "add w21, w21, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98776,10 +72427,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98789,18 +72441,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #228]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98828,8 +72471,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w5, #0x8 (8)", + "add w21, w21, w9", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98841,13 +72485,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98857,14 +72498,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98879,8 +72515,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98890,16 +72528,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w23, w5, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x8 (8)", + "add w21, w21, w9", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98911,10 +72544,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -98924,20 +72558,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98965,8 +72588,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98979,11 +72600,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -98997,11 +72618,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99028,18 +72645,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w5, #0x4 (4)", - "add w23, w23, w4", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w20, w5, #0x8 (8)", - "add w5, w20, w4", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "str s2, [x21]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99067,15 +72674,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99087,10 +72685,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -99103,8 +72704,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "add w21, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99117,12 +72717,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -99132,14 +72730,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99151,11 +72744,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -99165,283 +72757,69 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x5]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "Block9": { - "ExpectedInstructionCount": 295, - "x86Insts": [ - "fld dword [edi]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "lea ecx,[esp + 0x10]", - "fld1", - "push ecx", - "fdivrp", - "lea edx,[esp + 0x50]", - "push edx", - "lea ecx,[esp + 0x7c]", - "fstp dword [esp + 0x10]", - "fld dword [edi]", - "fchs", - "fld dword [esp + 0x10]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x10]", - "fld dword [esp + 0x3c]", - "fmul st1", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x40]", - "fmul st1", - "fstp dword [esp + 0x70]", - "fmul dword [esp + 0x44]", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x30]", - "fld dword [esp + 0x10]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x60]", - "fld dword [esp + 0x34]", - "fmul st1", - "fstp dword [esp + 0x64]", - "fmul dword [esp + 0x38]", - "fstp dword [esp + 0x68]", - "fld dword [esp + 0x60]", - "fadd dword [esp + 0x6c]", - "fstp dword [esp + 0x54]", - "fld dword [esp + 0x64]", - "fadd dword [esp + 0x70]", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x68]", - "fadd dword [esp + 0x74]", - "fstp dword [esp + 0x5c]", - "call 0x00716e00", - "mov ecx,dword [eax]", - "mov dword [esi + 0x20],ecx", - "mov edx,dword [eax + 0x4]", - "mov dword [esi + 0x24],edx", - "mov ecx,dword [eax + 0x8]", - "mov dword [esi + 0x28],ecx", - "mov edx,dword [eax + 0xc]", - "mov dword [esi + 0x2c],edx", - "fld dword [edi + 0x4]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fld1", - "fdivrp", - "fstp dword [esp + 0x8]", - "fld dword [edi + 0x4]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x8]", - "fchs", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0x34]", - "fld dword [esp + 0xc]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x58]", - "fld dword [esp + 0x38]", - "fmul st1", - "fstp dword [esp + 0x5c]", - "fmul dword [esp + 0x3c]", - "fstp dword [esp + 0x60]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x68]", - "fmul dword [esp + 0x30]", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x64]", - "fadd dword [esp + 0x58]", - "fstp dword [esp + 0x74]", - "mov eax,dword [esp + 0x74]", - "fld dword [esp + 0x68]", - "mov dword [esp + 0x4c],eax", - "fadd dword [esp + 0x5c]", - "lea eax,[esp + 0x10]", - "push eax", - "fstp dword [esp + 0x7c]", - "mov ecx,dword [esp + 0x7c]", - "fld dword [esp + 0x70]", - "mov dword [esp + 0x54],ecx", - "fadd dword [esp + 0x64]", - "lea ecx,[esp + 0x50]", - "push ecx", - "lea ecx,[esp + 0x7c]", - "fstp dword [esp + 0x84]", - "mov edx,dword [esp + 0x84]", - "mov dword [esp + 0x5c],edx", - "call 0x00716e00", - "mov edx,dword [eax]", - "mov dword [esi + 0x30],edx", - "mov ecx,dword [eax + 0x4]", - "mov dword [esi + 0x34],ecx", - "mov edx,dword [eax + 0x8]", - "mov dword [esi + 0x38],edx", - "mov eax,dword [eax + 0xc]", - "mov dword [esi + 0x3c],eax", - "fld dword [edi + 0x8]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fld1", - "fdivrp", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x8]", - "fld st0", - "fmul dword [edi + 0x8]", - "fstp dword [esp + 0x8]", - "fchs", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0x40]", - "fld dword [esp + 0xc]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x44]", - "fmul st1", - "fstp dword [esp + 0x68]", - "fmul dword [esp + 0x48]", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x78]", - "fmul dword [esp + 0x30]", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x74]", - "fadd dword [esp + 0x64]", - "fstp dword [esp + 0x58]", - "mov ecx,dword [esp + 0x58]", - "fld dword [esp + 0x78]", - "mov dword [esp + 0x4c],ecx", - "fadd dword [esp + 0x68]", - "lea ecx,[esp + 0x10]", - "push ecx", - "lea ecx,[esp + 0x78]", - "fstp dword [esp + 0x60]", - "mov edx,dword [esp + 0x60]", - "fld dword [esp + 0x80]", - "mov dword [esp + 0x54],edx", - "fadd dword [esp + 0x70]", - "lea edx,[esp + 0x50]", - "push edx", - "fstp dword [esp + 0x68]", - "mov eax,dword [esp + 0x68]", - "mov dword [esp + 0x5c],eax", - "call 0x00716e00", - "mov ecx,dword [eax]", - "mov dword [esi + 0x40],ecx", - "mov edx,dword [eax + 0x4]", - "mov dword [esi + 0x44],edx", - "mov ecx,dword [eax + 0x8]", - "mov dword [esi + 0x48],ecx", - "mov edx,dword [eax + 0xc]", - "mov dword [esi + 0x4c],edx", - "fld dword [edi + 0xc]", - "fmul st0", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fadd qword [0x00a2f928]", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "call 0x00982c30", - "fstp dword [esp + 0xc]", - "fld dword [esp + 0xc]", - "fld1", - "fdivrp", - "fstp dword [esp + 0x8]", - "fld dword [edi + 0xc]", - "fchs", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x8]", - "fld dword [esp + 0x40]", - "fmul st1", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x44]", - "fmul st1", - "fstp dword [esp + 0x68]", - "fmul dword [esp + 0x48]", - "fstp dword [esp + 0x6c]", - "fld dword [esp + 0x28]", - "fld dword [esp + 0x8]", - "fld st0", - "fmulp st2", - "fxch", - "fstp dword [esp + 0x74]", - "fld dword [esp + 0x2c]", - "fmul st1", - "fstp dword [esp + 0x78]", - "fmul dword [esp + 0x30]", - "fstp dword [esp + 0x7c]", - "fld dword [esp + 0x74]", - "fadd dword [esp + 0x64]", - "fstp dword [esp + 0x58]", - "mov eax,dword [esp + 0x58]", - "fld dword [esp + 0x78]", - "mov dword [esp + 0x4c],eax", - "fadd dword [esp + 0x68]", - "lea eax,[esp + 0x10]", - "fstp dword [esp + 0x5c]", - "mov ecx,dword [esp + 0x5c]", - "fld dword [esp + 0x7c]", - "mov dword [esp + 0x50],ecx", - "fadd dword [esp + 0x6c]", - "lea ecx,[esp + 0x4c]", - "fstp dword [esp + 0x60]", - "mov edx,dword [esp + 0x60]", - "mov dword [esp + 0x54],edx" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr s2, [x11]", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x44 (68)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w5, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99469,22 +72847,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s4, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99496,12 +72859,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -99515,11 +72905,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99546,14 +72932,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x21]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99581,17 +72961,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0xf928", - "movk w23, #0xa2, lsl #16", - "ldr d2, [x23]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s4, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99603,9 +72975,98 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w4, w21, w4", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -99619,8 +73080,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99632,11 +73092,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -99651,11 +73138,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99682,14 +73164,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "str s2, [x4]", + "ldr w4, [x8, #480]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99717,241 +73194,65 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "mov w20, #0x4fe2", - "movk w20, #0x1, lsl #16", - "mov w22, #0x2c11", - "movk w22, #0x98, lsl #16", - "add w22, w20, w22", - "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", - "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", - "add x0, x0, x3, lsl #4", - "ldp x1, x0, [x0]" - ] - }, - "Block10": { - "ExpectedInstructionCount": 1268, - "x86Insts": [ - "fld dword [0x00b42a74]", - "push ecx", - "fstp dword [0x00b42a20]", - "lea ecx,[esp + 0x48]", - "fld dword [0x00b42a78]", - "fstp dword [0x00b42a24]", - "fld dword [0x00b42a7c]", - "fstp dword [0x00b42a28]", - "fld dword [0x00b42a68]", - "fstp dword [0x00b42a2c]", - "fld dword [0x00b42a6c]", - "fstp dword [0x00b42a30]", - "fld dword [0x00b42a70]", - "fstp dword [0x00b42a34]", - "fld dword [0x00b42a5c]", - "fstp dword [0x00b42a38]", - "fld dword [0x00b42a60]", - "fstp dword [0x00b42a3c]", - "fld dword [0x00b42a64]", - "fstp dword [0x00b42a40]", - "fld dword [0x00b42a50]", - "fstp dword [0x00b42a44]", - "fld dword [0x00b42a54]", - "fstp dword [0x00b42a48]", - "fld dword [0x00b42a58]", - "fstp dword [0x00b42a4c]", - "fst dword [esp + 0x48]", - "fst dword [esp + 0x58]", - "fstp dword [esp + 0x68]", - "fst dword [esp + 0x4c]", - "fst dword [esp + 0x50]", - "fst dword [esp + 0x54]", - "fst dword [esp + 0x5c]", - "fst dword [esp + 0x60]", - "fstp dword [esp + 0x64]", - "fld dword [esp + 0x4]", - "fstp dword [esp]", - "call 0x00793aa0", - "fld dword [esp + 0x50]", - "fld dword [0x00b42a78]", - "fst qword [esp + 0x28]", - "fld dword [0x00b42a74]", - "fst qword [esp + 0x30]", - "fld dword [esp + 0x44]", - "fld dword [esp + 0x5c]", - "fld dword [0x00b42a7c]", - "fst qword [esp + 0x10]", - "fld st2", - "fmul st4", - "fld st6", - "fmul st6", - "faddp", - "fld st2", - "fmulp st2", - "faddp", - "fstp dword [esp + 0x38]", - "fld dword [esp + 0x54]", - "fld dword [esp + 0x48]", - "fld dword [esp + 0x60]", - "fstp qword [esp]", - "fld st0", - "fmulp st5", - "fld st1", - "fmulp st6", - "fxch st4", - "faddp st5,st0", - "fld qword [esp]", - "fmul qword [esp + 0x10]", - "faddp st5,st0", - "fxch st4", - "fstp dword [esp + 0x3c]", - "fld dword [esp + 0x58]", - "fst qword [esp + 0x20]", - "fld dword [esp + 0x4c]", - "fst qword [esp + 0x18]", - "fld dword [esp + 0x64]", - "fstp qword [esp + 0x8]", - "fmul qword [esp + 0x30]", - "fxch", - "fmul qword [esp + 0x28]", - "faddp", - "fld qword [esp + 0x8]", - "mov eax,dword [esp + 0x38]", - "fmul qword [esp + 0x10]", - "mov ecx,dword [esp + 0x3c]", - "mov [0x00b2ba7c],eax", - "mov dword [0x00b2ba80],ecx", - "faddp", - "fstp dword [esp + 0x40]", - "mov edx,dword [esp + 0x40]", - "fld dword [0x00b42a6c]", - "mov dword [0x00b2ba84],edx", - "fst qword [esp + 0x30]", - "fld dword [0x00b42a68]", - "fst qword [esp + 0x28]", - "fld dword [0x00b42a70]", - "fstp qword [esp + 0x10]", - "fmul st3", - "fld st6", - "fmulp st2", - "faddp", - "fld st1", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x38]", - "mov eax,dword [esp + 0x38]", - "fld st2", - "mov [0x00b2ba88],eax", - "fmul qword [esp + 0x28]", - "fld st4", - "fmul qword [esp + 0x30]", - "faddp", - "fld qword [esp]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x3c]", - "mov ecx,dword [esp + 0x3c]", - "fld qword [esp + 0x18]", - "mov dword [0x00b2ba8c],ecx", - "fmul qword [esp + 0x28]", - "fld qword [esp + 0x20]", - "fmul qword [esp + 0x30]", - "faddp", - "fld qword [esp + 0x8]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x40]", - "mov edx,dword [esp + 0x40]", - "fld dword [0x00b42a60]", - "mov dword [0x00b2ba90],edx", - "fst qword [esp + 0x28]", - "fld dword [0x00b42a5c]", - "fst qword [esp + 0x30]", - "fld dword [0x00b42a64]", - "fstp qword [esp + 0x10]", - "fmul st3", - "fld st6", - "fmulp st2", - "faddp", - "fld st1", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x38]", - "mov eax,dword [esp + 0x38]", - "fld st2", - "fmul qword [esp + 0x30]", - "fld st4", - "fmul qword [esp + 0x28]", - "faddp", - "fld qword [esp]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x3c]", - "fld qword [esp + 0x18]", - "fmul qword [esp + 0x30]", - "fld qword [esp + 0x20]", - "fmul qword [esp + 0x28]", - "faddp", - "fld qword [esp + 0x8]", - "fmul qword [esp + 0x10]", - "faddp", - "fstp dword [esp + 0x40]", - "fld dword [0x00b42a54]", - "mov ecx,dword [esp + 0x3c]", - "fld dword [0x00b42a50]", - "mov edx,dword [esp + 0x40]", - "fld dword [0x00b42a58]", - "mov [0x00b2ba94],eax", - "fxch st4", - "mov dword [0x00b2ba98],ecx", - "fmul st1", - "mov dword [0x00b2ba9c],edx", - "fxch st7", - "fmul st2", - "faddp st7,st0", - "fxch st2", - "fmul st3", - "faddp st6,st0", - "fxch st5", - "fstp dword [esp + 0x38]", - "mov eax,dword [esp + 0x38]", - "mov [0x00b2baa0],eax", - "fmul st2", - "fxch st3", - "fmul st4", - "faddp st2,st0", - "fld qword [esp]", - "fmul st1", - "faddp st2,st0", - "fxch", - "fstp dword [esp + 0x3c]", - "mov ecx,dword [esp + 0x3c]", - "fld qword [esp + 0x18]", - "mov dword [0x00b2baa4],ecx", - "fmulp st2", - "fld qword [esp + 0x20]", - "fmulp st3", - "fxch", - "faddp st2,st0", - "fmul qword [esp + 0x8]", - "faddp", - "fstp dword [esp + 0x40]", - "mov edx,dword [esp + 0x40]", - "mov dword [0x00b2baa8],edx", - "mov esp,ebp", - "pop ebp" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x2a74", - "movk w21, #0xb4, lsl #16", - "ldr s2, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x2c (44)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99979,20 +73280,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "str w5, [x8, #-4]!", - "strb w22, [x28, #1298]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100019,20 +73337,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a20", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w5, w8, #0x48 (72)", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a78", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100060,16 +73366,37 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100096,18 +73423,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a24", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a7c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "add w21, w5, w4", + "ldr s2, [x21]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100135,16 +73453,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100156,11 +73465,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100170,19 +73478,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a28", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a68", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100194,10 +73492,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100210,16 +73511,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100246,18 +73538,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a2c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a6c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100285,16 +73567,68 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", + "ldr s3, [x21]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w21, w5, #0x4 (4)", + "add w21, w21, w4", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100321,18 +73655,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a30", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a70", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x21]", + "add w21, w5, #0x8 (8)", + "add w5, w21, w4", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100360,16 +73686,64 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x5]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100396,18 +73770,282 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a34", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a5c", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x5]", + "ldrb w21, [x28, #1019]", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w20, w21", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" + ] + }, + "Block9": { + "ExpectedInstructionCount": 251, + "x86Insts": [ + "fld dword [edi]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "lea ecx,[esp + 0x10]", + "fld1", + "push ecx", + "fdivrp", + "lea edx,[esp + 0x50]", + "push edx", + "lea ecx,[esp + 0x7c]", + "fstp dword [esp + 0x10]", + "fld dword [edi]", + "fchs", + "fld dword [esp + 0x10]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x10]", + "fld dword [esp + 0x3c]", + "fmul st1", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x40]", + "fmul st1", + "fstp dword [esp + 0x70]", + "fmul dword [esp + 0x44]", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x30]", + "fld dword [esp + 0x10]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x60]", + "fld dword [esp + 0x34]", + "fmul st1", + "fstp dword [esp + 0x64]", + "fmul dword [esp + 0x38]", + "fstp dword [esp + 0x68]", + "fld dword [esp + 0x60]", + "fadd dword [esp + 0x6c]", + "fstp dword [esp + 0x54]", + "fld dword [esp + 0x64]", + "fadd dword [esp + 0x70]", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x68]", + "fadd dword [esp + 0x74]", + "fstp dword [esp + 0x5c]", + "call 0x00716e00", + "mov ecx,dword [eax]", + "mov dword [esi + 0x20],ecx", + "mov edx,dword [eax + 0x4]", + "mov dword [esi + 0x24],edx", + "mov ecx,dword [eax + 0x8]", + "mov dword [esi + 0x28],ecx", + "mov edx,dword [eax + 0xc]", + "mov dword [esi + 0x2c],edx", + "fld dword [edi + 0x4]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fld1", + "fdivrp", + "fstp dword [esp + 0x8]", + "fld dword [edi + 0x4]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x8]", + "fchs", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0x34]", + "fld dword [esp + 0xc]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x58]", + "fld dword [esp + 0x38]", + "fmul st1", + "fstp dword [esp + 0x5c]", + "fmul dword [esp + 0x3c]", + "fstp dword [esp + 0x60]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x68]", + "fmul dword [esp + 0x30]", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x64]", + "fadd dword [esp + 0x58]", + "fstp dword [esp + 0x74]", + "mov eax,dword [esp + 0x74]", + "fld dword [esp + 0x68]", + "mov dword [esp + 0x4c],eax", + "fadd dword [esp + 0x5c]", + "lea eax,[esp + 0x10]", + "push eax", + "fstp dword [esp + 0x7c]", + "mov ecx,dword [esp + 0x7c]", + "fld dword [esp + 0x70]", + "mov dword [esp + 0x54],ecx", + "fadd dword [esp + 0x64]", + "lea ecx,[esp + 0x50]", + "push ecx", + "lea ecx,[esp + 0x7c]", + "fstp dword [esp + 0x84]", + "mov edx,dword [esp + 0x84]", + "mov dword [esp + 0x5c],edx", + "call 0x00716e00", + "mov edx,dword [eax]", + "mov dword [esi + 0x30],edx", + "mov ecx,dword [eax + 0x4]", + "mov dword [esi + 0x34],ecx", + "mov edx,dword [eax + 0x8]", + "mov dword [esi + 0x38],edx", + "mov eax,dword [eax + 0xc]", + "mov dword [esi + 0x3c],eax", + "fld dword [edi + 0x8]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fld1", + "fdivrp", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x8]", + "fld st0", + "fmul dword [edi + 0x8]", + "fstp dword [esp + 0x8]", + "fchs", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0x40]", + "fld dword [esp + 0xc]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x44]", + "fmul st1", + "fstp dword [esp + 0x68]", + "fmul dword [esp + 0x48]", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x78]", + "fmul dword [esp + 0x30]", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x74]", + "fadd dword [esp + 0x64]", + "fstp dword [esp + 0x58]", + "mov ecx,dword [esp + 0x58]", + "fld dword [esp + 0x78]", + "mov dword [esp + 0x4c],ecx", + "fadd dword [esp + 0x68]", + "lea ecx,[esp + 0x10]", + "push ecx", + "lea ecx,[esp + 0x78]", + "fstp dword [esp + 0x60]", + "mov edx,dword [esp + 0x60]", + "fld dword [esp + 0x80]", + "mov dword [esp + 0x54],edx", + "fadd dword [esp + 0x70]", + "lea edx,[esp + 0x50]", + "push edx", + "fstp dword [esp + 0x68]", + "mov eax,dword [esp + 0x68]", + "mov dword [esp + 0x5c],eax", + "call 0x00716e00", + "mov ecx,dword [eax]", + "mov dword [esi + 0x40],ecx", + "mov edx,dword [eax + 0x4]", + "mov dword [esi + 0x44],edx", + "mov ecx,dword [eax + 0x8]", + "mov dword [esi + 0x48],ecx", + "mov edx,dword [eax + 0xc]", + "mov dword [esi + 0x4c],edx", + "fld dword [edi + 0xc]", + "fmul st0", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fadd qword [0x00a2f928]", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "call 0x00982c30", + "fstp dword [esp + 0xc]", + "fld dword [esp + 0xc]", + "fld1", + "fdivrp", + "fstp dword [esp + 0x8]", + "fld dword [edi + 0xc]", + "fchs", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x8]", + "fld dword [esp + 0x40]", + "fmul st1", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x44]", + "fmul st1", + "fstp dword [esp + 0x68]", + "fmul dword [esp + 0x48]", + "fstp dword [esp + 0x6c]", + "fld dword [esp + 0x28]", + "fld dword [esp + 0x8]", + "fld st0", + "fmulp st2", + "fxch", + "fstp dword [esp + 0x74]", + "fld dword [esp + 0x2c]", + "fmul st1", + "fstp dword [esp + 0x78]", + "fmul dword [esp + 0x30]", + "fstp dword [esp + 0x7c]", + "fld dword [esp + 0x74]", + "fadd dword [esp + 0x64]", + "fstp dword [esp + 0x58]", + "mov eax,dword [esp + 0x58]", + "fld dword [esp + 0x78]", + "mov dword [esp + 0x4c],eax", + "fadd dword [esp + 0x68]", + "lea eax,[esp + 0x10]", + "fstp dword [esp + 0x5c]", + "mov ecx,dword [esp + 0x5c]", + "fld dword [esp + 0x7c]", + "mov dword [esp + 0x50],ecx", + "fadd dword [esp + 0x6c]", + "lea ecx,[esp + 0x4c]", + "fstp dword [esp + 0x60]", + "mov edx,dword [esp + 0x60]", + "mov dword [esp + 0x54],edx" + ], + "ExpectedArm64ASM": [ + "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100435,16 +74073,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100459,45 +74087,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a38", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a60", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100510,16 +74103,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100546,18 +74130,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a3c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a64", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x20]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100585,54 +74159,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a40", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a50", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "mov w20, #0xf928", + "movk w20, #0xa2, lsl #16", + "ldr d3, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100644,9 +74173,9 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "mov v0.8b, v3.8b", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", + "ldr x1, [x28, #1432]", "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -100657,19 +74186,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100684,45 +74203,10 @@ "ldrh w0, [x28, #1296]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a44", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a54", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -100735,16 +74219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100771,18 +74246,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w23, #0x2a48", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x2a58", - "movk w23, #0xb4, lsl #16", - "ldr s2, [x23]", + "str s2, [x20]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100810,52 +74275,325 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "mov w20, #0x4fe2", + "movk w20, #0x1, lsl #16", + "mov w21, #0x2c11", + "movk w21, #0x98, lsl #16", + "add w21, w20, w21", + "str w20, [x8, #-4]!", + "ldrb w20, [x28, #1019]", + "mov w22, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov w23, #0x2a4c", - "movk w23, #0xb4, lsl #16", - "str s2, [x23]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w23, [x28, #1298]", + "lsl w20, w22, w20", + "orr w20, w23, w20", + "strb w20, [x28, #1298]", + "ldr x0, [x28, #2272]", + "and x3, x21, #0xfffff", + "add x0, x0, x3, lsl #4", + "ldp x1, x0, [x0]" + ] + }, + "Block10": { + "ExpectedInstructionCount": 450, + "x86Insts": [ + "fld dword [0x00b42a74]", + "push ecx", + "fstp dword [0x00b42a20]", + "lea ecx,[esp + 0x48]", + "fld dword [0x00b42a78]", + "fstp dword [0x00b42a24]", + "fld dword [0x00b42a7c]", + "fstp dword [0x00b42a28]", + "fld dword [0x00b42a68]", + "fstp dword [0x00b42a2c]", + "fld dword [0x00b42a6c]", + "fstp dword [0x00b42a30]", + "fld dword [0x00b42a70]", + "fstp dword [0x00b42a34]", + "fld dword [0x00b42a5c]", + "fstp dword [0x00b42a38]", + "fld dword [0x00b42a60]", + "fstp dword [0x00b42a3c]", + "fld dword [0x00b42a64]", + "fstp dword [0x00b42a40]", + "fld dword [0x00b42a50]", + "fstp dword [0x00b42a44]", + "fld dword [0x00b42a54]", + "fstp dword [0x00b42a48]", + "fld dword [0x00b42a58]", + "fstp dword [0x00b42a4c]", + "fst dword [esp + 0x48]", + "fst dword [esp + 0x58]", + "fstp dword [esp + 0x68]", + "fst dword [esp + 0x4c]", + "fst dword [esp + 0x50]", + "fst dword [esp + 0x54]", + "fst dword [esp + 0x5c]", + "fst dword [esp + 0x60]", + "fstp dword [esp + 0x64]", + "fld dword [esp + 0x4]", + "fstp dword [esp]", + "call 0x00793aa0", + "fld dword [esp + 0x50]", + "fld dword [0x00b42a78]", + "fst qword [esp + 0x28]", + "fld dword [0x00b42a74]", + "fst qword [esp + 0x30]", + "fld dword [esp + 0x44]", + "fld dword [esp + 0x5c]", + "fld dword [0x00b42a7c]", + "fst qword [esp + 0x10]", + "fld st2", + "fmul st4", + "fld st6", + "fmul st6", + "faddp", + "fld st2", + "fmulp st2", + "faddp", + "fstp dword [esp + 0x38]", + "fld dword [esp + 0x54]", + "fld dword [esp + 0x48]", + "fld dword [esp + 0x60]", + "fstp qword [esp]", + "fld st0", + "fmulp st5", + "fld st1", + "fmulp st6", + "fxch st4", + "faddp st5,st0", + "fld qword [esp]", + "fmul qword [esp + 0x10]", + "faddp st5,st0", + "fxch st4", + "fstp dword [esp + 0x3c]", + "fld dword [esp + 0x58]", + "fst qword [esp + 0x20]", + "fld dword [esp + 0x4c]", + "fst qword [esp + 0x18]", + "fld dword [esp + 0x64]", + "fstp qword [esp + 0x8]", + "fmul qword [esp + 0x30]", + "fxch", + "fmul qword [esp + 0x28]", + "faddp", + "fld qword [esp + 0x8]", + "mov eax,dword [esp + 0x38]", + "fmul qword [esp + 0x10]", + "mov ecx,dword [esp + 0x3c]", + "mov [0x00b2ba7c],eax", + "mov dword [0x00b2ba80],ecx", + "faddp", + "fstp dword [esp + 0x40]", + "mov edx,dword [esp + 0x40]", + "fld dword [0x00b42a6c]", + "mov dword [0x00b2ba84],edx", + "fst qword [esp + 0x30]", + "fld dword [0x00b42a68]", + "fst qword [esp + 0x28]", + "fld dword [0x00b42a70]", + "fstp qword [esp + 0x10]", + "fmul st3", + "fld st6", + "fmulp st2", + "faddp", + "fld st1", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x38]", + "mov eax,dword [esp + 0x38]", + "fld st2", + "mov [0x00b2ba88],eax", + "fmul qword [esp + 0x28]", + "fld st4", + "fmul qword [esp + 0x30]", + "faddp", + "fld qword [esp]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x3c]", + "mov ecx,dword [esp + 0x3c]", + "fld qword [esp + 0x18]", + "mov dword [0x00b2ba8c],ecx", + "fmul qword [esp + 0x28]", + "fld qword [esp + 0x20]", + "fmul qword [esp + 0x30]", + "faddp", + "fld qword [esp + 0x8]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x40]", + "mov edx,dword [esp + 0x40]", + "fld dword [0x00b42a60]", + "mov dword [0x00b2ba90],edx", + "fst qword [esp + 0x28]", + "fld dword [0x00b42a5c]", + "fst qword [esp + 0x30]", + "fld dword [0x00b42a64]", + "fstp qword [esp + 0x10]", + "fmul st3", + "fld st6", + "fmulp st2", + "faddp", + "fld st1", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x38]", + "mov eax,dword [esp + 0x38]", + "fld st2", + "fmul qword [esp + 0x30]", + "fld st4", + "fmul qword [esp + 0x28]", + "faddp", + "fld qword [esp]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x3c]", + "fld qword [esp + 0x18]", + "fmul qword [esp + 0x30]", + "fld qword [esp + 0x20]", + "fmul qword [esp + 0x28]", + "faddp", + "fld qword [esp + 0x8]", + "fmul qword [esp + 0x10]", + "faddp", + "fstp dword [esp + 0x40]", + "fld dword [0x00b42a54]", + "mov ecx,dword [esp + 0x3c]", + "fld dword [0x00b42a50]", + "mov edx,dword [esp + 0x40]", + "fld dword [0x00b42a58]", + "mov [0x00b2ba94],eax", + "fxch st4", + "mov dword [0x00b2ba98],ecx", + "fmul st1", + "mov dword [0x00b2ba9c],edx", + "fxch st7", + "fmul st2", + "faddp st7,st0", + "fxch st2", + "fmul st3", + "faddp st6,st0", + "fxch st5", + "fstp dword [esp + 0x38]", + "mov eax,dword [esp + 0x38]", + "mov [0x00b2baa0],eax", + "fmul st2", + "fxch st3", + "fmul st4", + "faddp st2,st0", + "fld qword [esp]", + "fmul st1", + "faddp st2,st0", + "fxch", + "fstp dword [esp + 0x3c]", + "mov ecx,dword [esp + 0x3c]", + "fld qword [esp + 0x18]", + "mov dword [0x00b2baa4],ecx", + "fmulp st2", + "fld qword [esp + 0x20]", + "fmulp st3", + "fxch", + "faddp st2,st0", + "fmul qword [esp + 0x8]", + "faddp", + "fstp dword [esp + 0x40]", + "mov edx,dword [esp + 0x40]", + "mov dword [0x00b2baa8],edx", + "mov esp,ebp", + "pop ebp" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x2a74", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "str w5, [x8, #-4]!", + "mov w20, #0x2a20", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "add w5, w8, #0x48 (72)", + "mov w20, #0x2a78", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a24", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a7c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a28", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a68", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a2c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a6c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a30", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a70", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a34", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a5c", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a38", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a60", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a3c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a64", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a40", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a50", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a44", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a54", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a48", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "mov w20, #0x2a58", + "movk w20, #0xb4, lsl #16", + "ldr s2, [x20]", + "mov w20, #0x2a4c", + "movk w20, #0xb4, lsl #16", + "str s2, [x20]", + "add w20, w8, #0x48 (72)", + "ldrb w21, [x28, #1019]", + "add w21, w21, #0x7 (7)", + "and w21, w21, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100883,9 +74621,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "str s2, [x20]", + "add w20, w8, #0x58 (88)", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100913,9 +74651,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "str s2, [x20]", + "add w20, w8, #0x68 (104)", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100943,13 +74681,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", + "str s2, [x20]", + "ldrb w20, [x28, #1298]", + "lsl w22, w23, w21", + "bic w20, w20, w22", + "strb w20, [x28, #1298]", + "add w20, w21, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100978,8 +74718,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101008,8 +74748,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101038,8 +74778,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101068,8 +74808,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101098,8 +74838,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w20, [x28, #1019]", + "str s2, [x21]", + "add w21, w8, #0x64 (100)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101128,13 +74868,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101165,12 +74906,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "orr w21, w21, w22", + "strb w21, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101200,20 +74942,21 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "lsl w21, w21, w20", - "bic w21, w22, w21", + "ldrb w21, [x28, #1298]", + "lsl w22, w23, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x54a9", "movk w20, #0x1, lsl #16", - "mov w22, #0x39db", - "movk w22, #0x79, lsl #16", - "add w22, w20, w22", + "mov w21, #0x39db", + "movk w21, #0x79, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json index 7e6065ad57..82feaa352d 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 20545, + "ExpectedInstructionCount": 16357, "x86Insts": [ "sub esp,0x88", "fld dword [ecx + 0x4]", @@ -538,7 +538,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x88 (136)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -567,18 +566,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x5, #24]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #16]", + "ldr s3, [x5, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -590,7 +579,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -603,19 +592,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "str w6, [x8, #20]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #20]", + "ldr s4, [x5, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -627,7 +608,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -640,19 +621,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w6, [x5, #28]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #32]", + "ldr s5, [x5, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -664,7 +637,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -677,19 +650,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "str w6, [x8, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #36]", + "ldr s6, [x5, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -701,7 +666,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -714,18 +679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -737,7 +694,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -750,18 +707,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -773,7 +722,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -786,11 +735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -803,10 +750,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -818,13 +765,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -836,7 +780,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -849,18 +793,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -872,7 +808,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -885,11 +821,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -902,10 +836,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -917,13 +851,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -935,7 +866,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -948,18 +879,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -971,7 +894,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -984,11 +907,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1001,10 +922,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1016,14 +937,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1036,8 +953,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1049,15 +966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1069,7 +980,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1082,18 +993,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1105,7 +1008,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1118,11 +1021,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1135,10 +1036,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1150,14 +1051,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1170,8 +1066,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1183,15 +1079,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1203,7 +1093,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1216,18 +1106,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1239,7 +1121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1252,11 +1134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1269,10 +1149,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1284,18 +1164,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1308,8 +1179,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1323,14 +1194,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1343,8 +1210,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1356,15 +1223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1376,7 +1237,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1389,18 +1250,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1412,7 +1265,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1425,11 +1278,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1442,10 +1293,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1457,18 +1308,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1481,8 +1323,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -1496,14 +1338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1516,8 +1353,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1529,15 +1366,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1549,7 +1380,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1562,23 +1393,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1591,10 +1408,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1606,14 +1423,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1626,8 +1439,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1639,15 +1452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1659,7 +1466,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1672,23 +1479,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1701,10 +1494,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -1716,14 +1509,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1736,8 +1525,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1749,27 +1538,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s9, s0", + "str s9, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1781,7 +1553,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1794,11 +1566,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1811,10 +1581,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1826,14 +1596,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1846,8 +1612,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1859,15 +1625,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1879,7 +1639,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1892,11 +1652,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1909,10 +1667,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -1924,14 +1682,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1944,8 +1698,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -1957,15 +1711,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1977,7 +1725,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -1990,18 +1738,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2013,7 +1753,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2026,11 +1766,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2043,10 +1781,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2058,13 +1796,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2076,7 +1811,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2089,18 +1824,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2112,7 +1839,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2125,11 +1852,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2142,10 +1867,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2157,13 +1882,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2175,7 +1897,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2188,18 +1910,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2211,7 +1925,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2224,11 +1938,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2241,10 +1953,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2256,14 +1968,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2276,8 +1984,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2289,15 +1997,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2309,7 +2011,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2322,18 +2024,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2345,7 +2039,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2358,11 +2052,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2375,10 +2067,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2390,14 +2082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2410,8 +2097,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2423,15 +2110,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2443,7 +2124,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2456,18 +2137,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2479,7 +2152,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2492,11 +2165,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2509,10 +2180,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2524,18 +2195,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2548,8 +2210,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2563,14 +2225,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2583,8 +2241,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2596,15 +2254,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2616,7 +2268,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2629,18 +2281,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2652,7 +2296,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2665,11 +2309,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2682,10 +2324,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2697,18 +2339,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2721,8 +2354,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -2736,14 +2369,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2756,8 +2384,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2769,27 +2397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x8]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2801,7 +2411,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2814,11 +2424,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2831,10 +2439,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2846,14 +2454,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2866,8 +2470,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2879,15 +2483,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2899,7 +2497,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -2912,23 +2510,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2941,10 +2525,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -2956,14 +2540,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2976,8 +2556,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -2989,15 +2569,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s9, s0", + "str s9, [x20]", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3009,7 +2583,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3022,23 +2596,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3051,10 +2611,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3066,14 +2626,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3086,8 +2642,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3099,15 +2655,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3119,7 +2669,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3132,11 +2682,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3149,10 +2697,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3164,14 +2712,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3184,8 +2728,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3197,29 +2741,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3231,7 +2755,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3244,18 +2768,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3267,7 +2783,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3280,11 +2796,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3297,10 +2811,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3312,13 +2826,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3330,7 +2841,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3343,18 +2854,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3366,7 +2869,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3379,11 +2882,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3396,10 +2897,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3411,14 +2912,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3431,8 +2927,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3444,32 +2940,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3482,10 +2954,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3497,13 +2969,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3515,7 +2984,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3528,23 +2997,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3557,10 +3012,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3572,18 +3027,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3596,10 +3042,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3611,19 +3057,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3636,8 +3073,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3649,20 +3086,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3675,10 +3100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3690,13 +3115,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3708,7 +3130,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3721,23 +3143,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3750,10 +3158,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -3765,18 +3173,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3789,10 +3188,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -3804,19 +3203,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3829,8 +3219,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -3842,15 +3232,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3862,7 +3246,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3875,18 +3259,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3898,7 +3274,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3911,11 +3287,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3928,10 +3302,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3943,13 +3317,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3961,7 +3332,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -3974,18 +3345,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3997,7 +3360,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4010,11 +3373,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4027,10 +3388,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4042,14 +3403,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4062,8 +3418,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4075,15 +3431,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4095,7 +3445,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4108,23 +3458,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4137,10 +3473,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4152,13 +3488,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4170,7 +3503,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4183,18 +3516,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4206,7 +3531,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4219,11 +3544,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4236,10 +3559,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4251,18 +3574,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4275,10 +3589,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4290,19 +3604,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4315,8 +3620,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4328,15 +3633,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4348,7 +3647,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4361,18 +3660,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4384,7 +3675,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4397,11 +3688,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4414,10 +3703,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4429,25 +3718,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4459,7 +3734,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4472,11 +3747,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4489,10 +3762,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -4504,18 +3777,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4528,10 +3792,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4543,19 +3807,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4568,8 +3822,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4581,15 +3835,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4601,7 +3849,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4614,18 +3862,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4637,7 +3877,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4650,11 +3890,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4667,10 +3905,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4682,14 +3920,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4702,8 +3936,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4715,15 +3949,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4735,7 +3963,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4748,18 +3976,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4771,7 +3991,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4784,11 +4004,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4801,10 +4019,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -4816,14 +4034,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4836,8 +4050,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4849,15 +4063,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4869,7 +4077,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4882,18 +4090,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4905,7 +4105,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -4918,11 +4118,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4935,10 +4133,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -4950,14 +4148,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4970,8 +4164,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -4983,15 +4177,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5003,7 +4191,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5016,18 +4204,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5039,7 +4219,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5052,11 +4232,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5069,10 +4247,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5084,14 +4262,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5104,8 +4278,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5117,15 +4291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5137,7 +4305,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5150,18 +4318,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5173,7 +4333,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5186,11 +4346,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5203,10 +4361,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5218,13 +4376,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5236,7 +4391,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5249,18 +4404,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5272,7 +4419,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5285,11 +4432,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5302,10 +4447,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5317,14 +4462,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5337,8 +4477,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5350,15 +4490,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5370,7 +4504,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5383,23 +4517,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5412,10 +4532,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5427,13 +4547,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5445,7 +4562,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5458,18 +4575,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", + "ldr s10, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5481,7 +4590,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s10", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5494,11 +4603,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v10.16b, v10.16b, v10.16b", + "mov v10.d[0], x0", + "mov v10.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5511,10 +4618,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v10.d[0]", + "umov w4, v10.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5526,18 +4633,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5550,10 +4648,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -5565,19 +4663,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5590,8 +4679,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5603,15 +4692,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5623,7 +4706,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5636,11 +4719,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5653,10 +4734,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5668,13 +4749,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5686,7 +4764,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5699,18 +4777,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5722,7 +4792,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5735,11 +4805,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5752,10 +4820,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -5767,18 +4835,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5791,10 +4850,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5806,19 +4865,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5831,8 +4881,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -5844,15 +4894,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5864,7 +4908,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5877,18 +4921,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5900,7 +4936,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5913,11 +4949,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5930,10 +4964,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5945,13 +4979,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5963,7 +4994,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -5976,18 +5007,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5999,7 +5022,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6012,11 +5035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6029,10 +5050,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6044,14 +5065,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6064,8 +5080,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6077,15 +5093,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s9, s0", + "str s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6098,10 +5107,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6113,30 +5122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6149,10 +5137,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6164,18 +5152,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6188,10 +5167,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6203,19 +5182,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6228,8 +5198,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6241,15 +5211,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6261,7 +5225,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6274,23 +5238,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6303,10 +5253,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6318,30 +5268,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6354,10 +5284,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -6369,18 +5299,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6393,10 +5314,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6408,19 +5329,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6433,8 +5344,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6446,15 +5357,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6466,7 +5371,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6479,18 +5384,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6502,7 +5399,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6515,11 +5412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6532,10 +5427,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6547,14 +5442,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6567,8 +5458,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6580,15 +5471,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6600,7 +5485,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6613,18 +5498,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6636,7 +5513,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6649,11 +5526,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6666,10 +5541,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -6681,14 +5556,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6701,8 +5572,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6714,15 +5585,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6734,7 +5599,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6747,18 +5612,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6770,7 +5627,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6783,11 +5640,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6800,10 +5655,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6815,14 +5670,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6835,8 +5686,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6848,15 +5699,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6868,7 +5713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6881,18 +5726,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6904,7 +5741,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -6917,11 +5754,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6934,10 +5769,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -6949,14 +5784,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6969,8 +5800,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -6982,15 +5813,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7002,7 +5827,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7015,18 +5840,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7038,7 +5855,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7051,11 +5868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7068,10 +5883,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7083,13 +5898,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7101,7 +5913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7114,18 +5926,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7137,7 +5941,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7150,11 +5954,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7167,10 +5969,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7182,14 +5984,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7202,8 +5999,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7215,32 +6012,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7253,10 +6026,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7268,13 +6041,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7286,7 +6056,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7299,23 +6069,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7328,10 +6084,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7343,18 +6099,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7367,10 +6114,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7382,19 +6129,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7407,8 +6145,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7420,20 +6158,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7446,10 +6172,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7461,13 +6187,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7479,7 +6202,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7492,23 +6215,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7521,10 +6230,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7536,18 +6245,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7560,10 +6260,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7575,19 +6275,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7600,8 +6291,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7613,15 +6304,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7633,7 +6318,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7646,18 +6331,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7669,7 +6346,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7682,11 +6359,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7699,10 +6374,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -7714,13 +6389,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7732,7 +6404,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7745,18 +6417,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7768,7 +6432,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7781,11 +6445,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7798,10 +6460,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -7813,14 +6475,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7833,8 +6490,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -7846,32 +6503,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7884,10 +6517,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7899,13 +6532,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7917,7 +6547,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -7930,23 +6560,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7959,10 +6575,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -7974,18 +6590,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7998,10 +6605,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8013,19 +6620,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8038,8 +6636,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8051,15 +6649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8071,7 +6663,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8084,23 +6676,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8113,10 +6691,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8128,30 +6706,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8164,10 +6722,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -8179,18 +6737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8203,10 +6752,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8218,19 +6767,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8243,8 +6782,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8256,15 +6795,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x8]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8276,7 +6809,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8289,18 +6822,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8312,7 +6837,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8325,11 +6850,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8342,10 +6865,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8357,14 +6880,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8377,8 +6896,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8390,15 +6909,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8410,7 +6923,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8423,18 +6936,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8446,7 +6951,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8459,11 +6964,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8476,10 +6979,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8491,14 +6994,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8511,8 +7010,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8524,15 +7023,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8544,7 +7037,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8557,18 +7050,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8580,7 +7065,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8593,11 +7078,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8610,10 +7093,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8625,14 +7108,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8645,8 +7124,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8658,15 +7137,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8678,7 +7151,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8691,18 +7164,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8714,7 +7179,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8727,11 +7192,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8744,10 +7207,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8759,14 +7222,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8779,8 +7238,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -8792,15 +7251,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8812,7 +7265,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8825,18 +7278,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8848,7 +7293,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8861,11 +7306,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8878,10 +7321,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -8893,13 +7336,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8911,7 +7351,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8924,18 +7364,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8947,7 +7379,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -8960,11 +7392,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -8977,10 +7407,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -8992,14 +7422,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9012,8 +7437,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9025,32 +7450,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9063,10 +7464,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9078,13 +7479,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9096,7 +7494,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9109,23 +7507,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9138,10 +7522,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9153,18 +7537,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9177,10 +7552,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9192,19 +7567,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9217,8 +7583,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9230,15 +7596,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9250,7 +7610,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9263,23 +7623,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9292,10 +7638,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9307,30 +7653,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9343,10 +7669,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9358,18 +7684,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9382,10 +7699,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -9397,19 +7714,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9422,8 +7730,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9435,15 +7743,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9455,7 +7757,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9468,18 +7770,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9491,7 +7785,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9504,11 +7798,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9521,10 +7813,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -9536,13 +7828,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9554,7 +7843,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9567,18 +7856,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9590,7 +7871,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9603,11 +7884,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9620,10 +7899,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9635,14 +7914,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9655,8 +7929,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9668,32 +7942,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9706,10 +7956,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9721,13 +7971,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9739,7 +7986,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9752,23 +7999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9781,10 +8014,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v9.d[0]", + "umov w2, v9.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9796,18 +8029,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9820,10 +8044,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -9835,19 +8059,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9860,8 +8075,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -9873,20 +8088,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9899,10 +8102,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9914,13 +8117,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9932,7 +8132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -9945,23 +8145,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9974,10 +8160,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -9989,18 +8175,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10013,10 +8190,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10028,19 +8205,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10053,8 +8220,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10066,43 +8233,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x8]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10114,7 +8247,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10127,18 +8260,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10150,7 +8275,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10163,11 +8288,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10180,10 +8303,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10195,14 +8318,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10215,8 +8334,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10228,15 +8347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10248,7 +8361,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10261,18 +8374,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10284,7 +8389,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10297,11 +8402,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10314,10 +8417,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10329,14 +8432,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10349,8 +8448,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10362,15 +8461,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10382,7 +8475,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10395,18 +8488,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10418,7 +8503,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10431,11 +8516,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10448,10 +8531,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10463,14 +8546,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10483,8 +8562,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10496,15 +8575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10516,7 +8589,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10529,18 +8602,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10552,7 +8617,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10565,11 +8630,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10582,10 +8645,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10597,14 +8660,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10617,8 +8676,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -10630,15 +8689,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10650,7 +8703,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10663,18 +8716,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10686,7 +8731,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10699,11 +8744,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10716,10 +8759,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10731,13 +8774,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10749,7 +8789,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10762,18 +8802,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10785,7 +8817,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10798,11 +8830,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10815,10 +8845,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -10830,25 +8860,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10860,7 +8875,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10873,11 +8888,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10890,10 +8903,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10905,25 +8918,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10935,7 +8933,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -10948,11 +8946,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -10965,10 +8961,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -10980,18 +8976,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11004,10 +8991,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11019,19 +9006,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11044,8 +9022,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11057,27 +9035,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s7, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11089,7 +9050,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11102,11 +9063,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11119,10 +9078,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11134,25 +9093,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11164,7 +9109,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11177,11 +9122,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11194,10 +9137,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11209,18 +9152,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11233,10 +9167,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11248,18 +9182,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11271,7 +9197,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11284,18 +9210,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11307,7 +9225,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11320,11 +9238,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11337,10 +9253,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11352,13 +9268,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11370,7 +9283,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11383,18 +9296,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11406,7 +9311,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11419,11 +9324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11436,10 +9339,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11451,30 +9354,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11487,10 +9369,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11502,30 +9384,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11538,10 +9399,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11553,18 +9414,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11577,10 +9429,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -11592,19 +9444,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11617,8 +9460,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11630,20 +9473,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11656,10 +9487,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11671,30 +9502,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11707,10 +9518,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -11722,18 +9533,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11746,10 +9548,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11761,19 +9563,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11786,8 +9578,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11799,15 +9591,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s6, s0", + "str s6, [x8]", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11819,7 +9605,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11832,18 +9618,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11855,7 +9633,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11868,11 +9646,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11885,10 +9661,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -11900,14 +9676,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11920,8 +9692,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -11933,15 +9705,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11953,7 +9719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -11966,23 +9732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11995,10 +9747,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12010,14 +9762,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12030,8 +9778,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12043,15 +9791,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12063,7 +9805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12076,18 +9818,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12099,7 +9833,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12112,11 +9846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12129,10 +9861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12144,14 +9876,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12164,8 +9892,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12177,15 +9905,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12197,7 +9919,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12210,11 +9932,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12227,10 +9947,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12242,14 +9962,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12262,8 +9978,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12275,15 +9991,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12295,7 +10005,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12308,18 +10018,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12331,7 +10033,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12344,11 +10046,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12361,10 +10061,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12376,13 +10076,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12394,7 +10091,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12407,18 +10104,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12430,7 +10119,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12443,11 +10132,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12460,10 +10147,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -12475,30 +10162,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12511,10 +10177,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12526,30 +10192,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12562,10 +10207,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12577,18 +10222,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12601,10 +10237,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12616,19 +10252,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12641,8 +10268,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -12654,20 +10281,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12680,10 +10295,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12695,30 +10310,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12731,10 +10326,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -12746,18 +10341,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12770,8 +10356,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -12785,46 +10371,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12836,7 +10386,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12849,18 +10399,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12872,7 +10414,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12885,11 +10427,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12902,10 +10442,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -12917,13 +10457,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12935,7 +10472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12948,18 +10485,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -12971,7 +10500,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -12984,11 +10513,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13001,10 +10528,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13016,25 +10543,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13046,7 +10558,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13059,11 +10571,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13076,10 +10586,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13091,25 +10601,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13121,7 +10616,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13134,11 +10629,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13151,10 +10644,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13166,18 +10659,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13190,10 +10674,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13205,19 +10689,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13230,8 +10705,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13243,15 +10718,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13263,7 +10732,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13276,11 +10745,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13293,10 +10760,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13308,25 +10775,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13338,7 +10791,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13351,11 +10804,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13368,10 +10819,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -13383,18 +10834,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13407,10 +10849,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13422,18 +10864,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13445,7 +10879,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13458,18 +10892,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13481,7 +10907,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13494,11 +10920,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13511,10 +10935,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13526,14 +10950,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13546,8 +10966,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13559,32 +10979,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13597,10 +10993,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13612,14 +11008,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13632,8 +11024,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13645,15 +11037,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13665,7 +11051,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13678,18 +11064,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13701,7 +11079,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13714,11 +11092,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13731,10 +11107,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13746,14 +11122,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13766,8 +11138,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -13779,20 +11151,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13805,10 +11165,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -13820,18 +11180,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13843,7 +11195,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13856,18 +11208,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13879,7 +11223,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13892,11 +11236,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13909,10 +11251,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -13924,13 +11266,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13942,7 +11281,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13955,18 +11294,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13978,7 +11309,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -13991,11 +11322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14008,10 +11337,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14023,13 +11352,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14041,7 +11367,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14054,18 +11380,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14077,7 +11395,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14090,11 +11408,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14107,10 +11423,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14122,13 +11438,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14140,7 +11453,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14153,18 +11466,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14176,7 +11481,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14189,11 +11494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14206,10 +11509,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14221,14 +11524,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14241,8 +11539,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14254,32 +11552,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14292,10 +11566,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14307,14 +11581,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14327,8 +11596,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14340,15 +11609,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x4]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14360,7 +11623,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14373,23 +11636,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14402,10 +11651,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -14417,14 +11666,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14437,8 +11682,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14450,32 +11695,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14488,10 +11710,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14503,14 +11725,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14523,8 +11741,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14536,29 +11754,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14570,7 +11768,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14583,11 +11781,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14600,10 +11796,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14615,14 +11811,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14635,8 +11827,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -14648,15 +11840,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14668,7 +11854,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14681,18 +11867,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14704,7 +11882,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14717,11 +11895,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14734,10 +11910,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14749,13 +11925,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14767,7 +11940,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14780,18 +11953,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14803,7 +11968,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14816,11 +11981,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14833,10 +11996,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14848,13 +12011,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14866,7 +12026,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14879,18 +12039,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14902,7 +12054,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14915,11 +12067,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14932,10 +12082,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -14947,13 +12097,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -14965,7 +12112,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -14978,18 +12125,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15001,7 +12140,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15014,11 +12153,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15031,10 +12168,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15046,30 +12183,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15082,10 +12198,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15097,14 +12213,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15117,8 +12229,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15130,32 +12242,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15168,10 +12256,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15183,14 +12271,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15203,8 +12287,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15216,20 +12300,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15242,10 +12314,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15257,14 +12329,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15277,8 +12345,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15290,32 +12358,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15328,10 +12373,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15343,14 +12388,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15363,8 +12404,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15376,43 +12417,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15424,7 +12431,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15437,18 +12444,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15460,7 +12459,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15473,11 +12472,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15490,10 +12487,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15505,13 +12502,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15523,7 +12517,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15536,18 +12530,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15559,7 +12545,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15572,11 +12558,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15589,10 +12573,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15604,13 +12588,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15622,7 +12603,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15635,18 +12616,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15658,7 +12631,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15671,11 +12644,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15688,10 +12659,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15703,13 +12674,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15721,7 +12689,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15734,18 +12702,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15757,7 +12717,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -15770,11 +12730,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15787,10 +12745,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15802,30 +12760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15838,10 +12775,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15853,18 +12790,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15877,8 +12805,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -15892,14 +12820,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15912,8 +12836,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -15925,20 +12849,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15951,10 +12863,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -15966,23 +12878,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -15995,8 +12893,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -16010,13 +12908,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16028,7 +12923,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16041,23 +12936,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16070,10 +12951,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16085,14 +12966,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16105,8 +12982,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16118,32 +12995,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16156,10 +13009,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16171,14 +13024,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16191,8 +13040,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16204,27 +13053,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16236,7 +13068,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16249,11 +13081,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16266,10 +13096,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16281,14 +13111,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16301,8 +13127,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16314,20 +13140,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16340,10 +13154,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16355,14 +13169,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16375,8 +13185,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16388,29 +13198,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16422,7 +13212,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16435,18 +13225,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16458,7 +13240,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16471,11 +13253,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16488,10 +13268,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16503,13 +13283,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16521,7 +13298,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16534,18 +13311,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16557,7 +13326,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16570,11 +13339,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16587,10 +13354,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16602,13 +13369,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16620,7 +13384,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16633,18 +13397,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16656,7 +13412,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16669,11 +13425,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16686,10 +13440,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16701,13 +13455,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16719,7 +13470,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16732,18 +13483,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16755,7 +13498,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -16768,11 +13511,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16785,10 +13526,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16800,30 +13541,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16836,10 +13556,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -16851,18 +13571,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16875,8 +13586,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -16890,14 +13601,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16910,8 +13617,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -16923,20 +13630,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16949,10 +13644,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -16964,23 +13659,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16993,8 +13674,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -17008,30 +13689,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17044,10 +13704,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17059,14 +13719,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17079,8 +13735,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17092,15 +13748,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17112,7 +13762,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17125,23 +13775,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17154,10 +13790,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17169,14 +13805,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17189,8 +13821,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17202,20 +13834,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17228,10 +13848,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17243,14 +13863,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17263,8 +13879,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17276,15 +13892,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17296,7 +13906,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17309,11 +13919,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17326,10 +13934,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17341,14 +13949,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17361,8 +13965,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17374,29 +13978,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17408,7 +13992,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17421,18 +14005,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17444,7 +14020,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17457,11 +14033,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17474,10 +14048,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17489,13 +14063,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17507,7 +14078,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17520,18 +14091,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17543,7 +14106,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17556,11 +14119,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17573,10 +14134,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17588,13 +14149,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17606,7 +14164,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17619,18 +14177,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17642,7 +14192,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17655,11 +14205,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17672,10 +14220,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17687,13 +14235,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17705,7 +14250,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17718,18 +14263,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17741,7 +14278,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17754,11 +14291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17771,10 +14306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -17786,14 +14321,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17806,8 +14336,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17819,32 +14349,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17857,10 +14363,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17872,14 +14378,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17892,8 +14394,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -17905,15 +14407,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17925,7 +14421,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -17938,23 +14434,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17967,10 +14449,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -17982,14 +14464,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18002,8 +14480,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18015,32 +14493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18053,10 +14508,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18068,14 +14523,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18088,8 +14539,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18101,29 +14552,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18135,7 +14566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18148,11 +14579,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18165,10 +14594,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18180,14 +14609,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18200,8 +14625,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18213,15 +14638,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18233,7 +14652,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18246,18 +14665,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18269,7 +14680,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18282,11 +14693,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18299,10 +14708,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18314,13 +14723,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18332,7 +14738,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18345,18 +14751,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18368,7 +14766,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18381,11 +14779,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18398,10 +14794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18413,13 +14809,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18431,7 +14824,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18444,18 +14837,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18467,7 +14852,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18480,11 +14865,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18497,10 +14880,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18512,13 +14895,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18530,7 +14910,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18543,18 +14923,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18566,7 +14938,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -18579,11 +14951,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18596,10 +14966,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18611,30 +14981,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18647,10 +14996,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18662,14 +15011,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18682,8 +15027,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18695,32 +15040,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18733,10 +15054,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18748,14 +15069,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w4, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18768,8 +15085,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18781,20 +15098,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18807,10 +15112,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -18822,14 +15127,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18842,8 +15143,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18855,32 +15156,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18893,10 +15171,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -18908,14 +15186,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18928,8 +15202,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -18941,43 +15215,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18989,7 +15229,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19002,18 +15242,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19025,7 +15257,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19038,11 +15270,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19055,10 +15285,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19070,13 +15300,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19088,7 +15315,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19101,18 +15328,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19124,7 +15343,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19137,11 +15356,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19154,10 +15371,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19169,25 +15386,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19199,7 +15401,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19212,11 +15414,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19231,8 +15431,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19244,13 +15444,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19262,7 +15459,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19275,18 +15472,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19298,7 +15487,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19311,11 +15500,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19328,10 +15515,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19343,30 +15530,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19379,10 +15545,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19394,18 +15560,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19418,8 +15575,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -19433,14 +15590,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19453,8 +15606,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19466,20 +15619,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19492,10 +15633,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19507,23 +15648,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19536,8 +15663,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -19551,13 +15678,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19569,7 +15693,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19582,23 +15706,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19611,10 +15721,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19626,14 +15736,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19646,8 +15752,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19659,32 +15765,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19697,10 +15779,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -19712,14 +15794,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w4, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19732,8 +15810,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19745,27 +15823,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19777,7 +15838,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19790,11 +15851,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19807,10 +15866,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19822,14 +15881,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19842,8 +15897,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19855,20 +15910,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s4, s0", + "str s4, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19881,10 +15924,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -19896,14 +15939,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19916,8 +15955,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -19929,29 +15968,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19963,7 +15982,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -19976,18 +15995,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19999,7 +16010,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20012,11 +16023,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20029,10 +16038,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20044,14 +16053,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20064,8 +16069,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20077,15 +16082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20097,7 +16096,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20110,18 +16109,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20133,7 +16124,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20146,11 +16137,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20163,10 +16152,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20178,14 +16167,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20198,8 +16183,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20211,15 +16196,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20231,7 +16210,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20244,11 +16223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20261,8 +16238,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v3.d[0]", "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", @@ -20276,13 +16253,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20294,7 +16268,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20307,18 +16281,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20330,7 +16296,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20343,11 +16309,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20360,10 +16324,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20375,30 +16339,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20413,8 +16356,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -20426,18 +16369,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20450,8 +16384,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -20465,14 +16399,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20485,8 +16415,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20498,20 +16428,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20524,10 +16442,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20539,18 +16457,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20563,10 +16472,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -20581,29 +16490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20615,7 +16502,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20628,23 +16515,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20672,14 +16545,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20692,8 +16561,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20705,15 +16574,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20725,7 +16588,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20738,18 +16601,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20761,7 +16616,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20774,11 +16629,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20793,8 +16646,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20806,14 +16659,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20826,8 +16675,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -20839,15 +16688,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20859,7 +16702,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -20872,11 +16715,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20889,10 +16730,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -20907,11 +16748,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20938,13 +16775,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20973,15 +16804,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20993,7 +16816,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21006,11 +16829,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21023,10 +16844,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -21041,11 +16862,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21072,20 +16889,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #124]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "adds w26, w8, #0x88 (136)", - "strb w21, [x28, #1298]", "mov x27, x8", - "mov x8, x26" + "mov x8, x26", + "strb wzr, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 17381, + "ExpectedInstructionCount": 14021, "x86Insts": [ "sub esp,0x90", "fld dword [ecx + 0x4]", @@ -21524,7 +17336,6 @@ ], "ExpectedArm64ASM": [ "sub w8, w8, #0x90 (144)", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21553,29 +17364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "ldr s3, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21587,7 +17376,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21600,11 +17389,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21617,10 +17404,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -21632,25 +17419,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21662,7 +17434,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21675,11 +17447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21694,8 +17464,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21707,13 +17477,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21725,7 +17492,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21738,18 +17505,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21761,7 +17520,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21774,11 +17533,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21791,10 +17548,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21806,13 +17563,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21824,7 +17578,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21837,18 +17591,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21860,7 +17606,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21873,11 +17619,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21890,10 +17634,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -21905,13 +17649,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21923,7 +17664,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21936,18 +17677,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #64]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21959,7 +17692,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -21972,11 +17705,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21989,10 +17720,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22004,14 +17735,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22024,8 +17751,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22037,15 +17764,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22057,7 +17778,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22070,18 +17791,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #68]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22093,7 +17806,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22106,11 +17819,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22123,10 +17834,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22138,14 +17849,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22158,8 +17865,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22171,15 +17878,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22191,7 +17892,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22204,18 +17905,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22227,7 +17920,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22240,11 +17933,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22257,10 +17948,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22272,13 +17963,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22290,7 +17978,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22303,18 +17991,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22326,7 +18006,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22339,11 +18019,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22356,10 +18034,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22371,14 +18049,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22391,8 +18065,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22404,15 +18078,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22424,7 +18092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22437,18 +18105,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #96]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22460,7 +18120,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22473,11 +18133,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22490,10 +18148,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22505,14 +18163,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22525,8 +18178,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22538,15 +18191,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22558,7 +18205,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22571,18 +18218,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #100]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22594,7 +18233,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22607,11 +18246,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22624,10 +18261,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22639,14 +18276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22659,8 +18292,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22672,32 +18305,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22710,10 +18319,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22725,14 +18334,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22745,8 +18350,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22758,15 +18363,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22778,7 +18377,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -22791,23 +18390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22820,10 +18405,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -22835,14 +18420,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22855,8 +18436,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22868,32 +18449,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22906,10 +18464,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -22921,14 +18479,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22941,8 +18495,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -22954,29 +18508,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22988,7 +18522,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23001,11 +18535,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23018,10 +18550,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23033,14 +18565,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23053,8 +18581,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23066,15 +18594,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23086,7 +18608,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23099,18 +18621,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23122,7 +18636,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23135,11 +18649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23152,10 +18664,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23167,14 +18679,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23187,8 +18695,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23200,15 +18708,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23220,7 +18722,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23233,18 +18735,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23256,7 +18750,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23269,11 +18763,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23286,10 +18778,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23301,14 +18793,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23321,8 +18809,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23334,15 +18822,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23354,7 +18836,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23367,18 +18849,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23390,7 +18864,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23403,11 +18877,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23420,10 +18892,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23435,14 +18907,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23455,8 +18923,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23468,15 +18936,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23488,7 +18950,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23501,18 +18963,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23524,7 +18978,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23537,11 +18991,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23554,10 +19006,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23569,14 +19021,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23589,8 +19037,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23602,15 +19050,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23622,7 +19064,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23635,18 +19077,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23658,7 +19092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23671,11 +19105,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23688,10 +19120,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23703,13 +19135,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23721,7 +19150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23734,18 +19163,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23757,7 +19178,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23770,11 +19191,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23787,10 +19206,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -23802,13 +19221,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23820,7 +19236,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23833,18 +19249,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #72]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23856,7 +19264,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23869,11 +19277,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23886,10 +19292,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -23901,14 +19307,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23921,8 +19323,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -23934,15 +19336,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23954,7 +19350,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -23967,18 +19363,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #76]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23990,7 +19378,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24003,11 +19391,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24020,10 +19406,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24035,14 +19421,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24055,8 +19437,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24068,15 +19450,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24088,7 +19464,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24101,18 +19477,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24124,7 +19492,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24137,11 +19505,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24154,10 +19520,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24169,13 +19535,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24187,7 +19550,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24200,18 +19563,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24223,7 +19578,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24236,11 +19591,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24253,10 +19606,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24268,14 +19621,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24288,8 +19637,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24301,15 +19650,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24321,7 +19664,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24334,18 +19677,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #104]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24357,7 +19692,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24370,11 +19705,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24387,10 +19720,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24402,14 +19735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24422,8 +19750,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24435,15 +19763,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24455,7 +19777,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24468,18 +19790,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #108]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24491,7 +19805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24504,11 +19818,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24521,10 +19833,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24536,14 +19848,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24556,8 +19864,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24569,32 +19877,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24607,10 +19891,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24622,14 +19906,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24642,8 +19922,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24655,15 +19935,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24675,7 +19949,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24688,23 +19962,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24717,10 +19977,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -24732,14 +19992,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x84 (132)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24752,8 +20008,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24765,32 +20021,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #132]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24803,10 +20036,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24818,14 +20051,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24838,8 +20067,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24851,29 +20080,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24885,7 +20094,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24898,11 +20107,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24915,10 +20122,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -24930,14 +20137,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24950,8 +20153,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -24963,15 +20166,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24983,7 +20180,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -24996,18 +20193,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25019,7 +20208,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25032,11 +20221,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25049,10 +20236,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25064,13 +20251,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25082,7 +20266,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25095,18 +20279,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25118,7 +20294,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25131,11 +20307,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25148,10 +20322,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25163,30 +20337,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25199,10 +20352,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25214,30 +20367,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25250,10 +20382,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25265,18 +20397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25289,10 +20412,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25304,19 +20427,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25329,8 +20443,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25342,20 +20456,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25368,10 +20470,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25383,30 +20485,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25419,10 +20501,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25434,18 +20516,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25458,10 +20531,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25473,19 +20546,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x88 (136)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25498,8 +20562,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25511,15 +20575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25531,7 +20589,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25544,18 +20602,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25567,7 +20617,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25580,11 +20630,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25597,10 +20645,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -25612,13 +20660,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25630,7 +20675,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25643,18 +20688,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25666,7 +20703,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -25679,11 +20716,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25696,10 +20731,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25711,30 +20746,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25747,10 +20761,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25762,30 +20776,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25798,10 +20791,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25813,18 +20806,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25837,10 +20821,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -25852,19 +20836,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x80 (128)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25877,8 +20852,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -25890,32 +20865,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #128]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25928,10 +20880,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25943,30 +20895,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -25979,10 +20911,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -25994,18 +20926,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26018,10 +20941,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26033,19 +20956,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26058,8 +20972,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26071,15 +20985,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26091,7 +20999,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26104,18 +21012,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26127,7 +21027,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26140,11 +21040,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26157,10 +21055,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26172,13 +21070,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26190,7 +21085,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26203,18 +21098,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26226,7 +21113,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26239,11 +21126,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26256,10 +21141,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26271,13 +21156,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26289,7 +21171,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26302,18 +21184,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #80]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26325,7 +21199,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26338,11 +21212,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26355,10 +21227,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26370,14 +21242,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26390,8 +21258,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26403,15 +21271,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26423,7 +21285,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26436,18 +21298,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #84]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26459,7 +21313,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26472,11 +21326,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26489,10 +21341,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26504,14 +21356,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26524,8 +21372,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26537,15 +21385,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26557,7 +21399,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26570,18 +21412,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26593,7 +21427,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26606,11 +21440,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26623,10 +21455,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26638,13 +21470,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26656,7 +21485,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26669,18 +21498,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26692,7 +21513,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26705,11 +21526,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26722,10 +21541,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -26737,14 +21556,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26757,8 +21572,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26770,15 +21585,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26790,7 +21599,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26803,18 +21612,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #112]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26826,7 +21627,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26839,11 +21640,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26856,10 +21655,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -26871,14 +21670,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26891,8 +21685,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -26904,15 +21698,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26924,7 +21712,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26937,18 +21725,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #116]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26960,7 +21740,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -26973,11 +21753,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -26990,10 +21768,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27005,14 +21783,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27025,8 +21799,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27038,32 +21812,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27076,10 +21826,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27091,14 +21841,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27111,8 +21857,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27124,15 +21870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27144,7 +21884,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27157,23 +21897,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27186,10 +21912,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27201,14 +21927,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27221,8 +21943,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27234,32 +21956,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27272,10 +21971,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27287,14 +21986,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27307,8 +22002,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27320,29 +22015,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27354,7 +22029,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27367,11 +22042,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27384,10 +22057,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27399,14 +22072,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27419,8 +22088,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27432,15 +22101,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27452,7 +22115,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27465,18 +22128,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27488,7 +22143,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27501,11 +22156,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27518,10 +22171,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27533,13 +22186,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27551,7 +22201,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27564,18 +22214,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27587,7 +22229,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27600,11 +22242,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27617,10 +22257,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27632,30 +22272,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27668,10 +22287,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -27683,18 +22302,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27707,8 +22317,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -27722,14 +22332,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x38 (56)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27742,8 +22348,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27755,20 +22361,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27781,10 +22375,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27796,18 +22390,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27820,8 +22405,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -27835,14 +22420,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27855,8 +22436,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -27868,29 +22449,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27902,7 +22463,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27915,18 +22476,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27938,7 +22491,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -27951,11 +22504,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -27968,10 +22519,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -27983,13 +22534,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28001,7 +22549,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28014,18 +22562,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28037,7 +22577,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28050,11 +22590,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28067,10 +22605,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28082,30 +22620,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28118,10 +22635,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28133,18 +22650,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28157,8 +22665,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -28172,14 +22680,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28192,8 +22696,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28205,20 +22709,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28231,10 +22723,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28246,18 +22738,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28270,8 +22753,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -28285,14 +22768,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28305,8 +22784,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28318,29 +22797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28352,7 +22811,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28365,18 +22824,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28388,7 +22839,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28401,11 +22852,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28418,10 +22867,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28433,13 +22882,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28451,7 +22897,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28464,18 +22910,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28487,7 +22925,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28500,11 +22938,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28517,10 +22953,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28532,13 +22968,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28550,7 +22983,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28563,18 +22996,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #88]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28586,7 +23011,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28599,11 +23024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28616,10 +23039,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28631,14 +23054,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28651,8 +23070,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28664,15 +23083,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28684,7 +23097,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28697,18 +23110,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #92]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28720,7 +23125,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28733,11 +23138,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28750,10 +23153,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -28765,14 +23168,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28785,8 +23184,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -28798,15 +23197,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "fmov s7, s0", + "str s7, [x20]", + "ldr s7, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28818,7 +23211,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28831,18 +23224,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28854,7 +23239,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28867,11 +23252,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28884,10 +23267,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28899,13 +23282,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28917,7 +23297,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28930,18 +23310,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28953,7 +23325,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -28966,11 +23338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -28983,10 +23353,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -28998,14 +23368,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29018,8 +23384,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29031,15 +23397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29051,7 +23411,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29064,18 +23424,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #120]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29087,7 +23439,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29100,11 +23452,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29117,10 +23467,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29132,14 +23482,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29152,8 +23497,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29165,15 +23510,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "fmov s8, s0", + "str s8, [x8]", + "ldr s8, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29185,7 +23524,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29198,18 +23537,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #124]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr s9, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29221,7 +23552,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29234,11 +23565,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29251,10 +23580,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29266,14 +23595,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29286,8 +23611,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29299,32 +23624,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29337,10 +23638,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29352,14 +23653,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29372,8 +23669,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29385,15 +23682,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s8, s0", + "str s8, [x20]", + "ldr s8, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29405,7 +23696,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29418,23 +23709,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29447,10 +23724,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29462,14 +23739,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "add w20, w8, #0x8c (140)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29482,8 +23755,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29495,32 +23768,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #140]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s8, s0", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29533,10 +23783,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29548,14 +23798,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29568,8 +23814,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29581,29 +23827,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29615,7 +23841,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29628,11 +23854,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29645,10 +23869,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29660,14 +23884,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29680,8 +23900,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -29693,15 +23913,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29713,7 +23927,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29726,18 +23940,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29749,7 +23955,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29762,11 +23968,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29779,10 +23983,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -29794,13 +23998,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29812,7 +24013,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29825,18 +24026,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29848,7 +24041,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -29861,11 +24054,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29878,10 +24069,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -29893,30 +24084,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29929,10 +24099,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -29944,30 +24114,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -29980,10 +24129,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -29995,18 +24144,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30019,10 +24159,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30034,19 +24174,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "add w20, w8, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30059,8 +24190,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30072,32 +24203,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30110,10 +24218,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30125,30 +24233,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30161,10 +24249,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30176,18 +24264,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30200,10 +24279,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30215,19 +24294,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30240,8 +24310,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30253,15 +24323,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30273,7 +24337,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30286,18 +24350,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30309,7 +24365,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30322,11 +24378,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30339,10 +24393,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30354,13 +24408,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30372,7 +24423,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30385,18 +24436,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30408,7 +24451,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30421,11 +24464,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30438,10 +24479,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30453,30 +24494,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30489,10 +24509,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30504,30 +24524,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30540,10 +24539,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30555,18 +24554,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30579,10 +24569,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30594,19 +24584,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30619,8 +24599,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -30632,20 +24612,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s7, s0", + "str s7, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30658,10 +24626,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30673,30 +24641,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30709,10 +24657,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -30724,18 +24672,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30748,10 +24687,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -30763,46 +24702,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30814,7 +24717,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30827,18 +24730,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30850,7 +24745,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30863,11 +24758,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30880,10 +24773,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30895,13 +24788,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30913,7 +24803,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30926,18 +24816,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30949,7 +24831,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -30962,11 +24844,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -30979,10 +24859,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -30994,14 +24874,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31014,8 +24890,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31027,15 +24903,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31047,7 +24917,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31060,18 +24930,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31083,7 +24945,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31096,11 +24958,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31113,10 +24973,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31128,14 +24988,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31148,8 +25004,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31161,15 +25017,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #88]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31181,7 +25031,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31194,18 +25044,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31217,7 +25059,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31230,11 +25072,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31247,10 +25087,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31262,14 +25102,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31282,8 +25118,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31295,15 +25131,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31315,7 +25145,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31328,18 +25158,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31351,7 +25173,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31364,11 +25186,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31381,10 +25201,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31396,13 +25216,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31414,7 +25231,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31427,23 +25244,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31456,10 +25259,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -31471,14 +25274,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31491,8 +25290,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31504,15 +25303,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31524,7 +25317,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31537,18 +25330,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #128]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31560,7 +25345,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31573,11 +25358,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31590,10 +25373,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31605,14 +25388,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31625,8 +25403,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31638,27 +25416,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x8]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s6, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31670,7 +25431,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31683,11 +25444,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31702,8 +25461,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31715,14 +25474,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31735,8 +25490,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31748,44 +25503,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31798,10 +25518,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31813,14 +25533,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x60 (96)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31833,8 +25549,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31846,15 +25562,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #96]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31866,7 +25576,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31879,18 +25589,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s6, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31902,7 +25604,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -31915,11 +25617,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31934,8 +25634,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -31947,14 +25647,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x64 (100)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -31967,8 +25663,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -31980,32 +25676,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #100]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s3, s0", + "str s3, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32018,10 +25691,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32033,14 +25706,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x68 (104)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32053,8 +25722,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32066,29 +25735,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #104]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32100,7 +25749,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32113,18 +25762,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32136,7 +25777,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32149,11 +25790,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32168,8 +25807,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32181,14 +25820,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x6c (108)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32201,8 +25836,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32214,15 +25849,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #108]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32234,7 +25863,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32247,18 +25876,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32270,7 +25891,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32283,11 +25904,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32302,8 +25921,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32315,14 +25934,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x70 (112)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32335,8 +25950,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32348,15 +25963,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #112]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32368,7 +25977,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32381,18 +25990,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32404,7 +26005,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32417,11 +26018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32436,8 +26035,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32449,14 +26048,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x74 (116)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32469,8 +26064,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32482,15 +26077,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #116]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32502,7 +26091,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32515,18 +26104,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32538,7 +26119,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32551,11 +26132,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32570,8 +26149,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32583,14 +26162,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x78 (120)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32603,8 +26178,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32616,15 +26191,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #120]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32636,7 +26205,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32649,18 +26218,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32672,7 +26233,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32685,11 +26246,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32704,8 +26263,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -32717,14 +26276,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x7c (124)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32737,8 +26292,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -32750,15 +26305,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #124]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32770,7 +26319,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32783,18 +26332,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32806,7 +26347,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32819,11 +26360,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32838,8 +26377,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32851,13 +26390,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32869,7 +26405,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32882,18 +26418,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32905,7 +26433,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32918,11 +26446,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32935,10 +26461,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -32950,13 +26476,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #96]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -32968,7 +26491,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -32981,18 +26504,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33004,7 +26519,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33017,11 +26532,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33034,10 +26547,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33049,14 +26562,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33069,8 +26578,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33082,15 +26591,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33102,7 +26605,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33115,18 +26618,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33138,7 +26633,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33151,11 +26646,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33168,10 +26661,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33183,14 +26676,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33203,8 +26692,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33216,15 +26705,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33236,7 +26719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33249,18 +26732,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33272,7 +26747,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33285,11 +26760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33302,10 +26775,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33317,13 +26790,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33335,7 +26805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33348,18 +26818,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33371,7 +26833,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33384,11 +26846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33401,10 +26861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33416,14 +26876,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33436,8 +26892,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33449,15 +26905,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #104]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33469,7 +26919,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33482,18 +26932,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33505,7 +26947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33518,11 +26960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33535,10 +26975,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33550,14 +26990,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33570,8 +27005,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33583,15 +27018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #136]", + "fmov s6, s0", + "str s6, [x8]", + "ldr s6, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33603,7 +27032,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33616,18 +27045,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr s7, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33639,7 +27060,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33652,11 +27073,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33669,10 +27088,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33684,14 +27103,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33704,8 +27119,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33717,32 +27132,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33755,10 +27146,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33770,14 +27161,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w4, #0x40 (64)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33790,8 +27177,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33803,15 +27190,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s6, s0", + "str s6, [x20]", + "ldr s6, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33823,7 +27204,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -33836,23 +27217,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33865,10 +27232,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -33880,14 +27247,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "add w20, w4, #0x44 (68)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33900,8 +27263,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33913,32 +27276,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #68]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33953,8 +27293,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -33966,14 +27306,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x48 (72)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -33986,8 +27322,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -33999,29 +27335,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #72]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34033,7 +27349,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34046,11 +27362,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34063,10 +27377,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34078,14 +27392,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x4c (76)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34098,8 +27408,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34111,15 +27421,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #76]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34131,7 +27435,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34144,18 +27448,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34167,7 +27463,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34180,11 +27476,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34199,8 +27493,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34212,14 +27506,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x50 (80)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34232,8 +27522,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34245,15 +27535,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #80]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34265,7 +27549,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34278,18 +27562,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34301,7 +27577,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34314,11 +27590,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34333,8 +27607,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -34346,14 +27620,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x54 (84)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34366,8 +27636,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34379,15 +27649,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #84]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34399,7 +27663,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34412,18 +27676,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34435,7 +27691,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34448,11 +27704,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34467,8 +27721,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -34480,14 +27734,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x58 (88)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34500,8 +27750,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34513,15 +27763,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #88]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34533,7 +27777,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34546,18 +27790,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34569,7 +27805,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34582,11 +27818,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34601,8 +27835,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34614,14 +27848,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "add w20, w4, #0x5c (92)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34634,8 +27864,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34647,15 +27877,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #92]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "fmov s3, s0", + "str s3, [x20]", + "ldr s3, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34667,7 +27891,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34680,18 +27904,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34703,7 +27919,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34716,11 +27932,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34735,8 +27949,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34748,13 +27962,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34766,7 +27977,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34779,18 +27990,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34802,7 +28005,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -34815,11 +28018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34832,10 +28033,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -34847,30 +28048,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34885,8 +28065,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -34898,18 +28078,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34922,8 +28093,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -34937,14 +28108,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34957,8 +28124,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -34970,20 +28137,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -34998,8 +28153,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35011,23 +28166,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35055,13 +28196,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #112]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35073,7 +28211,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35086,18 +28224,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35109,7 +28239,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35122,11 +28252,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35139,10 +28267,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35154,13 +28282,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35172,7 +28297,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35185,18 +28310,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35208,7 +28325,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35221,11 +28338,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35238,10 +28353,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35253,30 +28368,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35289,10 +28383,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35304,18 +28398,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35328,8 +28413,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -35343,14 +28428,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35363,8 +28443,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -35376,20 +28456,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s6, s0", + "str s6, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35402,10 +28470,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35417,18 +28485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35441,8 +28500,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1624]", @@ -35459,11 +28518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35490,27 +28545,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35539,15 +28574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s4, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35559,7 +28586,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35572,11 +28599,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35589,10 +28614,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35607,10 +28632,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "ldr s4, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35622,7 +28644,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35635,18 +28657,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35658,7 +28672,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35671,11 +28685,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35688,10 +28700,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35703,14 +28715,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35723,8 +28731,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -35736,15 +28744,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35756,7 +28758,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35769,18 +28771,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35792,7 +28786,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35805,11 +28799,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35822,10 +28814,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -35837,14 +28829,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35857,8 +28845,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -35870,15 +28858,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35890,7 +28872,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35903,18 +28885,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35926,7 +28900,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -35939,11 +28913,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35956,10 +28928,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -35971,14 +28943,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -35991,8 +28959,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36004,15 +28972,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36024,7 +28986,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36037,23 +28999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36066,8 +29014,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", @@ -36081,14 +29029,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36101,8 +29045,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36114,27 +29058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36146,7 +29072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36159,11 +29085,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36178,8 +29102,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36191,14 +29115,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w4, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36211,8 +29131,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -36224,15 +29144,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36244,7 +29158,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36257,11 +29171,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36274,10 +29186,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36292,11 +29204,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36323,13 +29231,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36358,20 +29260,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36384,10 +29272,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36402,11 +29290,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36433,41 +29317,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36496,15 +29346,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36516,7 +29358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36529,11 +29371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36546,10 +29386,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -36564,11 +29404,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36595,13 +29431,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36630,15 +29460,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36650,7 +29472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36663,11 +29485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36680,10 +29500,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -36698,11 +29518,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x34 (52)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36729,13 +29545,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36764,15 +29574,93 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add w20, w4, #0x38 (56)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x20]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36800,8 +29688,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36813,12 +29700,39 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -36832,11 +29746,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x3c (60)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36863,14 +29773,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "str s2, [x20]", + "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36898,15 +29802,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36918,7 +29814,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -36931,11 +29827,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36948,11 +29842,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -36966,11 +29860,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s3, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -36982,11 +29872,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -36996,15 +29885,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37016,7 +29900,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37029,18 +29913,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37052,10 +29927,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37065,11 +29943,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37081,13 +29958,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37097,13 +29971,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37115,7 +29986,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37128,18 +29999,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37151,10 +30013,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37164,11 +30029,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37181,12 +30045,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37196,13 +30058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #84]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37214,7 +30072,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37227,18 +30085,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #92]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37250,7 +30100,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37263,11 +30113,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37280,10 +30128,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37295,14 +30143,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37315,8 +30159,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37328,15 +30172,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #100]", + "fmov s4, s0", + "str s4, [x20]", + "ldr s4, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37348,7 +30186,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37361,18 +30199,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #108]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37384,7 +30214,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37397,11 +30227,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37414,11 +30242,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -37429,14 +30257,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr s5, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37448,11 +30272,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37462,15 +30285,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37482,7 +30300,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37495,18 +30313,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37518,10 +30327,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37531,11 +30343,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37548,12 +30359,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37563,13 +30372,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "fmov s5, s0", + "str s5, [x20]", + "ldr s5, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37581,7 +30386,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37594,18 +30399,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37617,7 +30414,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37630,11 +30427,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37647,11 +30442,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -37662,14 +30457,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37682,8 +30472,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37695,15 +30485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", + "fmov s5, s0", + "str s5, [x8]", + "ldr s5, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37715,7 +30499,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37728,18 +30512,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #124]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr s6, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37751,7 +30527,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37764,11 +30540,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37781,10 +30555,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -37796,14 +30570,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37816,8 +30586,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37829,15 +30599,8 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #132]", + "fmov s5, s0", + "str s5, [x20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37849,10 +30612,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -37862,18 +30628,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #140]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37885,7 +30642,35 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s5, s0", + "str s5, [x4]", + "ldr s5, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -37898,11 +30683,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37915,11 +30698,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -37930,14 +30713,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "add w20, w4, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -37950,8 +30729,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -37963,32 +30742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "fmov s5, s0", + "str s5, [x20]", + "strb wzr, [x28, #1017]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38001,11 +30757,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -38019,11 +30775,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38050,13 +30802,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38085,20 +30831,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38115,7 +30847,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -38129,11 +30861,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38160,211 +30888,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38393,15 +30917,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldr s3, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38413,7 +30929,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38426,11 +30942,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38443,10 +30957,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38461,11 +30975,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38492,13 +31002,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38527,15 +31031,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", + "ldr s3, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38547,7 +31043,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38560,11 +31056,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38577,10 +31071,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38595,11 +31089,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38626,13 +31116,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38661,15 +31145,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldr s3, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38681,7 +31157,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38694,11 +31170,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38711,10 +31185,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -38729,11 +31203,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38760,13 +31230,7 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "str s2, [x20]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38795,15 +31259,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8]", + "ldr s3, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38815,7 +31271,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -38828,11 +31284,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38845,10 +31299,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -38863,11 +31317,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w4, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -38894,16 +31344,18 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, #28]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "mvn w27, w8", "adds w26, w8, #0x90 (144)", - "strb w21, [x28, #1298]", - "mov x8, x26" + "mov x8, x26", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "Block3": { @@ -39734,7 +32186,7 @@ ] }, "Block4": { - "ExpectedInstructionCount": 12319, + "ExpectedInstructionCount": 12313, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -40090,7 +32542,6 @@ ], "ExpectedArm64ASM": [ "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40119,6 +32570,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -40155,7 +32607,6 @@ "str q2, [x0, #1040]", "add w9, w9, #0x10 (16)", "str w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40218,7 +32669,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x6c (108)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40247,15 +32698,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", + "str s2, [x21]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40286,14 +32737,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x9, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40355,7 +32807,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40418,7 +32869,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x68 (104)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40447,13 +32898,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40484,12 +32936,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40552,7 +33005,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40615,7 +33067,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40644,13 +33096,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40681,12 +33134,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40749,7 +33203,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40812,7 +33265,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x28 (40)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40841,15 +33294,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #40]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", + "mov x23, #0xfffffffffffffff8", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40879,18 +33333,19 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr w9, [x9, w21, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", "str w9, [x8, #56]", "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40921,22 +33376,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w25, #0x0", - "mov w12, #0x8000", - "fmov d3, x25", - "mov v3.d[1], x12", + "mov w24, #0x0", + "mov w25, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x3c (60)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -40965,14 +33421,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41002,13 +33459,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41070,8 +33528,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41101,21 +33558,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41177,8 +33634,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41208,13 +33664,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41276,7 +33733,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41305,14 +33762,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41342,13 +33800,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41410,7 +33869,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41439,13 +33898,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41476,12 +33936,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41544,7 +34005,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41573,13 +34034,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41610,20 +34072,20 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41686,7 +34148,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41715,13 +34177,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41752,12 +34215,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41820,7 +34284,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41849,13 +34313,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41886,12 +34351,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41954,7 +34420,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -41983,14 +34449,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42020,13 +34487,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42088,8 +34556,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42119,13 +34586,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w23, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42187,7 +34655,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w12, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42216,14 +34684,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x12]", + "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w21, w21, w13", + "bic w12, w12, w13", + "strb w12, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42253,13 +34722,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldrb w12, [x28, #1298]", + "lsl w13, w22, w20", + "orr w12, w12, w13", + "strb w12, [x28, #1298]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42321,7 +34791,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42350,14 +34820,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w12, w22, w20", + "bic w23, w23, w12", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w23, sxtw]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42387,13 +34858,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w23, sxtw]", + "ldrb w23, [x28, #1298]", + "lsl w12, w22, w20", + "orr w23, w23, w12", + "strb w23, [x28, #1298]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42455,7 +34927,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42484,13 +34956,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42521,12 +34994,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42589,7 +35063,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42618,13 +35092,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42655,12 +35130,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42723,7 +35199,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42752,13 +35228,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42789,12 +35266,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42857,7 +35335,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -42886,13 +35364,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42923,12 +35402,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42991,7 +35471,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43020,28 +35500,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43077,7 +35557,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43106,25 +35586,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43187,7 +35669,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43216,13 +35698,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43253,12 +35736,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43321,7 +35805,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43351,12 +35834,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43387,12 +35871,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43455,7 +35940,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43484,28 +35969,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43541,7 +36024,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43570,27 +36053,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43621,15 +36108,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43665,7 +36153,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43694,27 +36182,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43745,12 +36227,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43813,7 +36296,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43843,12 +36325,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43879,12 +36362,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43947,7 +36431,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -43976,13 +36460,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44013,12 +36498,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44081,7 +36567,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44112,12 +36597,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44180,7 +36666,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44211,15 +36696,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44255,7 +36741,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44286,15 +36771,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44330,12 +36816,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44349,10 +36834,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -44367,14 +36852,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -44403,13 +36890,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w24, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44440,15 +36928,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44484,7 +36973,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44515,15 +37003,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44559,12 +37048,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44596,14 +37084,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -44632,41 +37122,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w23, sxtw]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44697,12 +37174,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44765,7 +37243,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44796,12 +37273,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44864,22 +37342,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44915,7 +37393,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44946,15 +37423,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44990,12 +37468,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45009,10 +37486,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -45027,14 +37504,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45064,27 +37542,29 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x2 (2)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45120,7 +37600,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45151,15 +37630,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45195,12 +37675,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45232,14 +37711,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45268,41 +37749,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x0 (0)", - "and w13, w13, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "lsl w13, w22, w13", - "orr w21, w21, w13", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45333,12 +37801,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45401,7 +37870,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45432,12 +37900,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45500,7 +37969,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45531,15 +37999,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45576,7 +38045,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45607,15 +38075,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x3 (3)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45651,12 +38120,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45688,14 +38156,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w22, w20", - "bic w21, w21, w14", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45724,13 +38194,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45761,15 +38232,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45805,7 +38277,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45836,15 +38307,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45880,12 +38352,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45899,10 +38370,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -45917,14 +38388,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w22, w20", - "bic w21, w21, w13", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -45953,41 +38426,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46018,12 +38478,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46086,7 +38547,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46117,12 +38577,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46185,7 +38646,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46216,15 +38676,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46260,7 +38721,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46291,15 +38751,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46335,12 +38796,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46372,14 +38832,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -46409,12 +38870,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46445,15 +38907,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46489,7 +38952,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46520,15 +38982,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46564,12 +39027,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46583,10 +39045,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -46601,14 +39063,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -46637,41 +39101,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46702,13 +39153,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46772,7 +39224,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46803,21 +39254,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46881,7 +39332,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46912,13 +39362,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46981,7 +39432,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47010,13 +39461,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47047,13 +39499,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47117,7 +39570,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47146,13 +39599,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47183,13 +39637,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47252,7 +39707,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47281,13 +39736,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47318,21 +39774,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x25", - "mov v3.d[1], x12", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47396,7 +39852,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47425,13 +39881,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47462,13 +39919,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47531,7 +39989,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47560,13 +40018,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47597,13 +40056,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47667,7 +40127,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47696,13 +40156,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47733,12 +40194,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47801,7 +40263,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47832,12 +40293,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47900,7 +40362,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -47929,13 +40391,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47966,12 +40429,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48034,7 +40498,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48063,13 +40527,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48100,12 +40565,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48168,7 +40634,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48197,13 +40663,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48234,12 +40701,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48302,7 +40770,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48331,13 +40799,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48368,12 +40837,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48436,7 +40906,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48465,13 +40935,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48502,12 +40973,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48570,7 +41042,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48599,13 +41071,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48636,13 +41109,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48705,7 +41179,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48734,28 +41208,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -48791,7 +41265,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48820,26 +41294,164 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w9, #0xc (12)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48885,7 +41497,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -48901,7 +41513,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -48930,14 +41541,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -48967,13 +41579,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49019,7 +41632,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49035,7 +41648,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49064,14 +41677,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "ldr w9, [x8, #112]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49083,10 +41712,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -49099,15 +41731,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", + "add w21, w9, #0x8 (8)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49119,10 +41747,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -49132,11 +41761,33 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49148,13 +41799,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -49167,60 +41815,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9, #4]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49240,7 +41846,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49256,7 +41862,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49285,28 +41891,22 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49336,16 +41936,41 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -49364,7 +41989,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -49380,7 +42005,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49409,198 +42033,52 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #80]", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49662,7 +42140,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -49691,14 +42169,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #48]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49729,12 +42208,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49797,7 +42277,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49828,12 +42307,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49896,7 +42376,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49927,15 +42406,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49971,7 +42451,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50002,15 +42481,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50046,12 +42526,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50065,10 +42544,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50083,14 +42562,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50119,13 +42600,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50156,15 +42638,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50200,7 +42683,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50231,15 +42713,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50275,12 +42758,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50312,14 +42794,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50348,41 +42832,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50413,12 +42884,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50481,7 +42953,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50512,12 +42983,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50580,7 +43052,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50611,15 +43082,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50655,22 +43127,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50706,12 +43178,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50725,10 +43196,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -50743,14 +43214,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50780,13 +43252,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50817,16 +43290,17 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "str w9, [x8, #48]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50863,23 +43337,23 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w5, w5, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "add w6, w6, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50917,12 +43391,11 @@ "str q2, [x0, #1040]", "add w10, w10, #0x10 (16)", "add w11, w11, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50954,15 +43427,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "sub w7, w7, #0x10 (16)", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -50991,45 +43466,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51060,14 +43522,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "subs w9, w9, #0x10 (16)", "cfinv", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51131,7 +43594,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51162,13 +43624,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51231,12 +43694,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "cset w20, hs", + "cset w21, hs", "subs w26, w9, #0x1 (1)", - "rmif x20, #63, #nzCv", + "rmif x21, #63, #nzCv", "mov x27, x9", "mov x9, x26", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51267,91 +43729,17 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "str w9, [x8, #124]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb w21, [x28, #1298]", + "str w9, [x8, #124]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51387,10 +43775,46 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldr s2, [x8, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51410,6 +43834,44 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -51424,14 +43886,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -51460,13 +43924,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51497,15 +43962,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51541,7 +44007,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51572,15 +44037,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51616,12 +44082,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51635,10 +44100,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -51653,14 +44118,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -51689,41 +44156,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51754,12 +44208,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51822,7 +44277,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51853,12 +44307,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51921,7 +44376,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51952,15 +44406,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51996,7 +44451,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52027,15 +44481,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52071,12 +44526,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52108,14 +44562,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52144,13 +44600,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52181,15 +44638,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52225,7 +44683,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52256,15 +44713,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52300,12 +44758,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52319,10 +44776,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -52337,14 +44794,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52373,45 +44832,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block5": { - "ExpectedInstructionCount": 12238, + "ExpectedInstructionCount": 12248, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -52762,7 +45208,6 @@ ], "ExpectedArm64ASM": [ "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52791,6 +45236,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -52827,7 +45273,6 @@ "str q2, [x0, #1040]", "add w9, w9, #0x10 (16)", "str w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52890,7 +45335,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x6c (108)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -52919,15 +45364,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", + "str s2, [x21]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52958,14 +45403,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffffc", - "ldr s2, [x9, w23, sxtw]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "mov x21, #0xfffffffffffffffc", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53027,7 +45473,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53090,7 +45535,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x68 (104)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53119,13 +45564,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53156,12 +45602,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53224,7 +45671,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53287,7 +45733,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x30 (48)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53316,13 +45762,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53353,12 +45800,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53421,7 +45869,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53484,7 +45931,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53513,15 +45960,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w21, w21, w24", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff8", - "ldr s2, [x9, w24, sxtw]", + "mov x23, #0xfffffffffffffff8", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53551,18 +45999,19 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr w9, [x9, w21, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", "str w9, [x8, #56]", "ldr w9, [x8, #100]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53593,22 +46042,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w25, #0x0", - "mov w12, #0x8000", - "fmov d3, x25", - "mov v3.d[1], x12", + "mov w24, #0x0", + "mov w25, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x25", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x3c (60)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53637,14 +46087,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53674,13 +46125,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53742,8 +46194,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53773,13 +46224,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53841,8 +46293,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w24, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53872,13 +46323,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w24, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53940,7 +46392,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -53969,14 +46421,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w23, sxtw]", + "ldr s2, [x11, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54006,13 +46459,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w23, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x6, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54074,7 +46528,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54103,13 +46557,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54140,12 +46595,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54208,7 +46664,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54237,13 +46693,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54274,12 +46731,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54342,7 +46800,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54371,13 +46829,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54408,12 +46867,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54476,7 +46936,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54505,13 +46965,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54542,12 +47003,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54610,7 +47072,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -54639,112 +47101,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54775,12 +47139,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54843,43 +47208,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w25, w22, w20", - "bic w21, w21, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w24, sxtw]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54909,13 +47238,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54961,7 +47291,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -54977,7 +47307,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55006,13 +47336,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w22, w20", - "bic w21, w21, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55043,12 +47374,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w22, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55111,7 +47443,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w23, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55140,14 +47472,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x23]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "bic w23, w23, w24", + "strb w23, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5]", + "ldr s2, [x10, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55177,13 +47510,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x10]", + "ldrb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w23, w23, w24", + "strb w23, [x28, #1298]", + "ldr s2, [x5, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55229,7 +47563,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -55245,7 +47579,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55274,14 +47608,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x5, #4]", + "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55311,12 +47646,149 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "ldr s2, [x10]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w8, #0x48 (72)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x5, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55379,7 +47851,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55408,13 +47880,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55445,12 +47918,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55513,7 +47987,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55542,13 +48016,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55579,12 +48054,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55647,7 +48123,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55676,28 +48152,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55733,7 +48209,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55762,13 +48238,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w24, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55799,15 +48276,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55843,7 +48321,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -55872,13 +48350,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w23, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55909,12 +48388,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55977,7 +48457,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56007,12 +48486,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56043,12 +48523,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56111,7 +48592,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w11, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56140,28 +48621,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, #4]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56197,7 +48676,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56226,27 +48705,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w24, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56309,7 +48792,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56338,13 +48821,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w23, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56375,12 +48859,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56443,7 +48928,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56473,12 +48957,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56509,12 +48994,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56577,7 +49063,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w10, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -56606,13 +49092,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, #4]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56643,12 +49130,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56711,7 +49199,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56742,12 +49229,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56810,7 +49298,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56841,15 +49328,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56885,7 +49373,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56916,15 +49403,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56960,12 +49448,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56979,10 +49466,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -56997,14 +49484,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57033,13 +49522,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w24, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57070,15 +49560,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57114,7 +49605,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57145,15 +49635,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57189,12 +49680,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57226,14 +49716,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57262,41 +49754,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w23, sxtw]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57327,12 +49806,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57395,7 +49875,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57426,12 +49905,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57494,22 +49974,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57545,7 +50025,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57576,15 +50055,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57620,12 +50100,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57639,10 +50118,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -57657,14 +50136,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57694,27 +50174,29 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57750,7 +50232,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57781,15 +50262,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57825,12 +50307,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57862,14 +50343,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w6, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -57898,41 +50381,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w22, w25", - "orr w21, w21, w25", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57963,12 +50433,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58031,7 +50502,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58062,12 +50532,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58130,7 +50601,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58161,15 +50631,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58205,7 +50676,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58236,15 +50706,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58280,12 +50751,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58317,15 +50787,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w22, w20", - "bic w21, w21, w12", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -58354,13 +50826,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58391,15 +50864,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58435,7 +50909,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58466,15 +50939,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58510,12 +50984,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58529,10 +51002,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -58547,14 +51020,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w22, w20", - "bic w21, w21, w25", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -58583,41 +51058,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w23, sxtw]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58648,12 +51110,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58716,7 +51179,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58747,12 +51209,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58815,7 +51278,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58846,15 +51308,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58890,7 +51353,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58921,15 +51383,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58965,12 +51428,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59002,14 +51464,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59039,12 +51502,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59075,15 +51539,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59119,7 +51584,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59150,15 +51614,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59194,12 +51659,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59213,10 +51677,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -59231,14 +51695,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w5, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59267,41 +51733,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59332,13 +51785,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59402,7 +51856,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59433,13 +51886,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59503,7 +51957,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59534,13 +51987,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59604,7 +52058,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59633,13 +52087,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59670,13 +52125,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59740,7 +52196,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59769,13 +52225,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59806,13 +52263,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59876,7 +52334,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x44 (68)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -59905,13 +52363,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #68]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59942,13 +52401,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60012,7 +52472,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x4c (76)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60041,13 +52501,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60078,13 +52539,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60148,7 +52610,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x58 (88)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60177,13 +52639,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #88]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60214,13 +52677,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60284,7 +52748,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x5c (92)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60313,13 +52777,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #92]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60350,12 +52815,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60418,7 +52884,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60449,12 +52914,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60517,7 +52983,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60546,13 +53012,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60583,12 +53050,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60651,7 +53119,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60680,13 +53148,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60717,12 +53186,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60785,7 +53255,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60814,13 +53284,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60851,12 +53322,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60919,7 +53391,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x48 (72)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -60948,13 +53420,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #72]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60985,12 +53458,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61053,7 +53527,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x50 (80)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61082,13 +53556,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61119,12 +53594,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61187,7 +53663,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x60 (96)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61216,13 +53692,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #96]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61253,13 +53730,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61322,7 +53800,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w8, #0x54 (84)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61351,138 +53829,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9, #8]", - "lsl w23, w22, w20", - "bic w21, w21, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61518,7 +53886,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61547,14 +53915,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -61584,12 +53953,125 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w9, #0xc (12)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61652,7 +54134,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61682,12 +54163,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61718,12 +54200,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61786,7 +54269,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61815,29 +54298,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61873,7 +54354,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -61902,27 +54383,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w23, [x28, #1298]", + "lsl w21, w22, w21", + "orr w21, w23, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61985,7 +54470,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62014,13 +54499,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62051,12 +54537,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62119,7 +54606,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62149,12 +54635,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62185,12 +54672,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62253,7 +54741,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x4 (4)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62282,14 +54770,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #4]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #40]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62320,12 +54809,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62388,7 +54878,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62419,12 +54908,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62487,7 +54977,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62518,15 +55007,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62562,7 +55052,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62593,15 +55082,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62637,12 +55127,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62656,10 +55145,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -62674,14 +55163,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x8 (8)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62710,13 +55201,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #8]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62747,15 +55239,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62791,7 +55284,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62822,15 +55314,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62866,12 +55359,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62903,14 +55395,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0xc (12)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -62939,41 +55433,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #12]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63004,12 +55485,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63072,7 +55554,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63103,12 +55584,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63171,7 +55653,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63202,15 +55683,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63246,22 +55728,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63297,12 +55779,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63316,10 +55797,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -63334,14 +55815,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -63371,12 +55853,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63407,15 +55890,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63451,22 +55935,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63505,12 +55989,11 @@ "sub w9, w9, #0x10 (16)", "str w9, [x8, #40]", "add w5, w5, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63542,16 +56025,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "add w6, w6, #0x10 (16)", "add w10, w10, #0x10 (16)", - "ldrb w20, [x28, #1019]", + "add w21, w9, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -63580,45 +56065,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63649,13 +56121,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "sub w9, w9, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63719,7 +56192,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #36]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63750,13 +56222,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63820,7 +56293,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w11, w11, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63851,22 +56323,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "subs w7, w7, #0x10 (16)", "cfinv", - "cset w20, hs", + "cset w21, hs", "subs w26, w9, #0x1 (1)", - "rmif x20, #63, #nzCv", + "rmif x21, #63, #nzCv", "mov x27, x9", "mov x9, x26", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63903,7 +56376,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #124]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63934,15 +56406,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63978,12 +56451,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64015,14 +56487,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64051,13 +56525,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #24]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64088,15 +56563,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64132,7 +56608,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64163,15 +56638,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64207,12 +56683,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64226,10 +56701,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64244,14 +56719,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64280,41 +56757,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #28]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64345,12 +56809,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64413,7 +56878,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64444,12 +56908,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64512,7 +56977,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64543,15 +57007,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64587,7 +57052,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64618,15 +57082,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64662,12 +57127,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64699,14 +57163,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64735,13 +57201,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #16]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64772,15 +57239,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64816,7 +57284,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64847,15 +57314,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", + "strb w21, [x28, #1298]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64891,12 +57359,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64910,10 +57377,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -64928,14 +57395,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w22, w20", - "bic w21, w21, w24", + "add x0, x28, x21, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w21, w7, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -64964,45 +57433,32 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x7, #20]", + "str s2, [x21]", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w22, w23", - "orr w21, w21, w23", + "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "Block6": { - "ExpectedInstructionCount": 10994, + "ExpectedInstructionCount": 7575, "x86Insts": [ "mov eax,dword [ebp + 0x10]", "fld dword [eax + 0x30]", @@ -65416,7 +57872,6 @@ ], "ExpectedArm64ASM": [ "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65445,18 +57900,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65468,7 +57913,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65481,23 +57926,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65510,10 +57941,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65528,16 +57959,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65549,7 +57972,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65562,19 +57985,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65586,7 +58001,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65599,23 +58014,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65630,8 +58031,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65643,23 +58044,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65672,10 +58059,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65690,16 +58077,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65711,7 +58090,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65724,19 +58103,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65748,7 +58119,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65761,23 +58132,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65792,8 +58149,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65805,23 +58162,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65834,10 +58177,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -65852,16 +58195,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65873,7 +58208,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65886,19 +58221,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65910,7 +58237,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -65923,23 +58250,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65954,8 +58267,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -65967,23 +58280,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -65996,10 +58295,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66014,16 +58313,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xffffffffffffffd0", + "sub w21, w9, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66050,15 +58341,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd0", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66087,16 +58371,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66108,7 +58384,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66121,23 +58397,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66150,10 +58412,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66168,16 +58430,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66189,7 +58443,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66202,19 +58456,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66226,7 +58472,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66239,23 +58485,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66270,8 +58502,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66283,23 +58515,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66312,10 +58530,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66330,16 +58548,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66351,7 +58561,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66364,19 +58574,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66388,7 +58590,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66401,23 +58603,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66432,8 +58620,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66445,23 +58633,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66474,10 +58648,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66492,16 +58666,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66513,7 +58679,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66526,19 +58692,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66550,7 +58708,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66563,23 +58721,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66594,8 +58738,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66607,23 +58751,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66636,10 +58766,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66654,16 +58784,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xffffffffffffffd4", + "sub w22, w9, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66690,15 +58812,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd4", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66727,16 +58842,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66748,7 +58855,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66761,23 +58868,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66790,10 +58883,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66808,16 +58901,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66829,7 +58914,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66842,19 +58927,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66866,7 +58943,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -66879,23 +58956,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66910,8 +58973,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -66923,23 +58986,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66952,10 +59001,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -66970,16 +59019,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -66991,7 +59032,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67004,19 +59045,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67028,7 +59061,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67041,23 +59074,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67072,8 +59091,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67085,23 +59104,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67114,10 +59119,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67132,16 +59137,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67153,7 +59150,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67166,19 +59163,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67190,7 +59179,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67203,23 +59192,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67234,8 +59209,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67247,23 +59222,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67276,10 +59237,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67294,16 +59255,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x22, #0xffffffffffffffd8", + "sub w23, w9, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67330,15 +59283,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffd8", - "str s2, [x9, w25, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x23]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67367,16 +59313,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67388,7 +59326,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67401,23 +59339,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67430,10 +59354,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67448,16 +59372,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67469,7 +59385,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67482,19 +59398,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67506,7 +59414,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67519,23 +59427,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67550,8 +59444,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67563,23 +59457,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67592,10 +59472,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67610,16 +59490,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67631,7 +59503,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67644,19 +59516,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67668,7 +59532,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67681,23 +59545,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67712,8 +59562,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67725,23 +59575,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67754,10 +59590,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67772,16 +59608,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67793,7 +59621,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67806,19 +59634,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67830,7 +59650,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -67843,23 +59663,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67874,8 +59680,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -67887,23 +59693,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67916,10 +59708,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -67934,16 +59726,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x23, #0xffffffffffffffdc", + "sub w24, w9, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67970,15 +59754,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffdc", - "str s2, [x9, w12, sxtw]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x24]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68007,16 +59784,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68028,7 +59797,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68041,23 +59810,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68070,10 +59825,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68088,16 +59843,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68109,7 +59856,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68122,19 +59869,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68146,7 +59885,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68159,23 +59898,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68190,8 +59915,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68203,23 +59928,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68232,10 +59943,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68250,16 +59961,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68271,7 +59974,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68284,19 +59987,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68308,7 +60003,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68321,23 +60016,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68352,8 +60033,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68365,23 +60046,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68394,10 +60061,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68412,16 +60079,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68433,7 +60092,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68446,19 +60105,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68470,7 +60121,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68483,23 +60134,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68514,8 +60151,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68527,23 +60164,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68556,10 +60179,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68574,16 +60197,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x24, #0xffffffffffffffe0", + "sub w25, w9, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68610,15 +60225,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe0", - "str s2, [x9, w13, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68647,16 +60255,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68668,7 +60268,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68681,23 +60281,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68710,10 +60296,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68728,16 +60314,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68749,7 +60327,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68762,19 +60340,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68786,7 +60356,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68799,23 +60369,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68830,8 +60386,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -68843,23 +60399,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68872,10 +60414,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -68890,16 +60432,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68911,7 +60445,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68924,19 +60458,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68948,7 +60474,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -68961,23 +60487,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68992,8 +60504,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69005,23 +60517,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69034,10 +60532,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69052,16 +60550,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69073,7 +60563,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69086,19 +60576,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69110,7 +60592,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69123,23 +60605,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69154,8 +60622,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69167,23 +60635,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69196,10 +60650,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69214,16 +60668,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x25, #0xffffffffffffffe4", + "sub w12, w9, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69250,15 +60696,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe4", - "str s2, [x9, w14, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69287,16 +60726,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69308,7 +60739,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69321,23 +60752,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69350,10 +60767,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69368,16 +60785,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69389,7 +60798,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69402,19 +60811,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69426,7 +60827,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69439,23 +60840,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69470,8 +60857,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69483,23 +60870,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69512,10 +60885,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69530,16 +60903,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69551,7 +60916,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69564,19 +60929,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69588,7 +60945,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69601,23 +60958,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69632,8 +60975,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69645,23 +60988,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69674,10 +61003,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69692,16 +61021,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69713,7 +61034,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69726,19 +61047,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69750,7 +61063,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69763,23 +61076,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69794,8 +61093,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -69807,23 +61106,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69836,10 +61121,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -69854,16 +61139,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x12, #0xffffffffffffffe8", + "sub w13, w9, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69890,15 +61167,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffe8", - "str s2, [x9, w15, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69927,16 +61197,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69948,7 +61210,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -69961,23 +61223,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69990,10 +61238,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70008,16 +61256,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70029,7 +61269,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70042,19 +61282,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70066,7 +61298,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70079,23 +61311,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70110,8 +61328,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70123,23 +61341,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70152,10 +61356,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70170,16 +61374,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70191,7 +61387,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70204,19 +61400,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70228,7 +61416,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70241,23 +61429,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70272,8 +61446,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70285,23 +61459,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70314,10 +61474,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70332,16 +61492,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70353,7 +61505,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70366,19 +61518,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70390,7 +61534,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70403,23 +61547,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70434,8 +61564,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70447,23 +61577,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70476,10 +61592,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70494,16 +61610,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x13, #0xffffffffffffffec", + "sub w14, w9, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70530,15 +61638,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xffffffffffffffec", - "str s2, [x9, w16, sxtw]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x14]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70567,16 +61668,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70588,7 +61681,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70601,23 +61694,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70630,10 +61709,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70648,16 +61727,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70669,7 +61740,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70682,19 +61753,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70706,7 +61769,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70719,23 +61782,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70750,8 +61799,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70763,23 +61812,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70792,10 +61827,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70810,16 +61845,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70831,7 +61858,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70844,19 +61871,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70868,7 +61887,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -70881,23 +61900,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70912,8 +61917,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -70925,23 +61930,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70954,10 +61945,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -70972,16 +61963,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70993,7 +61976,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71006,19 +61989,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71030,7 +62005,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71043,23 +62018,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71074,8 +62035,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71087,23 +62048,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71116,10 +62063,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71134,16 +62081,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x14, #0xfffffffffffffff0", + "sub w15, w9, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71170,15 +62109,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x17, #0xfffffffffffffff0", - "str s2, [x9, w17, sxtw]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x15]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71207,16 +62139,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71228,7 +62152,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71241,23 +62165,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71270,10 +62180,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71288,16 +62198,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71309,7 +62211,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71322,19 +62224,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71346,7 +62240,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71359,23 +62253,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71390,8 +62270,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71403,23 +62283,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71432,10 +62298,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71450,16 +62316,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71471,7 +62329,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71484,19 +62342,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71508,7 +62358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71521,23 +62371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71552,8 +62388,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71565,23 +62401,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71594,10 +62416,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71612,16 +62434,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71633,7 +62447,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71646,19 +62460,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71670,7 +62476,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71683,23 +62489,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71714,8 +62506,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71727,23 +62519,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71756,10 +62534,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -71774,16 +62552,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x15, #0xfffffffffffffff4", + "sub w16, w9, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71810,15 +62580,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x29, #0xfffffffffffffff4", - "str s2, [x9, w29, sxtw]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x16]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71847,16 +62610,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71868,7 +62623,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71881,23 +62636,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71910,10 +62651,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -71928,16 +62669,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71949,7 +62682,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71962,19 +62695,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71986,7 +62711,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -71999,23 +62724,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72030,8 +62741,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72043,23 +62754,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72072,10 +62769,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72090,16 +62787,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72111,7 +62800,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72124,19 +62813,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72148,7 +62829,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72161,23 +62842,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72192,8 +62859,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72205,23 +62872,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72234,10 +62887,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72252,16 +62905,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72273,7 +62918,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72286,19 +62931,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72310,7 +62947,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72323,23 +62960,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72354,8 +62977,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72367,23 +62990,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72396,10 +63005,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72414,16 +63023,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s3, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72435,7 +63036,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72448,19 +63049,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72472,7 +63065,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72485,23 +63078,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72516,8 +63095,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72529,19 +63108,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72553,7 +63124,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72566,19 +63137,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72590,7 +63153,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72603,23 +63166,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72632,10 +63181,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72647,23 +63196,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72678,8 +63213,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72691,19 +63226,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72715,7 +63242,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72728,19 +63255,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s5, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72752,7 +63271,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72765,23 +63284,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72794,10 +63299,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72809,23 +63314,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72840,8 +63331,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -72853,19 +63344,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72877,7 +63360,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72890,19 +63373,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s5, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72914,7 +63389,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -72927,23 +63402,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72956,10 +63417,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -72971,23 +63432,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73002,8 +63449,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73015,19 +63462,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73039,7 +63478,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73052,19 +63491,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73076,7 +63507,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73089,23 +63520,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73118,10 +63535,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73133,19 +63550,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s5, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73157,7 +63566,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73170,19 +63579,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73194,7 +63595,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73207,23 +63608,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73236,10 +63623,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73251,23 +63638,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73280,10 +63653,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73295,19 +63668,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73319,7 +63684,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73332,19 +63697,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s6, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73356,7 +63713,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73369,23 +63726,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73398,10 +63741,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73413,23 +63756,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73442,10 +63771,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73457,19 +63786,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73481,7 +63802,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73494,19 +63815,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s6, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73518,7 +63831,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73531,23 +63844,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73560,10 +63859,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73575,23 +63874,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73604,10 +63889,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73619,19 +63904,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s5, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73643,7 +63920,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73656,19 +63933,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73680,7 +63949,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73693,23 +63962,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73722,10 +63977,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73737,19 +63992,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73761,7 +64008,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73774,19 +64021,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s7, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73798,7 +64037,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73811,23 +64050,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73840,10 +64065,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -73855,23 +64080,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73884,10 +64095,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -73899,19 +64110,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73923,7 +64126,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73936,19 +64139,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -73960,7 +64155,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -73973,23 +64168,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74002,10 +64183,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74017,23 +64198,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74046,10 +64213,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74061,19 +64228,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s6, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74085,7 +64244,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74098,19 +64257,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s7, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74122,7 +64273,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74135,23 +64286,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74164,10 +64301,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74179,23 +64316,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74208,10 +64331,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74223,19 +64346,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74247,7 +64362,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74260,19 +64375,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74284,7 +64391,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74297,23 +64404,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74326,10 +64419,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74341,19 +64434,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74365,7 +64450,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74378,19 +64463,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74402,7 +64479,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74415,23 +64492,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74444,10 +64507,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74459,23 +64522,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74488,10 +64537,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74503,19 +64552,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74527,7 +64568,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74540,19 +64581,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s8, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74564,7 +64597,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74577,23 +64610,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74606,10 +64625,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74621,23 +64640,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74650,10 +64655,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74665,19 +64670,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74689,7 +64686,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74702,19 +64699,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74726,7 +64715,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74739,23 +64728,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74768,10 +64743,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74783,23 +64758,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74812,10 +64773,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -74827,19 +64788,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74851,7 +64804,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74864,19 +64817,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s8, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74888,7 +64833,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74901,23 +64846,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74930,10 +64861,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -74945,19 +64876,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s8, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74969,7 +64892,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -74982,19 +64905,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s9, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75006,7 +64921,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75019,23 +64934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75048,10 +64949,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -75063,23 +64964,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75092,10 +64979,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -75107,19 +64994,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75131,7 +65010,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75144,19 +65023,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75168,7 +65039,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75181,23 +65052,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75210,10 +65067,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -75225,23 +65082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75254,10 +65097,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -75269,19 +65112,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75293,7 +65128,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75306,19 +65141,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s9, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75330,7 +65157,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s9", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -75343,23 +65170,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75372,10 +65185,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -75387,23 +65200,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75416,10 +65215,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -75431,55 +65230,41 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x9, w20, sxtw]", + "add w20, w8, #0x40 (64)", + "str s8, [x20]", + "ldr s8, [x9, w21, sxtw]", + "add w20, w8, #0x3c (60)", + "str s8, [x20]", + "ldr s8, [x9, w22, sxtw]", + "add w20, w8, #0x38 (56)", + "str s8, [x20]", + "ldr s8, [x9, w23, sxtw]", + "add w20, w8, #0x34 (52)", + "str s8, [x20]", + "ldr s8, [x9, w24, sxtw]", + "add w20, w8, #0x30 (48)", + "str s8, [x20]", + "ldr s8, [x9, w25, sxtw]", + "add w20, w8, #0x2c (44)", + "str s8, [x20]", + "ldr s8, [x9, w12, sxtw]", + "add w20, w8, #0x28 (40)", + "str s8, [x20]", + "ldr s8, [x9, w13, sxtw]", + "add w20, w8, #0x24 (36)", + "str s8, [x20]", + "ldr s8, [x9, w14, sxtw]", + "add w20, w8, #0x20 (32)", + "str s8, [x20]", + "ldr s8, [x9, w15, sxtw]", + "add w20, w8, #0x1c (28)", + "str s8, [x20]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75506,51 +65291,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75563,8 +65306,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75577,51 +65320,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "strb wzr, [x28, #1017]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75634,8 +65335,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75648,51 +65349,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75705,8 +65363,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75719,51 +65377,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75776,8 +65391,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -75790,14 +65405,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", + "str s2, [x20]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75809,508 +65418,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -76321,98 +65433,23 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "str w7, [x8]", "mov w20, #0x26ea", "movk w20, #0x1, lsl #16", - "mov w22, #0xd118", - "movk w22, #0x818, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd118", + "movk w21, #0x818, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "strb wzr, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block7": { - "ExpectedInstructionCount": 11002, + "ExpectedInstructionCount": 7583, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -76834,814 +65871,16 @@ "pop ebp" ], "ExpectedArm64ASM": [ - "str w9, [x8, #-4]!", - "mov x9, x8", - "str w7, [x8, #-4]!", - "subs w26, w8, #0x84 (132)", - "cfinv", - "mov x27, x8", - "mov x8, x26", - "ldr w7, [x9, #8]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x23, #0xffffffffffffffd0", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "str w9, [x8, #-4]!", + "mov x9, x8", + "str w7, [x8, #-4]!", + "subs w26, w8, #0x84 (132)", + "cfinv", + "mov x27, x8", + "mov x8, x26", + "ldr w7, [x9, #8]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77669,20 +65908,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77694,13 +65921,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -77710,23 +65934,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77739,11 +65949,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -77757,16 +65967,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77778,7 +65980,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77791,19 +65993,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77815,7 +66009,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77828,23 +66022,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77859,8 +66039,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -77872,23 +66052,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77901,10 +66067,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -77919,16 +66085,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77940,7 +66098,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77953,19 +66111,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77977,7 +66127,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -77990,23 +66140,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78021,8 +66157,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78034,23 +66170,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78063,10 +66185,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78081,16 +66203,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78102,11 +66216,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78116,17 +66229,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x24, #0xffffffffffffffd4", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78138,7 +66245,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78151,19 +66258,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78175,10 +66272,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78188,23 +66288,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78217,11 +66303,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -78235,16 +66321,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "mov x20, #0xffffffffffffffd0", + "sub w21, w9, #0x30 (48)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78256,10 +66334,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78269,19 +66348,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s2, s0", + "str s2, [x21]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78309,20 +66379,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78334,13 +66392,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78350,23 +66405,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78379,11 +66420,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -78397,16 +66438,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78418,7 +66451,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78431,19 +66464,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78455,7 +66480,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78468,23 +66493,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78499,8 +66510,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78512,23 +66523,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78541,10 +66538,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78559,16 +66556,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78580,7 +66569,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78593,19 +66582,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78617,7 +66598,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78630,23 +66611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78661,8 +66628,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -78674,23 +66641,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78703,10 +66656,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -78721,16 +66674,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78742,11 +66687,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78756,17 +66700,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x25, #0xffffffffffffffd8", - "str s2, [x9, w25, sxtw]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78778,7 +66716,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -78791,19 +66729,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78815,10 +66743,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78828,23 +66759,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78857,11 +66774,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -78874,17 +66791,9 @@ "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "mov v2.h[4], w1", + "mov x21, #0xffffffffffffffd4", + "sub w22, w9, #0x2c (44)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78896,10 +66805,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78909,19 +66819,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "fmov s2, s0", + "str s2, [x22]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78949,20 +66850,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -78974,13 +66863,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -78990,23 +66876,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79019,11 +66891,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -79037,16 +66909,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79058,7 +66922,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79071,19 +66935,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79095,7 +66951,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79108,23 +66964,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79139,8 +66981,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79152,23 +66994,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79181,10 +67009,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79199,16 +67027,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79220,7 +67040,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79233,19 +67053,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79257,7 +67069,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79270,23 +67082,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79301,8 +67099,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79314,23 +67112,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79343,10 +67127,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79361,16 +67145,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79382,11 +67158,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -79396,17 +67171,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x12, #0xffffffffffffffdc", - "str s2, [x9, w12, sxtw]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79418,7 +67187,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79431,19 +67200,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79455,10 +67214,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -79468,23 +67230,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79497,11 +67245,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -79515,16 +67263,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "mov x22, #0xffffffffffffffd8", + "sub w23, w9, #0x28 (40)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79536,10 +67276,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -79549,19 +67290,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s2, s0", + "str s2, [x23]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79589,20 +67321,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79614,13 +67334,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -79630,23 +67347,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79659,11 +67362,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -79677,16 +67380,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79698,7 +67393,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79711,19 +67406,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79735,7 +67422,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79748,23 +67435,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79779,8 +67452,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79792,23 +67465,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79821,10 +67480,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -79839,16 +67498,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79860,7 +67511,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79873,19 +67524,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79897,7 +67540,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -79910,23 +67553,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79941,8 +67570,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -79954,23 +67583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79983,10 +67598,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80001,16 +67616,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80022,11 +67629,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80036,17 +67642,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x13, #0xffffffffffffffe0", - "str s2, [x9, w13, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80058,7 +67658,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80071,19 +67671,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80095,10 +67685,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80108,23 +67701,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80137,11 +67716,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -80155,16 +67734,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "mov x23, #0xffffffffffffffdc", + "sub w24, w9, #0x24 (36)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80176,10 +67747,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80189,19 +67761,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "fmov s2, s0", + "str s2, [x24]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80229,20 +67792,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80254,13 +67805,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80270,23 +67818,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80299,11 +67833,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -80317,16 +67851,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80338,7 +67864,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80351,19 +67877,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80375,7 +67893,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80388,23 +67906,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80419,8 +67923,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80432,23 +67936,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80461,10 +67951,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80479,16 +67969,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80500,7 +67982,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80513,19 +67995,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80537,7 +68011,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80550,23 +68024,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80581,8 +68041,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -80594,23 +68054,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80623,10 +68069,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -80641,16 +68087,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80662,11 +68100,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80676,17 +68113,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x14, #0xffffffffffffffe4", - "str s2, [x9, w14, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80698,7 +68129,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80711,19 +68142,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80735,10 +68156,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80748,23 +68172,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80777,11 +68187,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -80795,16 +68205,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "mov x24, #0xffffffffffffffe0", + "sub w25, w9, #0x20 (32)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80816,10 +68218,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80829,19 +68232,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s2, s0", + "str s2, [x25]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80869,20 +68263,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80894,13 +68276,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -80910,23 +68289,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80939,11 +68304,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -80957,16 +68322,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80978,7 +68335,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -80991,19 +68348,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81015,7 +68364,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81028,23 +68377,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81059,8 +68394,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81072,23 +68407,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81101,10 +68422,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81119,16 +68440,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81140,7 +68453,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81153,19 +68466,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81177,7 +68482,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81190,23 +68495,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81221,8 +68512,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81234,23 +68525,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81263,10 +68540,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81281,16 +68558,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81302,11 +68571,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81316,17 +68584,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x15, #0xffffffffffffffe8", - "str s2, [x9, w15, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81338,7 +68600,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81351,19 +68613,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81375,10 +68627,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81388,23 +68643,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81417,11 +68658,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -81435,16 +68676,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "mov x25, #0xffffffffffffffe4", + "sub w12, w9, #0x1c (28)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81456,10 +68689,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81469,19 +68703,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "fmov s2, s0", + "str s2, [x12]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81509,20 +68734,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81534,13 +68747,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81550,23 +68760,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81579,11 +68775,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -81597,16 +68793,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81618,7 +68806,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81631,19 +68819,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81655,7 +68835,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81668,23 +68848,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81699,8 +68865,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81712,23 +68878,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81741,10 +68893,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81757,18 +68909,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81780,7 +68924,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81793,19 +68937,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81817,7 +68953,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81830,23 +68966,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81861,8 +68983,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -81874,23 +68996,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81903,10 +69011,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -81921,16 +69029,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81942,11 +69042,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -81956,17 +69055,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x16, #0xffffffffffffffec", - "str s2, [x9, w16, sxtw]", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81978,7 +69071,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -81991,19 +69084,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82015,10 +69098,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82028,23 +69114,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82057,11 +69129,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82075,16 +69147,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "mov x12, #0xffffffffffffffe8", + "sub w13, w9, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82096,10 +69160,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82109,19 +69174,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "fmov s2, s0", + "str s2, [x13]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82149,20 +69205,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82174,13 +69218,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82190,23 +69231,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82219,11 +69246,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82237,16 +69264,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82258,7 +69277,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82271,19 +69290,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s4, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82295,7 +69306,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82308,23 +69319,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82339,8 +69336,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82352,23 +69349,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82381,10 +69364,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82399,16 +69382,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82420,7 +69395,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82433,19 +69408,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s4, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82457,7 +69424,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82470,23 +69437,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w22, w22, w17", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82501,8 +69454,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82514,23 +69467,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82543,10 +69482,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -82561,16 +69500,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82582,11 +69513,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82596,17 +69526,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x17, #0xfffffffffffffff0", - "str s2, [x9, w17, sxtw]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82618,7 +69542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82631,19 +69555,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82655,10 +69569,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82668,23 +69585,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82697,11 +69600,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82715,16 +69618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "mov x13, #0xffffffffffffffec", + "sub w14, w9, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82736,10 +69631,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82749,19 +69645,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "fmov s2, s0", + "str s2, [x14]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82789,20 +69676,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82814,13 +69689,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -82830,23 +69702,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82859,11 +69717,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -82877,16 +69735,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82898,7 +69748,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82911,19 +69761,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82935,7 +69777,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -82948,23 +69790,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82979,8 +69807,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -82992,23 +69820,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83021,10 +69835,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83039,16 +69853,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83060,7 +69866,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83073,19 +69879,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s4, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83097,7 +69895,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83110,23 +69908,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w22, w22, w29", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83141,8 +69925,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83154,23 +69938,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83183,10 +69953,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83201,16 +69971,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83222,11 +69984,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83236,17 +69997,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x29, #0xfffffffffffffff4", - "str s2, [x9, w29, sxtw]", - "lsl w30, w21, w20", - "bic w22, w22, w30", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83258,7 +70013,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83271,19 +70026,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83295,10 +70040,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83308,23 +70056,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83337,11 +70071,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83355,16 +70089,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "mov x14, #0xfffffffffffffff0", + "sub w15, w9, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83376,10 +70102,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83389,19 +70116,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "fmov s2, s0", + "str s2, [x15]", + "ldr w4, [x9, #16]", + "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83429,20 +70147,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83454,13 +70160,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83470,23 +70173,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83499,11 +70188,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -83517,16 +70206,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83538,7 +70219,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83551,19 +70232,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83575,7 +70248,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83588,23 +70261,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83619,8 +70278,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83632,23 +70291,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83661,10 +70306,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83679,16 +70324,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83700,7 +70337,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83713,19 +70350,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s4, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83737,7 +70366,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83750,23 +70379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83781,8 +70396,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83794,23 +70409,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83823,10 +70424,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -83841,16 +70442,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83862,7 +70455,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83875,19 +70468,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83899,7 +70484,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -83912,23 +70497,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83943,8 +70514,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -83956,19 +70527,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83980,10 +70541,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -83996,15 +70560,36 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", + "mov x15, #0xfffffffffffffff4", + "sub w16, w9, #0xc (12)", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x16]", + "ldr w4, [x9, #16]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84033,20 +70618,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldr s3, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84058,13 +70631,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84074,23 +70644,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84103,11 +70659,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84121,16 +70677,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s3, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84142,7 +70690,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84155,19 +70703,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84179,7 +70719,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84192,23 +70732,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84223,8 +70749,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84236,23 +70762,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84265,10 +70777,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -84283,16 +70795,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr s3, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84304,7 +70808,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84317,19 +70821,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s4, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84341,7 +70837,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84354,23 +70850,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84385,8 +70867,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84398,23 +70880,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84427,10 +70895,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -84445,16 +70913,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84466,7 +70926,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84479,19 +70939,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s4, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84503,7 +70955,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84516,23 +70968,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84547,8 +70985,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84560,19 +70998,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84584,10 +71012,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84600,16 +71031,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", + "ldr w4, [x9, #16]", + "ldr s3, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84621,36 +71044,24 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84662,13 +71073,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s4", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -84678,23 +71086,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84709,9 +71103,9 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -84722,19 +71116,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s4, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84746,7 +71132,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84759,19 +71145,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", + "ldr s5, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84783,7 +71161,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84796,23 +71174,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84825,10 +71189,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -84840,23 +71204,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84871,8 +71221,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -84884,19 +71234,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s4, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84908,7 +71250,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84921,19 +71263,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s5, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84945,7 +71279,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -84958,23 +71292,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84987,10 +71307,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85002,23 +71322,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85033,8 +71339,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -85046,19 +71352,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s4, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85070,7 +71368,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85083,19 +71381,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s5, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85107,7 +71397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85120,23 +71410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85149,10 +71425,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85164,19 +71440,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85188,10 +71454,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85201,19 +71470,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s4, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85225,7 +71486,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85238,23 +71499,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85266,13 +71515,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s5", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85282,23 +71528,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85311,11 +71543,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85326,19 +71558,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s5, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85350,7 +71574,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85363,19 +71587,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s6, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85387,7 +71603,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85400,23 +71616,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85429,10 +71631,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85444,23 +71646,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85473,10 +71661,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -85488,19 +71676,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s5, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85512,7 +71692,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85525,19 +71705,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s6, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85549,7 +71721,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85562,23 +71734,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85591,10 +71749,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85606,23 +71764,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85635,10 +71779,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -85650,19 +71794,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s5, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85674,7 +71810,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85687,19 +71823,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s6, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85711,7 +71839,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85724,23 +71852,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85753,10 +71867,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -85768,19 +71882,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85792,10 +71896,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", + "mov x3, v5.d[0]", + "umov w4, v5.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85805,19 +71912,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s5, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85829,7 +71928,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s5", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85842,23 +71941,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85870,13 +71957,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s6", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -85886,23 +71970,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85915,11 +71985,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -85930,19 +72000,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s6, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85954,7 +72016,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -85967,19 +72029,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s7, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85991,7 +72045,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86004,23 +72058,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86033,10 +72073,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86048,23 +72088,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86077,10 +72103,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86092,19 +72118,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s6, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86116,7 +72134,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86129,19 +72147,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s7, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86153,7 +72163,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86165,24 +72175,10 @@ "ld1 {v2.2d, v3.2d}, [sp], #32", "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldp x17, x30, [sp], #16", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86195,10 +72191,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86210,23 +72206,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86239,10 +72221,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86254,19 +72236,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s6, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86278,7 +72252,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86291,19 +72265,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s7, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86315,7 +72281,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86328,23 +72294,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86357,10 +72309,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86372,19 +72324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86396,10 +72338,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", + "mov x3, v6.d[0]", + "umov w4, v6.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86409,19 +72354,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "eor v5.16b, v5.16b, v5.16b", + "mov v5.d[0], x0", + "mov v5.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s6, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86433,7 +72370,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s6", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86446,23 +72383,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86474,13 +72399,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -86490,23 +72412,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86519,11 +72427,11 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -86534,19 +72442,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s7, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86558,7 +72458,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86571,19 +72471,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s8, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86595,7 +72487,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86608,23 +72500,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86637,10 +72515,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86652,23 +72530,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86681,10 +72545,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86696,19 +72560,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s7, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86720,7 +72576,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86733,19 +72589,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s8, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86757,7 +72605,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86770,23 +72618,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w22, w22, w30", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86799,10 +72633,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -86814,23 +72648,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w30, w20, #0x1 (1)", - "and w30, w30, #0x7", - "add x0, x28, x30, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86843,10 +72663,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -86858,18 +72678,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w19, w21, w20", - "bic w22, w22, w19", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x30, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86881,7 +72694,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s7", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86894,53 +72707,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86952,7 +72723,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -86965,19 +72736,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86990,10 +72751,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87003,15 +72766,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87023,10 +72780,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", + "mov x3, v7.d[0]", + "umov w4, v7.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87036,19 +72796,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v6.16b, v6.16b, v6.16b", + "mov v6.d[0], x0", + "mov v6.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s7, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87060,11 +72812,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s7", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87074,15 +72825,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s8, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87094,7 +72841,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87107,19 +72854,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87132,10 +72869,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87145,15 +72884,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #52]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87165,7 +72900,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87178,19 +72913,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87202,11 +72929,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87216,15 +72942,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #48]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87236,10 +72956,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87249,19 +72972,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87274,10 +72987,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87287,15 +73002,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87307,7 +73018,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -87320,19 +73031,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87344,11 +73047,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87358,15 +73060,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87378,10 +73074,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87391,19 +73090,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87416,10 +73105,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87429,15 +73120,11 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #36]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr w4, [x9, #16]", + "ldr s8, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87449,32 +73136,24 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s8", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", + "ldr w4, [x9, #12]", + "ldr s9, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87486,11 +73165,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s9", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87500,15 +73178,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w29, sxtw]", + "eor v9.16b, v9.16b, v9.16b", + "mov v9.d[0], x0", + "mov v9.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87520,10 +73192,13 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", + "mov x1, v8.d[0]", + "umov w2, v8.h[4]", + "mov x3, v9.d[0]", + "umov w4, v9.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87533,19 +73208,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "eor v8.16b, v8.16b, v8.16b", + "mov v8.d[0], x0", + "mov v8.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87558,10 +73223,12 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", + "mov x3, v8.d[0]", + "umov w4, v8.h[4]", + "ldr x5, [x28, #1608]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -87571,28 +73238,41 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #28]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "eor v7.16b, v7.16b, v7.16b", + "mov v7.d[0], x0", + "mov v7.h[4], w1", + "ldr s8, [x9, w20, sxtw]", + "add w20, w8, #0x40 (64)", + "str s8, [x20]", + "ldr s8, [x9, w21, sxtw]", + "add w20, w8, #0x3c (60)", + "str s8, [x20]", + "ldr s8, [x9, w22, sxtw]", + "add w20, w8, #0x38 (56)", + "str s8, [x20]", + "ldr s8, [x9, w23, sxtw]", + "add w20, w8, #0x34 (52)", + "str s8, [x20]", + "ldr s8, [x9, w24, sxtw]", + "add w20, w8, #0x30 (48)", + "str s8, [x20]", + "ldr s8, [x9, w25, sxtw]", + "add w20, w8, #0x2c (44)", + "str s8, [x20]", + "ldr s8, [x9, w12, sxtw]", + "add w20, w8, #0x28 (40)", + "str s8, [x20]", + "ldr s8, [x9, w13, sxtw]", + "add w20, w8, #0x24 (36)", + "str s8, [x20]", + "ldr s8, [x9, w14, sxtw]", + "add w20, w8, #0x20 (32)", + "str s8, [x20]", + "ldr s8, [x9, w15, sxtw]", + "add w20, w8, #0x1c (28)", + "str s8, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x18 (24)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87619,27 +73299,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x14 (20)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87652,8 +73314,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87666,27 +73328,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", + "str s2, [x20]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "add w20, w8, #0x10 (16)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87699,8 +73343,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v4.d[0]", + "umov w2, v4.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87713,15 +73357,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0xc (12)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87734,8 +73371,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v5.d[0]", + "umov w2, v5.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87748,15 +73385,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #12]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87769,8 +73399,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v6.d[0]", + "umov w2, v6.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87783,15 +73413,8 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "str s2, [x20]", + "add w20, w8, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87804,8 +73427,8 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", + "mov x1, v7.d[0]", + "umov w2, v7.h[4]", "ldr x3, [x28, #1440]", "blr x3", "ldr w4, [x28, #1000]", @@ -87818,28 +73441,23 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x20]", "str w7, [x8]", "mov w20, #0x2bf5", "movk w20, #0x1, lsl #16", - "mov w22, #0xd10b", - "movk w22, #0x818, lsl #16", - "add w22, w20, w22", + "mov w21, #0xd10b", + "movk w21, #0x818, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "strb wzr, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block8": { - "ExpectedInstructionCount": 8590, + "ExpectedInstructionCount": 8522, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -88074,7 +73692,6 @@ "add esp,0x74" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88103,6 +73720,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -88140,7 +73758,6 @@ "add w6, w5, w5, lsl #1", "add w10, w6, w5, lsl #1", "sub w7, w5, #0x2 (2)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88203,7 +73820,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88232,376 +73848,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "add w11, w10, w5, lsl #1", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #116]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #44]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", + "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w11, w10, w5, lsl #1", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88648,7 +73905,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88664,8 +73921,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #120]", + "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88727,9 +73983,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88741,11 +73995,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -88755,17 +74008,19 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #40]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88793,16 +74048,41 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88848,7 +74128,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1608]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88864,10 +74144,44 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w8, #0x2c (44)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88897,25 +74211,76 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "ldr s2, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w23, #0x0", - "mov w24, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x24", - "eor v2.16b, v2.16b, v3.16b", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -88961,7 +74326,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -88977,9 +74342,46 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w7, lsl #2", - "ldr s2, [x25]", + "add w22, w8, #0x28 (40)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89009,15 +74411,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89063,7 +74465,7 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", - "ldr x5, [x28, #1616]", + "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -89079,9 +74481,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89093,11 +74495,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s2", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", + "ldr x1, [x28, #1424]", + "blr x1", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -89107,17 +74508,93 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mov w22, #0x0", + "mov w23, #0x8000", + "fmov d3, x22", + "mov v3.d[1], x23", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w24, w4, w7, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89147,15 +74624,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89217,7 +74695,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89246,16 +74724,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89285,15 +74764,156 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w22, w22, w25", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w24, w8, #0x1c (28)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89355,10 +74975,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89388,15 +75007,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89458,7 +75078,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89487,16 +75107,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89526,15 +75147,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89596,7 +75218,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89625,16 +75247,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89664,15 +75287,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89734,7 +75358,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89763,28 +75387,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -89820,7 +75444,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w7, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89849,26 +75473,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w7, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89931,7 +75556,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -89960,30 +75586,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90019,7 +75641,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90048,29 +75671,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w25, [x28, #1298]", + "lsl w24, w21, w24", + "orr w24, w25, w24", + "strb w24, [x28, #1298]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90101,15 +75726,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90145,7 +75771,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90174,29 +75801,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90227,12 +75846,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90295,7 +75915,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90326,12 +75945,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90394,22 +76014,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90445,22 +76065,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90496,12 +76116,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90515,10 +76134,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -90533,14 +76152,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90569,30 +76191,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90628,22 +76250,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90679,12 +76301,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90716,14 +76337,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90752,43 +76376,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90819,12 +76428,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90887,7 +76497,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90918,12 +76527,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90986,7 +76596,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91017,90 +76626,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91136,10 +76671,46 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldr s2, [x8, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91159,6 +76730,44 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -91173,14 +76782,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91209,15 +76821,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x8 (8)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91248,15 +76859,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91292,7 +76904,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91323,15 +76934,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -91367,12 +76979,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91386,10 +76997,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -91404,14 +77015,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91440,45 +77054,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91508,14 +77107,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91577,10 +77177,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91610,23 +77209,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91688,9 +77287,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91720,14 +77318,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91789,7 +77388,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91818,16 +77417,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91857,15 +77457,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91927,7 +77528,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -91956,15 +77557,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w11, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91994,14 +77596,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w6, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92063,10 +77666,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92096,15 +77698,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92166,7 +77769,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92195,15 +77798,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92233,14 +77837,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92302,7 +77907,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92331,16 +77936,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92370,15 +77976,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92440,7 +78047,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92469,28 +78076,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92526,7 +78133,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92555,26 +78162,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92637,7 +78245,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92666,30 +78275,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w5, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92725,7 +78330,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92754,28 +78359,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w25, [x28, #1298]", + "lsl w24, w21, w24", + "orr w24, w25, w24", + "strb w24, [x28, #1298]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92806,15 +78414,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92850,7 +78459,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -92879,29 +78489,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w6, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92932,12 +78534,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93000,7 +78603,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93031,12 +78633,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93099,22 +78702,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93150,7 +78753,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93213,7 +78815,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93242,17 +78844,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93288,7 +78890,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93351,7 +78952,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93380,29 +78982,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w10, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93433,12 +79027,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93501,7 +79096,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93532,12 +79126,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93600,7 +79195,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93631,35 +79225,36 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93695,10 +79290,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93734,7 +79328,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93763,26 +79357,25 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w25, w20, #0x2 (2)", "and w25, w25, #0x7", "add x0, x28, x25, lsl #4", @@ -93821,10 +79414,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93860,7 +79450,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -93889,46 +79480,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w25, w4, #0x4 (4)", - "add w25, w25, w11, lsl #2", - "str s2, [x25]", + "str s2, [x24]", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "lsl w25, w21, w25", - "orr w22, w22, w25", + "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w22, w22, w25", + "bic w24, w24, w25", + "strb w24, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x8 (8)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93958,15 +79534,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0x8 (8)", - "add w25, w25, w10, lsl #2", - "ldr s2, [x25]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94028,10 +79605,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w4, #0xc (12)", - "add w25, w25, w5, lsl #2", - "ldr s2, [x25]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94061,23 +79637,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w24, w24, w25", + "strb w24, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x24", + "fmov d3, x22", + "mov v3.d[1], x23", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94139,10 +79715,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94172,15 +79747,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94242,7 +79818,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94271,16 +79847,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94310,15 +79887,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94380,7 +79958,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94409,16 +79987,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94448,15 +80027,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94518,10 +80098,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94551,15 +80130,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94621,7 +80201,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94650,16 +80230,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94689,15 +80270,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94759,7 +80341,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94788,16 +80370,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94827,15 +80410,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94897,7 +80481,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -94926,28 +80510,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -94983,7 +80567,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95012,27 +80597,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95095,7 +80680,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95124,30 +80710,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95183,7 +80765,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95212,29 +80795,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95265,15 +80850,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95309,7 +80895,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95338,29 +80925,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95391,12 +80970,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95459,7 +81039,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95490,12 +81069,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95558,22 +81138,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95609,22 +81189,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95660,12 +81240,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95679,10 +81258,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -95697,14 +81276,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95733,30 +81315,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95792,19 +81370,17 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w23, w20, #0x1 (1)", "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", @@ -95843,12 +81419,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95880,26 +81453,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -95928,43 +81503,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95995,12 +81555,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96063,7 +81624,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96094,12 +81654,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96162,7 +81723,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96193,15 +81753,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96237,7 +81798,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96268,15 +81828,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96312,12 +81873,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96349,14 +81909,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -96385,15 +81948,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96424,15 +81986,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96468,7 +82031,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96499,15 +82061,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96543,12 +82106,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96562,10 +82124,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -96580,14 +82142,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -96616,11 +82181,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -96628,33 +82193,19 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -96662,12 +82213,11 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", - "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block9": { - "ExpectedInstructionCount": 8488, + "ExpectedInstructionCount": 8441, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -96893,7 +82443,6 @@ "add esp,0x74" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -96922,6 +82471,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -96959,7 +82509,6 @@ "add w6, w5, w5, lsl #1", "add w10, w6, w5, lsl #1", "sub w7, w5, #0x2 (2)", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97022,7 +82571,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97054,14 +82602,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "add w11, w10, w5, lsl #1", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97124,7 +82672,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97187,7 +82734,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97218,12 +82764,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97286,7 +82833,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97349,7 +82895,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x30 (48)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97378,13 +82924,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #48]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97415,12 +82962,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97483,7 +83031,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97546,7 +83093,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x2c (44)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97575,16 +83122,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #44]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97614,14 +83162,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97683,10 +83232,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97716,15 +83264,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97786,9 +83335,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w7, lsl #2", - "ldr s2, [x23]", + "add w22, w4, w7, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97818,15 +83366,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97888,7 +83437,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -97917,16 +83466,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97956,15 +83506,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98026,7 +83577,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98055,16 +83606,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98094,15 +83646,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98164,10 +83717,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98197,15 +83749,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98267,7 +83820,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98296,16 +83849,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98335,15 +83889,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98405,7 +83960,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98434,16 +83989,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98473,15 +84029,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98543,7 +84100,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98572,29 +84129,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x0", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98630,7 +84186,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w7, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98659,14 +84215,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w7, lsl #2", - "str s2, [x24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98697,15 +84253,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98741,7 +84298,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98770,30 +84328,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "mov w23, #0x0", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98829,7 +84384,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98858,29 +84414,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98943,7 +84501,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -98972,15 +84531,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99011,12 +84569,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99079,7 +84638,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99110,12 +84668,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99178,73 +84737,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99280,10 +84788,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99299,10 +84819,48 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -99317,14 +84875,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99353,30 +84914,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99412,22 +84973,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99463,12 +85024,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99500,14 +85060,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99536,43 +85099,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99603,12 +85151,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99671,7 +85220,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99702,12 +85250,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99770,7 +85319,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99801,15 +85349,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99845,7 +85394,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99876,15 +85424,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99920,12 +85469,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99957,14 +85505,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -99993,15 +85544,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100032,15 +85582,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100076,7 +85627,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100107,15 +85657,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100151,12 +85702,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100170,10 +85720,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -100188,14 +85738,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "sub w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100224,45 +85777,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100292,14 +85830,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100361,10 +85900,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100394,15 +85932,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100464,9 +86003,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100496,14 +86034,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100565,7 +86104,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100594,16 +86133,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100633,15 +86173,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100703,7 +86244,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100732,15 +86273,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100770,14 +86312,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100839,10 +86382,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100872,15 +86414,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100942,7 +86485,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -100971,15 +86514,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101009,14 +86553,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101078,7 +86623,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101107,16 +86652,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101146,15 +86692,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101216,7 +86763,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101245,28 +86792,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101302,7 +86849,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101331,14 +86878,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101369,15 +86916,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101413,7 +86961,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101442,30 +86991,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101501,7 +87046,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101530,28 +87075,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w24, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w24, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101614,7 +87162,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101643,15 +87192,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101682,12 +87230,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101750,7 +87299,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101781,12 +87329,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101849,22 +87398,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101900,7 +87449,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101963,7 +87511,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -101992,17 +87540,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102038,7 +87586,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102101,7 +87648,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102130,29 +87678,21 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "lsl w24, w21, w24", - "orr w22, w22, w24", + "ldrb w22, [x28, #1298]", "lsl w24, w21, w20", "bic w22, w22, w24", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102183,12 +87723,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102251,7 +87792,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102282,12 +87822,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102350,7 +87891,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102381,36 +87921,37 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w22, [x28, #1298]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w24, #0x8000", + "mov w22, #0x8000", "fmov d3, x23", - "mov v3.d[1], x24", + "mov v3.d[1], x22", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102446,10 +87987,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102485,7 +88025,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102514,26 +88054,25 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", "add w23, w20, #0x2 (2)", "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", @@ -102572,10 +88111,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102611,7 +88147,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x4 (4)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -102640,46 +88177,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102709,15 +88231,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102779,10 +88302,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102812,15 +88334,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102882,10 +88405,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102915,15 +88437,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102985,7 +88508,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x18 (24)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103014,16 +88537,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103053,15 +88577,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103123,7 +88648,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x1c (28)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103152,16 +88677,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #28]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103191,15 +88717,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103261,10 +88788,9 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103294,15 +88820,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103364,7 +88891,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x10 (16)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103393,16 +88920,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #16]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103432,15 +88960,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103502,7 +89031,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x20 (32)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103531,16 +89060,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #32]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103570,15 +89100,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", + "ldr s2, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103640,7 +89171,7 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w8, #0x14 (20)", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103669,28 +89200,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #20]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103726,7 +89257,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103755,15 +89287,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -103794,15 +89325,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103838,7 +89370,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w5, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103867,30 +89400,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb wzr, [x28, #1017]", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103926,7 +89455,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103955,29 +89485,31 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w23, [x28, #1298]", + "lsl w22, w21, w22", + "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104040,7 +89572,8 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w6, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104069,15 +89602,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104108,12 +89640,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104176,7 +89709,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104207,12 +89739,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104275,22 +89808,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104326,22 +89859,22 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x4 (4)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104377,12 +89910,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104396,10 +89928,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -104414,14 +89946,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104450,81 +89985,26 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104560,8 +90040,18 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]", + "add w23, w20, #0x1 (1)", "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", @@ -104583,6 +90073,42 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -104597,26 +90123,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "strb wzr, [x28, #1017]", + "add w22, w4, #0xc (12)", + "add w22, w22, w10, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -104645,43 +90173,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104712,12 +90225,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104780,7 +90294,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104811,12 +90324,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104879,7 +90393,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104910,15 +90423,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104954,7 +90468,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104985,15 +90498,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105029,12 +90543,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105066,14 +90579,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0x8 (8)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -105102,15 +90618,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105141,15 +90656,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105185,7 +90701,6 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105216,15 +90731,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", + "strb w22, [x28, #1298]", + "add w22, w20, #0x3 (3)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105260,12 +90776,11 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105279,10 +90794,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -105297,14 +90812,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", + "add w22, w4, #0xc (12)", + "add w22, w22, w11, lsl #2", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -105333,11 +90851,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", + "str s2, [x22]", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -105345,33 +90863,19 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "lsl w23, w21, w23", - "orr w22, w22, w23", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -105379,12 +90883,11 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", - "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block10": { - "ExpectedInstructionCount": 8405, + "ExpectedInstructionCount": 6382, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -105813,7 +91316,6 @@ "sub w8, w8, #0x14 (20)", "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -105842,19 +91344,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x38 (56)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105866,7 +91358,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -105879,23 +91371,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105926,16 +91404,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x20, #0xfffffffffffffff8", + "sub w21, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105962,16 +91432,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xfffffffffffffff8", - "str s2, [x9, w23, sxtw]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x21]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106000,17 +91463,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x3c (60)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106022,7 +91477,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106035,23 +91490,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106082,16 +91523,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "mov x21, #0xfffffffffffffffc", + "sub w22, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106118,18 +91551,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xfffffffffffffffc", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", "ldr w6, [x9, #8]", "add w6, w6, #0x78 (120)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106158,17 +91584,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x38 (56)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106180,7 +91598,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106193,23 +91611,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106222,10 +91626,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106240,16 +91644,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106277,16 +91671,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", "ldr w6, [x9, #8]", "add w6, w6, #0x7c (124)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106315,17 +91703,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x3c (60)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106337,7 +91717,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106350,23 +91730,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106379,10 +91745,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106397,16 +91763,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106434,22 +91790,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x38 (56)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w20, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x3c (60)", - "ldr w4, [x9, w24, sxtw]", + "ldr w4, [x9, w21, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106478,17 +91828,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106500,7 +91842,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106513,23 +91855,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106560,16 +91888,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106596,15 +91915,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106633,17 +91946,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106655,7 +91960,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106668,23 +91973,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106715,16 +92006,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w22, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106751,17 +92033,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x22]", "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", "ldr w6, [x9, #8]", "add w6, w6, #0x70 (112)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106790,17 +92066,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106812,7 +92080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106825,23 +92093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106854,10 +92108,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -106872,16 +92126,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106909,16 +92153,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", "ldr w6, [x9, #8]", "add w6, w6, #0x74 (116)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106947,17 +92185,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106969,7 +92199,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -106982,23 +92212,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107011,10 +92227,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107029,16 +92245,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107066,15 +92272,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107102,17 +92302,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w22, w22, w25", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w25, #0x3140", - "movk w25, #0x855, lsl #16", - "ldr s2, [x25]", + "mov w22, #0x3140", + "movk w22, #0x855, lsl #16", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107124,7 +92316,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107137,23 +92329,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107166,10 +92344,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107184,15 +92362,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107204,7 +92374,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107217,20 +92387,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w12, #0x3144", - "movk w12, #0x855, lsl #16", - "ldr s2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w23, #0x3144", + "movk w23, #0x855, lsl #16", + "ldr s4, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107242,7 +92404,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107255,23 +92417,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107286,8 +92434,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107299,23 +92447,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107328,10 +92462,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107346,16 +92480,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107383,133 +92507,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x34 (52)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w13, #0x3148", - "movk w13, #0x855, lsl #16", - "ldr s2, [x13]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1624]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107537,15 +92537,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "mov w24, #0x3148", + "movk w24, #0x855, lsl #16", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107557,7 +92551,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107570,23 +92564,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107599,10 +92579,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -107617,20 +92597,62 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x9, w21, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s3", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s4", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107645,8 +92667,38 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", + "ldr x5, [x28, #1624]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -107661,16 +92713,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107698,14 +92740,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107734,17 +92770,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107756,7 +92784,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107769,23 +92797,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107816,16 +92830,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107852,15 +92857,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107889,17 +92888,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107911,7 +92902,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -107924,23 +92915,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -107971,16 +92948,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108007,17 +92975,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", "ldr w6, [x9, #8]", "add w6, w6, #0x68 (104)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108046,17 +93008,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108068,7 +93022,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108081,23 +93035,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108110,10 +93050,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108128,16 +93068,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108165,16 +93095,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", "ldr w6, [x9, #8]", "add w6, w6, #0x6c (108)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108203,17 +93127,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108225,7 +93141,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108238,23 +93154,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108267,10 +93169,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108285,16 +93187,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108322,15 +93214,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108358,15 +93244,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108378,7 +93256,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108391,11 +93269,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108408,10 +93284,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -108426,12 +93302,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w14, #0x313c", - "movk w14, #0x855, lsl #16", - "ldr s2, [x14]", + "mov w25, #0x313c", + "movk w25, #0x855, lsl #16", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108443,7 +93316,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108456,23 +93329,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108485,10 +93344,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -108503,16 +93362,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108540,15 +93389,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108576,15 +93419,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108596,7 +93431,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108609,11 +93444,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108626,10 +93459,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -108644,10 +93477,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108659,7 +93489,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108672,23 +93502,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108701,10 +93517,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -108719,16 +93535,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108756,14 +93562,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108792,17 +93592,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108814,7 +93606,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108827,23 +93619,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108874,16 +93652,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108910,15 +93679,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108947,17 +93710,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -108969,7 +93724,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -108982,23 +93737,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109029,16 +93770,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109065,17 +93797,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", "ldr w6, [x9, #8]", "add w6, w6, #0x60 (96)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109104,17 +93830,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109126,7 +93844,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109139,23 +93857,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109168,10 +93872,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109186,16 +93890,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109223,16 +93917,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", "ldr w6, [x9, #8]", "add w6, w6, #0x64 (100)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109261,17 +93949,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109283,7 +93963,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109296,23 +93976,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109325,10 +93991,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109343,16 +94009,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109380,15 +94036,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109416,15 +94066,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109436,7 +94078,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109449,23 +94091,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109478,10 +94106,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109496,15 +94124,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s3, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109516,7 +94136,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109529,20 +94149,12 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w15, #0x314c", - "movk w15, #0x855, lsl #16", - "ldr s2, [x15]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mov w12, #0x314c", + "movk w12, #0x855, lsl #16", + "ldr s4, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109554,7 +94166,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109567,23 +94179,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109598,8 +94196,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109611,23 +94209,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109640,10 +94224,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109658,16 +94242,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109695,15 +94269,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109731,15 +94299,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109751,7 +94311,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109764,23 +94324,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109793,10 +94339,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109811,15 +94357,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109831,7 +94369,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109844,18 +94382,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109867,7 +94397,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -109880,23 +94410,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109911,8 +94427,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -109924,23 +94440,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -109953,10 +94455,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -109971,16 +94473,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110008,14 +94500,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110044,17 +94530,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x18 (24)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110066,7 +94544,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110079,23 +94557,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110126,16 +94590,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110162,15 +94617,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x1c (28)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110199,17 +94648,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x5c (92)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110221,7 +94662,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110234,23 +94675,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110281,16 +94708,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110317,17 +94735,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", "ldr w6, [x9, #8]", "add w6, w6, #0x58 (88)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110356,17 +94768,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x18 (24)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110378,7 +94782,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110391,23 +94795,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110420,10 +94810,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -110438,16 +94828,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110475,16 +94855,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x5c (92)", "ldr w6, [x9, #8]", "add w6, w6, #0x5c (92)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110513,17 +94887,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x1c (28)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110535,7 +94901,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110548,23 +94914,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110577,10 +94929,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -110595,16 +94947,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110632,22 +94974,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x18 (24)", - "ldr w4, [x9, w24, sxtw]", + "ldr w4, [x9, w21, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x1c (28)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w20, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110676,17 +95012,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x50 (80)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110698,7 +95026,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110711,23 +95039,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110758,16 +95072,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110794,15 +95099,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110831,17 +95130,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x54 (84)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110853,7 +95144,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -110866,23 +95157,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110913,16 +95190,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w13, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110949,17 +95217,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x13]", "ldr w4, [x9, #8]", "add w4, w4, #0x50 (80)", "ldr w6, [x9, #8]", "add w6, w6, #0x50 (80)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110988,17 +95250,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111010,7 +95264,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111023,23 +95277,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111052,10 +95292,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111070,16 +95310,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111107,16 +95337,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x54 (84)", "ldr w6, [x9, #8]", "add w6, w6, #0x54 (84)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111145,17 +95369,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x14 (20)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111167,7 +95383,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111180,23 +95396,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111209,10 +95411,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111227,16 +95429,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111264,15 +95456,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111300,15 +95486,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111320,7 +95498,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111333,23 +95511,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111362,10 +95526,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111380,15 +95544,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111400,7 +95556,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111413,18 +95569,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111436,7 +95584,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111449,23 +95597,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111480,8 +95614,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111493,23 +95627,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111522,10 +95642,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111540,16 +95660,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111577,15 +95687,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111613,15 +95717,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111633,7 +95729,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111646,23 +95742,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111675,10 +95757,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111693,15 +95775,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w17, w21, w20", - "bic w22, w22, w17", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111713,7 +95787,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111726,18 +95800,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w22, w22, w16", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x15]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111749,7 +95815,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111762,23 +95828,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111793,8 +95845,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -111806,23 +95858,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111835,10 +95873,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -111853,16 +95891,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111890,14 +95918,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111926,17 +95948,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x48 (72)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111948,7 +95962,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -111961,23 +95975,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112008,16 +96008,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112044,15 +96035,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112081,17 +96066,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x4c (76)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112103,7 +96080,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112116,23 +96093,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112163,16 +96126,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w12, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112199,17 +96153,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x12]", "ldr w4, [x9, #8]", "add w4, w4, #0x48 (72)", "ldr w6, [x9, #8]", "add w6, w6, #0x48 (72)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112238,17 +96186,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0x8 (8)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112260,7 +96200,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112273,23 +96213,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112302,10 +96228,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112320,16 +96246,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112357,16 +96273,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x4c (76)", "ldr w6, [x9, #8]", "add w6, w6, #0x4c (76)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112395,17 +96305,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w6, [x9, #8]", "add w6, w6, #0xc (12)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112417,7 +96319,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112430,23 +96332,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112459,10 +96347,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112477,16 +96365,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112514,51 +96392,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112586,8 +96422,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112599,11 +96434,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -112618,10 +96480,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112633,7 +96492,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112646,23 +96505,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112675,10 +96520,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -112693,16 +96538,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w16, w21, w20", - "bic w22, w22, w16", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112730,15 +96565,9 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112766,15 +96595,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w22, w22, w15", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112786,7 +96607,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112799,11 +96620,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112816,10 +96635,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -112834,10 +96653,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", + "ldr s3, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112849,7 +96665,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -112862,23 +96678,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112891,10 +96693,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -112909,16 +96711,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112946,13 +96738,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112981,17 +96767,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113003,7 +96781,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113016,23 +96794,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113063,16 +96827,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x8 (8)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113099,15 +96854,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w4, w4, #0x4 (4)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113136,17 +96885,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", "add w4, w4, #0x44 (68)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113158,7 +96899,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113171,23 +96912,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113218,16 +96945,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", + "sub w25, w9, #0x4 (4)", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113254,17 +96972,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w24, sxtw]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "str s2, [x25]", "ldr w4, [x9, #8]", "add w6, w4, #0x40 (64)", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113293,16 +97005,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s3, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113314,7 +97018,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113327,23 +97031,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113356,10 +97046,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113374,16 +97064,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113411,54 +97091,10 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x44 (68)", "ldr w6, [x9, #8]", "add w6, w6, #0x44 (68)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x6]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w6, [x9, #8]", - "add w6, w6, #0x4 (4)", - "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113487,20 +97123,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "ldr w6, [x9, #8]", + "add w6, w6, #0x4 (4)", + "ldr s3, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113512,11 +97137,38 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", + "fmov s0, s3", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113531,16 +97183,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w15, w21, w20", - "bic w22, w22, w15", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113568,13 +97210,7 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113602,15 +97238,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w22, w22, w14", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s3, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113622,7 +97250,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113635,23 +97263,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113664,10 +97278,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113682,15 +97296,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113702,7 +97308,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113715,18 +97321,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113738,7 +97336,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113751,23 +97349,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w22, w22, w13", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113782,8 +97366,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113795,23 +97379,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113824,10 +97394,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -113842,17 +97412,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w14, w21, w20", - "bic w22, w22, w14", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113880,17 +97440,11 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w13, w21, w20", - "bic w22, w22, w13", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "adds w26, w4, #0x4 (4)", "mov x27, x4", "mov x4, x26", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldr s2, [x9, w21, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113918,15 +97472,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", + "ldr s3, [x22]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113938,7 +97484,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -113951,23 +97497,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -113980,10 +97512,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -113998,15 +97530,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w25, w21, w20", - "bic w22, w22, w25", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s3, [x9, w20, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114018,7 +97542,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s3", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -114031,18 +97555,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", + "ldr s4, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114054,7 +97570,7 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x16, [x0], #16", "stp x17, x30, [x0], #16", - "fmov s0, s2", + "fmov s0, s4", "ldrh w0, [x28, #1296]", "ldr x1, [x28, #1424]", "blr x1", @@ -114067,23 +97583,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v4.16b, v4.16b, v4.16b", + "mov v4.d[0], x0", + "mov v4.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114098,8 +97600,8 @@ "ldrh w0, [x28, #1296]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x3, v4.d[0]", + "umov w4, v4.h[4]", "ldr x5, [x28, #1624]", "blr x5", "ldr w4, [x28, #1000]", @@ -114111,23 +97613,9 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", + "eor v3.16b, v3.16b, v3.16b", + "mov v3.d[0], x0", + "mov v3.h[4], w1", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114140,10 +97628,10 @@ "str x16, [x0], #16", "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -114158,16 +97646,6 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114195,22 +97673,24 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "str w4, [x8]", "mov w20, #0x37f1", "movk w20, #0x1, lsl #16", - "mov w22, #0xda1c", - "movk w22, #0x816, lsl #16", - "add w22, w20, w22", + "mov w21, #0xda1c", + "movk w21, #0x816, lsl #16", + "add w21, w20, w21", "str w20, [x8, #-4]!", - "strb w21, [x28, #1298]", + "ldrb w20, [x28, #1019]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "mov w23, #0x1", + "lsl w20, w23, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]", "ldr x0, [x28, #2272]", - "and x3, x22, #0xfffff", + "and x3, x21, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index 542c943de1..e0ef8e3814 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -19,7 +19,6 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48,6 +47,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -90,7 +90,6 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -119,6 +118,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -161,7 +161,6 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -190,6 +189,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -237,7 +237,6 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -266,6 +265,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -309,10 +309,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -321,7 +321,6 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -350,6 +349,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -392,7 +392,6 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -421,6 +420,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -463,7 +463,6 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -492,6 +491,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -534,7 +534,6 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -563,6 +562,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -600,15 +600,13 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -642,7 +640,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -976,15 +974,13 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1018,7 +1014,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -1352,15 +1348,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1376,10 +1370,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1410,10 +1404,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1428,10 +1422,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1462,10 +1456,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1480,10 +1474,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1514,10 +1508,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1532,10 +1526,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1566,10 +1560,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1584,10 +1578,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1618,10 +1612,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1636,10 +1630,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1670,10 +1664,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1688,10 +1682,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1722,10 +1716,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1740,10 +1734,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1768,15 +1762,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1792,10 +1784,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1821,10 +1813,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -1834,12 +1826,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1853,10 +1845,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1881,10 +1873,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -1894,11 +1886,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1912,10 +1904,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1941,10 +1933,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -1954,11 +1946,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1972,10 +1964,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2001,10 +1993,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -2014,11 +2006,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2032,10 +2024,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2061,10 +2053,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -2074,11 +2066,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2092,10 +2084,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2121,10 +2113,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -2134,11 +2126,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2152,10 +2144,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2181,10 +2173,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -2194,11 +2186,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2212,10 +2204,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2241,22 +2233,20 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2272,10 +2262,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2290,7 +2280,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2624,15 +2614,13 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2666,7 +2654,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2677,11 +2665,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2695,10 +2683,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2724,11 +2712,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2742,10 +2730,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2771,11 +2759,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2789,10 +2777,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2818,11 +2806,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2836,10 +2824,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2865,11 +2853,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2883,10 +2871,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2912,11 +2900,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2930,10 +2918,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2959,11 +2947,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2977,10 +2965,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -3000,15 +2988,13 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3024,10 +3010,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3042,7 +3028,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3376,15 +3362,13 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3418,7 +3402,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3429,11 +3413,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3447,10 +3431,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3476,11 +3460,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3494,10 +3478,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3523,11 +3507,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3541,10 +3525,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3570,11 +3554,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3588,10 +3572,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3617,11 +3601,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3635,10 +3619,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3664,11 +3648,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3682,10 +3666,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3711,11 +3695,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3729,10 +3713,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3757,7 +3741,6 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3786,16 +3769,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3876,21 +3860,22 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { - "ExpectedInstructionCount": 48, + "ExpectedInstructionCount": 50, "Comment": [ "0xd9 !11b /4" ], "ExpectedArm64ASM": [ "ldrh w20, [x4]", "strh w20, [x28, #1296]", - "ldr w20, [x4, #4]", + "add x20, x4, #0x4 (4)", + "ldr w20, [x20]", "ubfx w21, w20, #11, #3", "strb w21, [x28, #1019]", "ubfx w21, w20, #8, #1", @@ -3901,7 +3886,8 @@ "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", - "ldr w20, [x4, #8]", + "add x20, x4, #0x8 (8)", + "ldr w20, [x20]", "ubfx w21, w20, #0, #2", "mrs x22, nzcv", "cmp x21, #0x3 (3)", @@ -4029,26 +4015,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -4065,13 +4049,13 @@ "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -4088,13 +4072,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -4111,13 +4095,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -4134,13 +4118,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -4157,14 +4141,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" - ] + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" + ] }, "fld st6": { "ExpectedInstructionCount": 15, @@ -4180,13 +4164,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -4203,33 +4187,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -4239,17 +4212,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -4259,17 +4232,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -4279,17 +4252,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -4299,17 +4272,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -4319,17 +4292,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -4339,17 +4312,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -4359,17 +4332,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -4495,18 +4468,18 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2608]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -4515,18 +4488,18 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -4535,18 +4508,18 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2640]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2640]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -4555,18 +4528,18 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2656]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2656]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -4575,18 +4548,18 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2672]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -4595,18 +4568,18 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2688]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -4615,18 +4588,18 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -4671,22 +4644,17 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4700,10 +4668,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -4718,9 +4686,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -4730,13 +4700,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4767,32 +4730,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldr q3, [x28, #2608]", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldr q2, [x28, #2608]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4824,9 +4789,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -4836,13 +4803,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4903,9 +4863,16 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -4917,9 +4884,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4933,10 +4900,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1656]", "blr x5", "ldr w4, [x28, #1000]", @@ -4951,9 +4918,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -4989,9 +4956,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5005,10 +4972,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1664]", "blr x5", "ldr w4, [x28, #1000]", @@ -5023,30 +4990,21 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 77, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "ldr q4, [x28, #2608]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5059,10 +5017,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v4.d[0]", - "umov w4, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5077,22 +5035,30 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -5107,9 +5073,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -5160,13 +5128,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -5225,12 +5186,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -5283,9 +5251,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5299,10 +5267,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1672]", "blr x5", "ldr w4, [x28, #1000]", @@ -5358,9 +5326,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -5400,9 +5368,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -5411,8 +5379,7 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5424,7 +5391,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5440,6 +5407,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5482,8 +5450,7 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5495,7 +5462,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5511,6 +5478,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5553,8 +5521,7 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5566,7 +5533,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5582,6 +5549,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5629,8 +5597,7 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5642,7 +5609,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5658,6 +5625,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5701,10 +5669,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -5713,8 +5681,7 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5726,7 +5693,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5742,6 +5709,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5784,8 +5752,7 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5797,7 +5764,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5813,6 +5780,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5855,8 +5823,7 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5868,7 +5835,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5884,6 +5851,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5926,8 +5894,7 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5939,7 +5906,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5955,6 +5922,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5992,7 +5960,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -6000,13 +5968,11 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6022,11 +5988,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6042,11 +6008,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6062,11 +6028,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6082,11 +6048,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6102,11 +6068,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6122,11 +6088,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6142,17 +6108,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -6160,13 +6126,11 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6182,11 +6146,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6202,11 +6166,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6222,11 +6186,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6242,11 +6206,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6262,11 +6226,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6282,11 +6246,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6302,17 +6266,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -6322,13 +6286,11 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6346,11 +6308,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6368,11 +6330,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6390,11 +6352,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6412,11 +6374,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6434,11 +6396,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6456,11 +6418,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6478,17 +6440,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -6501,13 +6463,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6529,11 +6489,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6555,11 +6515,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6581,11 +6541,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6607,11 +6567,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6633,11 +6593,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6659,11 +6619,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6685,29 +6645,29 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xda 11b 0xe9 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6721,10 +6681,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6749,57 +6709,59 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6842,10 +6804,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -6926,10 +6888,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -6938,22 +6900,22 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb !11b /7" ], @@ -6963,19 +6925,20 @@ "ldr q2, [x0, #1040]", "str d2, [x4]", "mov x21, v2.d[1]", - "strh w21, [x4, #8]", + "add x22, x4, #0x8 (8)", + "strh w21, [x22]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -6983,13 +6946,11 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7005,11 +6966,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7025,11 +6986,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7045,11 +7006,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7065,11 +7026,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7085,11 +7046,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7105,11 +7066,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7125,17 +7086,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -7143,13 +7104,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7165,11 +7124,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7185,11 +7144,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7205,11 +7164,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7225,11 +7184,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7245,11 +7204,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7265,11 +7224,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7285,17 +7244,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -7304,13 +7263,11 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7327,11 +7284,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7348,11 +7305,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7369,11 +7326,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7390,11 +7347,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7411,11 +7368,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7432,11 +7389,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7453,17 +7410,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -7476,13 +7433,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7504,11 +7459,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7530,11 +7485,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7556,11 +7511,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7582,11 +7537,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7608,11 +7563,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7634,11 +7589,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7660,11 +7615,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7694,15 +7649,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 43, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7718,10 +7671,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7751,10 +7704,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7769,10 +7722,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7802,10 +7755,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7820,10 +7773,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7853,10 +7806,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7871,10 +7824,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7904,10 +7857,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7922,10 +7875,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7955,10 +7908,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7973,10 +7926,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8006,10 +7959,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8024,10 +7977,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8057,10 +8010,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8075,10 +8028,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8102,15 +8055,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 43, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8126,10 +8077,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8159,10 +8110,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8177,10 +8128,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8210,10 +8161,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8228,10 +8179,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8261,10 +8212,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8279,10 +8230,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8312,10 +8263,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8330,10 +8281,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8363,10 +8314,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8381,10 +8332,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8414,10 +8365,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8432,10 +8383,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8465,10 +8416,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8483,10 +8434,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8515,7 +8466,6 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8544,6 +8494,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8586,7 +8537,6 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8615,6 +8565,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8657,7 +8608,6 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8686,6 +8636,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8733,7 +8684,6 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8762,6 +8712,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8805,10 +8756,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -8817,7 +8768,6 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8846,6 +8796,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8888,7 +8839,6 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8917,6 +8867,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8959,7 +8910,6 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8988,6 +8938,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9030,7 +8981,6 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9059,6 +9009,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9096,7 +9047,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9104,9 +9055,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9140,7 +9089,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9151,10 +9100,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9187,7 +9136,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9198,10 +9147,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9234,7 +9183,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9245,10 +9194,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9281,7 +9230,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9292,10 +9241,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9328,7 +9277,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9339,10 +9288,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9375,7 +9324,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9386,10 +9335,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9422,7 +9371,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9433,10 +9382,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9469,12 +9418,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9482,9 +9431,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9518,7 +9465,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9529,10 +9476,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9565,7 +9512,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9576,10 +9523,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9612,7 +9559,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9623,10 +9570,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9659,7 +9606,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9670,10 +9617,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9706,7 +9653,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9717,10 +9664,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9753,7 +9700,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9764,10 +9711,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9800,7 +9747,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9811,10 +9758,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9847,12 +9794,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9860,9 +9807,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9896,7 +9841,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10230,7 +10175,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10238,9 +10183,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10256,10 +10199,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10274,7 +10217,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10285,10 +10228,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10303,10 +10246,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10321,7 +10264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10332,10 +10275,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10350,10 +10293,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10368,7 +10311,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10379,10 +10322,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10397,10 +10340,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10415,7 +10358,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10426,10 +10369,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10444,10 +10387,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10462,7 +10405,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10473,10 +10416,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10491,10 +10434,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10509,7 +10452,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10520,10 +10463,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10538,10 +10481,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10556,7 +10499,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10567,10 +10510,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10585,10 +10528,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10603,12 +10546,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10616,9 +10559,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10652,7 +10593,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10986,7 +10927,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10994,9 +10935,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11012,10 +10951,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11030,7 +10969,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11041,10 +10980,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11059,10 +10998,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11077,7 +11016,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11088,10 +11027,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11106,10 +11045,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11124,7 +11063,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11135,10 +11074,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11153,10 +11092,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11171,7 +11110,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11182,10 +11121,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11200,10 +11139,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11218,7 +11157,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11229,10 +11168,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11247,10 +11186,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11265,7 +11204,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11276,10 +11215,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11294,10 +11233,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11312,7 +11251,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11323,10 +11262,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11341,10 +11280,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11359,7 +11298,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11369,7 +11308,6 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11398,16 +11336,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11450,10 +11389,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -11534,10 +11473,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -11786,14 +11725,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -11914,24 +11851,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -11940,16 +11864,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -11960,16 +11884,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -11980,16 +11904,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12000,16 +11924,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12020,16 +11944,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12040,16 +11964,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12060,229 +11984,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12298,10 +12228,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12332,10 +12262,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12350,10 +12280,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12384,10 +12314,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12402,10 +12332,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12436,10 +12366,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12454,10 +12384,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12488,10 +12418,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12506,10 +12436,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12540,10 +12470,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12558,10 +12488,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12592,10 +12522,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12610,10 +12540,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12644,10 +12574,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12662,10 +12592,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12690,15 +12620,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12714,10 +12642,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12743,10 +12671,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -12756,12 +12684,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12775,10 +12703,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12803,10 +12731,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -12816,11 +12744,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12834,10 +12762,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12863,10 +12791,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -12876,11 +12804,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12894,10 +12822,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12923,10 +12851,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -12936,11 +12864,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12954,10 +12882,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12983,10 +12911,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -12996,11 +12924,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13014,10 +12942,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13043,10 +12971,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -13056,11 +12984,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13074,10 +13002,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13103,10 +13031,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -13116,11 +13044,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13134,10 +13062,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13163,10 +13091,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -13175,8 +13103,7 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13188,7 +13115,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13204,6 +13131,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13246,8 +13174,7 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13259,7 +13186,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13275,6 +13202,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13317,8 +13245,7 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13330,7 +13257,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13346,6 +13273,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13393,8 +13321,7 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13406,7 +13333,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13422,6 +13349,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13465,10 +13393,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -13477,8 +13405,7 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13490,7 +13417,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13506,6 +13433,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13548,8 +13476,7 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13561,7 +13488,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13577,6 +13504,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13619,8 +13547,7 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13632,7 +13559,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13648,6 +13575,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13690,8 +13618,7 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13703,7 +13630,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13719,6 +13646,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13756,15 +13684,13 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13798,16 +13724,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -13817,12 +13743,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13854,15 +13780,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -13872,11 +13798,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13908,16 +13834,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -13927,11 +13853,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13963,16 +13889,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -13982,11 +13908,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14018,16 +13944,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -14037,11 +13963,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14073,16 +13999,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -14092,11 +14018,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14128,16 +14054,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -14147,11 +14073,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14183,28 +14109,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14238,16 +14162,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -14257,12 +14181,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14294,15 +14218,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -14312,11 +14236,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14348,16 +14272,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -14367,11 +14291,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14403,16 +14327,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -14422,11 +14346,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14458,16 +14382,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -14477,11 +14401,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14513,16 +14437,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -14532,11 +14456,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14568,16 +14492,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -14587,11 +14511,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14623,31 +14547,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xde 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14661,10 +14585,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -14689,18 +14613,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14708,9 +14635,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14744,16 +14669,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -14800,15 +14725,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -14854,16 +14779,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -14909,16 +14834,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -14964,16 +14889,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -15019,16 +14944,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -15074,16 +14999,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -15129,20 +15054,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15150,9 +15075,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15168,10 +15091,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15186,16 +15109,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -15205,12 +15128,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15224,10 +15147,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15242,15 +15165,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -15260,11 +15183,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15278,10 +15201,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15296,16 +15219,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -15315,11 +15238,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15333,10 +15256,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15351,16 +15274,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -15370,11 +15293,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15388,10 +15311,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15406,16 +15329,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -15425,11 +15348,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15443,10 +15366,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15461,16 +15384,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -15480,11 +15403,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15498,10 +15421,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15516,16 +15439,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -15535,11 +15458,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15553,10 +15476,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15571,20 +15494,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15592,9 +15515,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15628,16 +15549,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -15684,15 +15605,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -15738,16 +15659,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -15793,18 +15714,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" - ] - }, + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, "fdivrp st4, st0": { "ExpectedInstructionCount": 47, "Comment": [ @@ -15848,16 +15769,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -15903,16 +15824,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -15958,16 +15879,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -16013,20 +15934,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16034,9 +15955,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16052,10 +15971,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16070,16 +15989,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -16089,12 +16008,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16108,10 +16027,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16126,15 +16045,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -16144,11 +16063,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16162,10 +16081,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16180,16 +16099,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -16199,11 +16118,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16217,10 +16136,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16235,16 +16154,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -16254,11 +16173,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16272,10 +16191,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16290,16 +16209,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -16309,11 +16228,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16327,10 +16246,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16345,16 +16264,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -16364,11 +16283,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16382,10 +16301,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16400,16 +16319,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -16419,11 +16338,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16437,10 +16356,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16455,59 +16374,58 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" - ] - }, - "fild word [rax]": { - "ExpectedInstructionCount": 35, - "Comment": [ - "0xdf !11b /0" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" + ] + }, + "fild word [rax]": { + "ExpectedInstructionCount": 34, + "Comment": [ + "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "mov w23, #0x0", - "sxth x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16550,10 +16468,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -16634,10 +16552,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -16646,14 +16564,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16683,9 +16593,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16732,10 +16650,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -16854,15 +16772,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 51, + "ExpectedInstructionCount": 49, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16878,10 +16794,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16906,10 +16822,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st1": { @@ -16919,12 +16835,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16938,10 +16854,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16965,10 +16881,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st2": { @@ -16978,11 +16894,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16996,10 +16912,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17024,10 +16940,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st3": { @@ -17037,11 +16953,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17055,10 +16971,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17083,10 +16999,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st4": { @@ -17096,11 +17012,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17114,10 +17030,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17142,10 +17058,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st5": { @@ -17155,11 +17071,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17173,10 +17089,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17201,10 +17117,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st6": { @@ -17214,11 +17130,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17232,10 +17148,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17260,10 +17176,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st7": { @@ -17273,11 +17189,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17291,10 +17207,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17319,22 +17235,20 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st0": { - "ExpectedInstructionCount": 51, + "ExpectedInstructionCount": 49, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17350,10 +17264,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17378,10 +17292,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st1": { @@ -17391,12 +17305,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17410,10 +17324,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17437,10 +17351,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st2": { @@ -17450,11 +17364,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17468,10 +17382,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17496,10 +17410,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st3": { @@ -17509,11 +17423,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17527,10 +17441,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17555,10 +17469,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st4": { @@ -17568,11 +17482,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17586,10 +17500,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17614,10 +17528,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st5": { @@ -17627,11 +17541,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17645,10 +17559,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17673,10 +17587,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st6": { @@ -17686,11 +17600,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17704,11 +17618,11 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1504]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", @@ -17732,10 +17646,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st7": { @@ -17745,11 +17659,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17763,10 +17677,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17791,14 +17705,14 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 287, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -17810,595 +17724,59 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", + "ldr s2, [x4, #12]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" + ] + }, + "memcpy4_64": { + "ExpectedInstructionCount": 19, + "x86Insts": [ + "fld qword [rax]", + "fstp qword [rdx]", + "fld qword [rax + 8]", + "fstp qword [rdx + 8]", + "fld qword [rax + 16]", + "fstp qword [rdx + 16]", + "fld qword [rax + 32]", + "fstp qword [rdx + 32]" + ], + "ExpectedArm64ASM": [ + "ldr d2, [x4]", + "str d2, [x6]", + "ldr d2, [x4, #8]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", + "ldr d2, [x4, #16]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", + "ldr d2, [x4, #32]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "memcpy4_64": { - "ExpectedInstructionCount": 287, - "x86Insts": [ - "fld qword [rax]", - "fstp qword [rdx]", - "fld qword [rax + 8]", - "fstp qword [rdx + 8]", - "fld qword [rax + 16]", - "fstp qword [rdx + 16]", - "fld qword [rax + 32]", - "fstp qword [rdx + 32]" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr d2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index 6008934077..7dcb374e95 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -21,9 +21,9 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -37,9 +37,9 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -53,9 +53,9 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -75,9 +75,9 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -93,10 +93,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -105,9 +105,9 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -121,9 +121,9 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -137,9 +137,9 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -153,9 +153,9 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -164,20 +164,18 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -308,20 +306,18 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -452,15 +448,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 16, + "ExpectedInstructionCount": 14, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -644,15 +638,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 24, + "ExpectedInstructionCount": 22, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -669,10 +661,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -701,10 +693,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -733,10 +725,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -765,10 +757,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -797,10 +789,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -829,10 +821,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -861,10 +853,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -893,27 +885,25 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1044,20 +1034,18 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1068,13 +1056,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1086,13 +1074,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1104,13 +1092,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1122,13 +1110,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1140,13 +1128,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1158,13 +1146,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1176,32 +1164,30 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1332,20 +1318,18 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1356,13 +1340,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1374,13 +1358,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1392,13 +1376,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1410,13 +1394,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1428,13 +1412,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1446,13 +1430,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1464,13 +1448,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1481,19 +1465,19 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1524,10 +1508,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { @@ -1693,26 +1677,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -1729,13 +1711,13 @@ "ldr d2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -1752,13 +1734,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -1775,13 +1757,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -1798,13 +1780,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -1821,13 +1803,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -1844,13 +1826,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -1867,33 +1849,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -1903,17 +1874,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -1923,17 +1894,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -1943,17 +1914,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -1963,17 +1934,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -1983,17 +1954,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -2003,17 +1974,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -2023,17 +1994,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -2094,7 +2065,7 @@ ] }, "fxam": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd9 11b 0xe5 /4" ], @@ -2107,16 +2078,14 @@ "strb w21, [x28, #1017]", "ldrb w21, [x28, #1298]", "lsr w20, w21, w20", - "mov w21, #0x1", "and w20, w20, #0x1", - "mov w22, #0x0", - "mrs x23, nzcv", + "mrs x21, nzcv", "cmp x20, #0x1 (1)", - "csel x21, x22, x21, eq", - "strb w21, [x28, #1016]", + "cset x22, ne", + "strb w22, [x28, #1016]", "strb w20, [x28, #1018]", - "strb w21, [x28, #1022]", - "msr nzcv, x23" + "strb w22, [x28, #1022]", + "msr nzcv, x21" ] }, "fld1": { @@ -2125,19 +2094,19 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x3ff0000000000000", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -2146,22 +2115,22 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0xa372", + "movk x20, #0x979, lsl #16", + "movk x20, #0x934f, lsl #32", + "movk x20, #0x400a, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0xa372", - "movk x22, #0x979, lsl #16", - "movk x22, #0x934f, lsl #32", - "movk x22, #0x400a, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -2170,22 +2139,22 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x82fe", + "movk x20, #0x652b, lsl #16", + "movk x20, #0x1547, lsl #32", + "movk x20, #0x3ff7, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x82fe", - "movk x22, #0x652b, lsl #16", - "movk x22, #0x1547, lsl #32", - "movk x22, #0x3ff7, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -2194,22 +2163,22 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x2d18", + "movk x20, #0x5444, lsl #16", + "movk x20, #0x21fb, lsl #32", + "movk x20, #0x4009, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x2d18", - "movk x22, #0x5444, lsl #16", - "movk x22, #0x21fb, lsl #32", - "movk x22, #0x4009, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -2218,22 +2187,22 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x79ff", + "movk x20, #0x509f, lsl #16", + "movk x20, #0x4413, lsl #32", + "movk x20, #0x3fd3, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x79ff", - "movk x22, #0x509f, lsl #16", - "movk x22, #0x4413, lsl #32", - "movk x22, #0x3fd3, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -2242,22 +2211,22 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x39ef", + "movk x20, #0xfefa, lsl #16", + "movk x20, #0x2e42, lsl #32", + "movk x20, #0x3fe6, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x39ef", - "movk x22, #0xfefa, lsl #16", - "movk x22, #0x2e42, lsl #32", - "movk x22, #0x3fe6, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -2266,19 +2235,19 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "mov w20, #0x0", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -2346,25 +2315,20 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2415,9 +2379,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -2427,13 +2393,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2487,33 +2446,35 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x23, #0x3ff0000000000000", - "fmov d3, x23", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "mov x21, #0x3ff0000000000000", + "fmov d2, x21", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2567,9 +2528,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -2579,28 +2542,28 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x23, v2.d[0]", - "and x24, x23, #0x7ff0000000000000", - "lsr x24, x24, #52", - "sub x24, x24, #0x3ff (1023)", - "scvtf d2, x24", - "and x23, x23, #0x800fffffffffffff", - "orr x23, x23, #0x3ff0000000000000", - "fmov d3, x23", + "mov x21, v2.d[0]", + "and x22, x21, #0x7ff0000000000000", + "lsr x22, x22, #52", + "sub x22, x22, #0x3ff (1023)", + "scvtf d2, x22", + "and x21, x21, #0x800fffffffffffff", + "orr x21, x21, #0x3ff0000000000000", + "fmov d3, x21", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -2612,12 +2575,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2668,9 +2631,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -2706,12 +2669,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2762,34 +2725,33 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "fadd d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov x20, #0x3ff0000000000000", - "fmov d4, x20", - "fadd d2, d2, d4", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2840,9 +2802,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -2866,13 +2830,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2977,12 +2934,19 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -3008,12 +2972,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3128,9 +3092,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -3193,9 +3157,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -3204,9 +3168,9 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -3220,9 +3184,9 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -3236,9 +3200,9 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3258,9 +3222,9 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3276,10 +3240,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -3288,9 +3252,9 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -3304,9 +3268,9 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -3320,9 +3284,9 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -3336,9 +3300,9 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -3347,7 +3311,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -3355,15 +3319,13 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st1": { @@ -3377,13 +3339,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st2": { @@ -3397,13 +3359,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st3": { @@ -3417,13 +3379,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st4": { @@ -3437,14 +3399,14 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" - ] + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" + ] }, "fcmovb st0, st5": { "ExpectedInstructionCount": 12, @@ -3457,13 +3419,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st6": { @@ -3477,13 +3439,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st7": { @@ -3497,17 +3459,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -3515,15 +3477,13 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st1": { @@ -3537,13 +3497,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st2": { @@ -3557,13 +3517,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st3": { @@ -3577,13 +3537,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st4": { @@ -3597,13 +3557,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st5": { @@ -3617,13 +3577,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st6": { @@ -3637,13 +3597,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st7": { @@ -3657,17 +3617,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -3677,15 +3637,13 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st1": { @@ -3701,13 +3659,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st2": { @@ -3723,13 +3681,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st3": { @@ -3745,13 +3703,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st4": { @@ -3767,13 +3725,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st5": { @@ -3789,13 +3747,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st6": { @@ -3811,13 +3769,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st7": { @@ -3833,17 +3791,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -3856,15 +3814,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3884,13 +3840,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3910,13 +3866,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3936,13 +3892,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3962,13 +3918,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3988,13 +3944,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4014,13 +3970,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4040,18 +3996,18 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 28, + "ExpectedInstructionCount": 31, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4076,14 +4032,17 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { @@ -4092,19 +4051,19 @@ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "scvtf d2, w22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4122,10 +4081,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -4158,10 +4117,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -4170,7 +4129,6 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4198,16 +4156,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4253,14 +4212,14 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -4268,15 +4227,13 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st1": { @@ -4290,13 +4247,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st2": { @@ -4310,13 +4267,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st3": { @@ -4330,13 +4287,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st4": { @@ -4350,13 +4307,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st5": { @@ -4370,13 +4327,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st6": { @@ -4390,13 +4347,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st7": { @@ -4410,17 +4367,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -4428,15 +4385,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st1": { @@ -4450,13 +4405,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st2": { @@ -4470,13 +4425,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st3": { @@ -4490,13 +4445,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st4": { @@ -4510,13 +4465,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st5": { @@ -4530,13 +4485,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st6": { @@ -4550,13 +4505,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st7": { @@ -4570,17 +4525,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -4589,15 +4544,13 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st1": { @@ -4612,13 +4565,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st2": { @@ -4633,13 +4586,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st3": { @@ -4654,13 +4607,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st4": { @@ -4675,13 +4628,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st5": { @@ -4696,13 +4649,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st6": { @@ -4717,13 +4670,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st7": { @@ -4738,17 +4691,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -4761,15 +4714,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4789,13 +4740,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4815,13 +4766,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4841,13 +4792,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4867,13 +4818,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4893,13 +4844,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4919,13 +4870,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4945,13 +4896,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4987,15 +4938,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 11, + "ExpectedInstructionCount": 9, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5139,15 +5088,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 11, + "ExpectedInstructionCount": 9, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5296,8 +5243,8 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -5311,8 +5258,8 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -5326,8 +5273,8 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5347,8 +5294,8 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5364,10 +5311,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -5376,8 +5323,8 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -5391,8 +5338,8 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -5406,8 +5353,8 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -5421,8 +5368,8 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -5431,7 +5378,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5439,14 +5386,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5457,14 +5402,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5475,14 +5420,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5493,14 +5438,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5511,14 +5456,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5529,14 +5474,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5547,14 +5492,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5565,19 +5510,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5585,14 +5530,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5603,14 +5546,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5621,14 +5564,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5639,14 +5582,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5657,14 +5600,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5675,14 +5618,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5693,14 +5636,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5711,19 +5654,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5731,14 +5674,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5869,7 +5810,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5877,14 +5818,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5895,14 +5834,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5913,14 +5852,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5931,14 +5870,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5949,14 +5888,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5967,14 +5906,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5985,14 +5924,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6003,19 +5942,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6023,14 +5962,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6161,7 +6098,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6169,14 +6106,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6187,14 +6122,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6205,14 +6140,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6223,14 +6158,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6241,14 +6176,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6259,14 +6194,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6277,14 +6212,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6295,14 +6230,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6312,18 +6247,18 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6341,10 +6276,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -6373,10 +6308,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -7059,14 +6994,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -7187,24 +7120,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -7213,16 +7133,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -7233,16 +7153,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7253,16 +7173,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7273,16 +7193,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7293,16 +7213,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7313,16 +7233,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7333,229 +7253,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 16, + "ExpectedInstructionCount": 14, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7739,15 +7665,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 24, + "ExpectedInstructionCount": 22, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7764,10 +7688,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -7796,10 +7720,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -7828,10 +7752,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -7860,10 +7784,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -7892,10 +7816,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -7924,10 +7848,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -7956,10 +7880,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -7988,10 +7912,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -8000,10 +7924,10 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -8017,10 +7941,10 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -8034,10 +7958,10 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8057,10 +7981,10 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8076,10 +8000,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -8088,10 +8012,10 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -8105,10 +8029,10 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -8122,10 +8046,10 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -8139,10 +8063,10 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -8151,29 +8075,27 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -8183,23 +8105,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -8209,23 +8131,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -8235,23 +8157,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -8261,23 +8183,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -8287,23 +8209,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -8313,23 +8235,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -8339,49 +8261,47 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -8391,23 +8311,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -8417,23 +8337,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -8443,23 +8363,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -8469,23 +8389,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -8495,23 +8415,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -8521,23 +8441,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -8547,27 +8467,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 28, + "ExpectedInstructionCount": 31, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8592,18 +8512,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8611,23 +8534,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -8645,15 +8566,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -8670,16 +8591,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -8696,16 +8617,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -8722,16 +8643,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -8748,16 +8669,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -8774,16 +8695,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -8800,20 +8721,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8821,23 +8742,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -8847,23 +8766,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fsub d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -8873,23 +8792,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -8899,23 +8818,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -8925,23 +8844,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -8951,23 +8870,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -8977,23 +8896,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -9003,27 +8922,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9031,23 +8950,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -9065,15 +8982,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -9090,16 +9007,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -9116,16 +9033,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -9142,16 +9059,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -9168,16 +9085,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -9194,16 +9111,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -9220,20 +9137,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9241,23 +9158,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -9267,23 +9182,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fdiv d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -9293,23 +9208,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -9319,23 +9234,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -9345,23 +9260,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -9371,23 +9286,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x21, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -9397,23 +9312,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -9423,23 +9338,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { @@ -9448,20 +9363,20 @@ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "sxth x22, w22", - "scvtf d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9479,10 +9394,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -9515,10 +9430,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -9527,14 +9442,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9590,9 +9497,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9666,10 +9581,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -9788,15 +9703,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 19, + "ExpectedInstructionCount": 17, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -9808,10 +9721,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st1": { @@ -9835,10 +9748,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st2": { @@ -9862,10 +9775,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st3": { @@ -9889,10 +9802,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st4": { @@ -9916,10 +9829,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st5": { @@ -9943,10 +9856,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st6": { @@ -9970,10 +9883,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomip st7": { @@ -9997,22 +9910,20 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st0": { - "ExpectedInstructionCount": 19, + "ExpectedInstructionCount": 17, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10024,10 +9935,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st1": { @@ -10051,10 +9962,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st2": { @@ -10078,10 +9989,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st3": { @@ -10105,10 +10016,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st4": { @@ -10132,10 +10043,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st5": { @@ -10159,10 +10070,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st6": { @@ -10186,10 +10097,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomip st7": { @@ -10213,14 +10124,14 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 83, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -10232,93 +10143,29 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "fcvt d2, s2", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", "ldr s2, [x4, #12]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] }, "memcpy4_64": { - "ExpectedInstructionCount": 75, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld qword [rax]", "fstp qword [rdx]", @@ -10330,81 +10177,25 @@ "fstp qword [rdx + 32]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr d2, [x4, #8]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", "ldr d2, [x4, #16]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", "ldr d2, [x4, #32]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 0f133c7449..412dc3dcc3 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -18,7 +18,6 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47,6 +46,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -89,7 +89,6 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -118,6 +117,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -160,7 +160,6 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -189,6 +188,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -236,7 +236,6 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -265,6 +264,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -308,10 +308,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -320,7 +320,6 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -349,6 +348,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -391,7 +391,6 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -420,6 +419,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -462,7 +462,6 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -491,6 +490,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -533,7 +533,6 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -562,6 +561,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -599,15 +599,13 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -641,7 +639,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -975,15 +973,13 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1017,7 +1013,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -1351,15 +1347,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1375,10 +1369,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1409,10 +1403,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1427,10 +1421,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1461,10 +1455,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1479,10 +1473,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1513,10 +1507,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1531,10 +1525,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1565,10 +1559,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1583,10 +1577,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1617,10 +1611,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1635,10 +1629,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1669,10 +1663,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1687,10 +1681,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1721,10 +1715,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -1739,10 +1733,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1767,15 +1761,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1791,10 +1783,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1820,10 +1812,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -1833,12 +1825,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1852,10 +1844,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1880,10 +1872,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -1893,11 +1885,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1911,10 +1903,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -1940,10 +1932,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -1953,11 +1945,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1971,10 +1963,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2000,10 +1992,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -2013,11 +2005,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2031,10 +2023,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2060,10 +2052,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -2073,11 +2065,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2091,10 +2083,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2120,10 +2112,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -2133,11 +2125,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2151,10 +2143,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2180,10 +2172,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -2193,11 +2185,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2211,10 +2203,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -2240,22 +2232,20 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2271,10 +2261,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2289,7 +2279,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2623,15 +2613,13 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2665,7 +2653,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -2676,11 +2664,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2694,10 +2682,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2723,11 +2711,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2741,10 +2729,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2770,11 +2758,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2788,10 +2776,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2817,11 +2805,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2835,10 +2823,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2864,11 +2852,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2882,10 +2870,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2911,11 +2899,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2929,10 +2917,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2958,11 +2946,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2976,10 +2964,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -2999,15 +2987,13 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3023,10 +3009,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3041,7 +3027,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3375,15 +3361,13 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3417,7 +3401,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -3428,11 +3412,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3446,10 +3430,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3475,11 +3459,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3493,10 +3477,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3522,11 +3506,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3540,10 +3524,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3569,11 +3553,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3587,10 +3571,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3616,11 +3600,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3634,10 +3618,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3663,11 +3647,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3681,10 +3665,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3710,11 +3694,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3728,10 +3712,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -3756,7 +3740,6 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3785,16 +3768,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3875,21 +3859,22 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { - "ExpectedInstructionCount": 48, + "ExpectedInstructionCount": 50, "Comment": [ "0xd9 !11b /4" ], "ExpectedArm64ASM": [ "ldrh w20, [x4]", "strh w20, [x28, #1296]", - "ldr w20, [x4, #4]", + "add x20, x4, #0x4 (4)", + "ldr w20, [x20]", "ubfx w21, w20, #11, #3", "strb w21, [x28, #1019]", "ubfx w21, w20, #8, #1", @@ -3900,7 +3885,8 @@ "strb w22, [x28, #1017]", "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", - "ldr w20, [x4, #8]", + "add x20, x4, #0x8 (8)", + "ldr w20, [x20]", "ubfx w21, w20, #0, #2", "mrs x22, nzcv", "cmp x21, #0x3 (3)", @@ -4028,26 +4014,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -4064,13 +4048,13 @@ "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -4087,13 +4071,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -4110,13 +4094,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -4133,13 +4117,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -4156,14 +4140,14 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" - ] + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" + ] }, "fld st6": { "ExpectedInstructionCount": 15, @@ -4179,13 +4163,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -4202,33 +4186,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -4238,17 +4211,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -4258,17 +4231,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -4278,17 +4251,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -4298,17 +4271,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -4318,17 +4291,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -4338,17 +4311,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -4358,17 +4331,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -4494,18 +4467,18 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2608]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -4514,18 +4487,18 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2624]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2624]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -4534,18 +4507,18 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2640]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2640]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -4554,18 +4527,18 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2656]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2656]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -4574,18 +4547,18 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2672]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -4594,18 +4567,18 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2688]", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -4614,18 +4587,18 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "movi v2.2d, #0x0", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -4670,22 +4643,17 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4699,10 +4667,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -4717,9 +4685,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -4729,13 +4699,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4766,32 +4729,34 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldr q3, [x28, #2608]", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldr q2, [x28, #2608]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 45, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4823,9 +4788,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -4835,13 +4802,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -4902,9 +4862,16 @@ "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -4916,9 +4883,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4932,10 +4899,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1656]", "blr x5", "ldr w4, [x28, #1000]", @@ -4950,9 +4917,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -4988,9 +4955,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5004,10 +4971,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1664]", "blr x5", "ldr w4, [x28, #1000]", @@ -5022,30 +4989,21 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 77, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "ldr q2, [x28, #2608]", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", - "ldr q4, [x28, #2608]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5058,10 +5016,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v4.d[0]", - "umov w4, v4.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1608]", "blr x5", "ldr w4, [x28, #1000]", @@ -5076,22 +5034,30 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "stp x16, x17, [x28, #376]", "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1640]", "blr x5", "ldr w4, [x28, #1000]", @@ -5106,9 +5072,11 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -5159,13 +5127,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -5224,12 +5185,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -5282,9 +5250,9 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5298,10 +5266,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1672]", "blr x5", "ldr w4, [x28, #1000]", @@ -5357,9 +5325,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -5399,9 +5367,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -5410,8 +5378,7 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5423,7 +5390,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5439,6 +5406,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5481,8 +5449,7 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5494,7 +5461,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5510,6 +5477,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5552,8 +5520,7 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5565,7 +5532,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5581,6 +5548,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5628,8 +5596,7 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5641,7 +5608,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5657,6 +5624,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5700,10 +5668,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -5712,8 +5680,7 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5725,7 +5692,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5741,6 +5708,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5783,8 +5751,7 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5796,7 +5763,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5812,6 +5779,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5854,8 +5822,7 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5867,7 +5834,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5883,6 +5850,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5925,8 +5893,7 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", + "ldr w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5938,7 +5905,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "mov w1, w21", + "mov w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1520]", "blr x2", @@ -5954,6 +5921,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -5991,7 +5959,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -5999,13 +5967,11 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6021,11 +5987,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6041,11 +6007,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6061,11 +6027,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6081,11 +6047,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6101,11 +6067,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6121,11 +6087,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6141,17 +6107,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -6159,13 +6125,11 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6181,11 +6145,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6201,11 +6165,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6221,11 +6185,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6241,11 +6205,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6261,11 +6225,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6281,11 +6245,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6301,17 +6265,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -6321,13 +6285,11 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6345,11 +6307,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6367,11 +6329,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6389,11 +6351,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6411,11 +6373,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6433,11 +6395,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6455,11 +6417,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -6477,17 +6439,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -6500,13 +6462,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6528,11 +6488,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6554,11 +6514,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6580,11 +6540,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6606,11 +6566,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6632,11 +6592,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6658,11 +6618,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -6684,29 +6644,29 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xda 11b 0xe9 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6720,10 +6680,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -6748,57 +6708,59 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "sxtw x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6841,10 +6803,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -6925,10 +6887,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -6937,22 +6899,22 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb !11b /7" ], @@ -6962,19 +6924,20 @@ "ldr q2, [x0, #1040]", "str d2, [x4]", "mov x21, v2.d[1]", - "strh w21, [x4, #8]", + "add x22, x4, #0x8 (8)", + "strh w21, [x22]", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -6982,13 +6945,11 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7004,11 +6965,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7024,11 +6985,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7044,11 +7005,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7064,11 +7025,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7084,11 +7045,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7104,11 +7065,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7124,17 +7085,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -7142,13 +7103,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7164,11 +7123,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7184,11 +7143,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7204,11 +7163,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7224,11 +7183,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7244,11 +7203,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7264,11 +7223,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7284,17 +7243,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -7303,13 +7262,11 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7326,11 +7283,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7347,11 +7304,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7368,11 +7325,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7389,11 +7346,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7410,11 +7367,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7431,11 +7388,11 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] @@ -7452,17 +7409,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -7475,13 +7432,11 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7503,11 +7458,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7529,11 +7484,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7555,11 +7510,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7581,11 +7536,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7607,11 +7562,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7633,11 +7588,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7659,11 +7614,11 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "msr nzcv, x21" @@ -7693,15 +7648,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7717,10 +7670,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7751,10 +7704,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7769,10 +7722,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7803,10 +7756,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7821,10 +7774,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7855,10 +7808,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7873,10 +7826,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7907,10 +7860,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7925,10 +7878,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -7959,10 +7912,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -7977,10 +7930,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8011,10 +7964,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8029,10 +7982,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8063,10 +8016,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8081,10 +8034,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8109,15 +8062,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8133,10 +8084,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8167,10 +8118,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8185,10 +8136,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8219,10 +8170,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8237,10 +8188,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8271,10 +8222,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8289,10 +8240,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8323,10 +8274,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8341,10 +8292,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8375,10 +8326,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8393,10 +8344,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8427,10 +8378,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8445,10 +8396,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8479,10 +8430,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8497,10 +8448,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -8530,7 +8481,6 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8559,6 +8509,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8601,7 +8552,6 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8630,6 +8580,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8672,7 +8623,6 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8701,6 +8651,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8748,7 +8699,6 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8777,6 +8727,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8820,10 +8771,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -8832,7 +8783,6 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8861,6 +8811,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8903,7 +8854,6 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8932,6 +8882,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -8974,7 +8925,6 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9003,6 +8953,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9045,7 +8996,6 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9074,6 +9024,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9111,7 +9062,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9119,9 +9070,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9155,7 +9104,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9166,10 +9115,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9202,7 +9151,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9213,10 +9162,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9249,7 +9198,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9260,10 +9209,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9296,7 +9245,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9307,10 +9256,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9343,7 +9292,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9354,10 +9303,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9390,7 +9339,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9401,10 +9350,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9437,7 +9386,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9448,10 +9397,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9484,12 +9433,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9497,9 +9446,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9533,7 +9480,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9544,10 +9491,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9580,7 +9527,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9591,10 +9538,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9627,7 +9574,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9638,10 +9585,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9674,7 +9621,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9685,10 +9632,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9721,7 +9668,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9732,10 +9679,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9768,7 +9715,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9779,10 +9726,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9815,7 +9762,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -9826,10 +9773,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -9862,12 +9809,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9875,9 +9822,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9911,7 +9856,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10245,7 +10190,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10253,9 +10198,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10271,12 +10214,12 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1616]", - "blr x5", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1616]", + "blr x5", "ldr w4, [x28, #1000]", "msr nzcv, x4", "ldp x4, x5, [x28, #280]", @@ -10289,7 +10232,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10300,10 +10243,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10318,10 +10261,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10336,7 +10279,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10347,10 +10290,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10365,10 +10308,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10383,7 +10326,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10394,10 +10337,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10412,10 +10355,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10430,7 +10373,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10441,10 +10384,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10459,10 +10402,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10477,7 +10420,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10488,10 +10431,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10506,10 +10449,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10524,7 +10467,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10535,10 +10478,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10553,10 +10496,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10571,7 +10514,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -10582,10 +10525,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -10600,10 +10543,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -10618,12 +10561,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -10631,9 +10574,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10667,7 +10608,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11001,7 +10942,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 39, + "ExpectedInstructionCount": 37, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -11009,9 +10950,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11027,10 +10966,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11045,7 +10984,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11056,10 +10995,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11074,10 +11013,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11092,7 +11031,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11103,10 +11042,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11121,10 +11060,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11139,7 +11078,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11150,10 +11089,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11168,10 +11107,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11186,7 +11125,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11197,10 +11136,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11215,10 +11154,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11233,7 +11172,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11244,10 +11183,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11262,10 +11201,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11280,7 +11219,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11291,10 +11230,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11309,10 +11248,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11327,7 +11266,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11338,10 +11277,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -11356,10 +11295,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -11374,7 +11313,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]" ] }, @@ -11384,7 +11323,6 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11413,16 +11351,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11465,10 +11404,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -11549,10 +11488,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -11801,14 +11740,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -11929,24 +11866,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -11955,16 +11879,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -11975,16 +11899,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -11995,16 +11919,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12015,16 +11939,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12035,16 +11959,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12055,16 +11979,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -12075,229 +11999,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x2 (2)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x3 (3)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x4 (4)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x5 (5)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x6 (6)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w21, w20, #0x7 (7)", + "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 44, + "ExpectedInstructionCount": 42, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12313,10 +12243,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12347,10 +12277,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12365,10 +12295,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12399,10 +12329,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12417,10 +12347,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12451,10 +12381,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12469,10 +12399,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12503,10 +12433,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12521,10 +12451,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12555,10 +12485,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12573,10 +12503,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12607,10 +12537,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12625,10 +12555,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12659,10 +12589,10 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -12677,10 +12607,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12705,15 +12635,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12729,10 +12657,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12758,10 +12686,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -12771,12 +12699,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12790,10 +12718,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12818,10 +12746,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -12831,11 +12759,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12849,10 +12777,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12878,10 +12806,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -12891,11 +12819,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12909,10 +12837,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12938,10 +12866,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -12951,11 +12879,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12969,10 +12897,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -12998,10 +12926,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -13011,11 +12939,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13029,10 +12957,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13058,10 +12986,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -13071,11 +12999,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13089,10 +13017,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13118,10 +13046,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -13131,11 +13059,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13149,10 +13077,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -13178,10 +13106,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -13190,8 +13118,7 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13203,7 +13130,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13219,6 +13146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13261,8 +13189,7 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13274,7 +13201,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13290,6 +13217,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13332,8 +13260,7 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13345,7 +13272,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13361,6 +13288,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13408,8 +13336,7 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13421,7 +13348,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13437,6 +13364,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13480,10 +13408,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -13492,8 +13420,7 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13505,7 +13432,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13521,6 +13448,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13563,8 +13491,7 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13576,7 +13503,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13592,6 +13519,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13634,8 +13562,7 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13647,7 +13574,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13663,6 +13590,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13705,8 +13633,7 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", + "ldrh w20, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -13718,7 +13645,7 @@ "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", - "sxth w1, w21", + "sxth w1, w20", "ldrh w0, [x28, #1296]", "ldr x2, [x28, #1512]", "blr x2", @@ -13734,6 +13661,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -13771,15 +13699,13 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13813,16 +13739,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -13832,12 +13758,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13869,15 +13795,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -13887,11 +13813,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13923,16 +13849,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -13942,11 +13868,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13978,16 +13904,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -13997,11 +13923,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14033,16 +13959,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -14052,11 +13978,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14088,16 +14014,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -14107,11 +14033,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14143,16 +14069,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -14162,11 +14088,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14198,28 +14124,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14253,16 +14177,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -14272,12 +14196,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14309,15 +14233,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -14327,11 +14251,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14363,16 +14287,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -14382,11 +14306,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14418,16 +14342,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -14437,11 +14361,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14473,16 +14397,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -14492,11 +14416,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14528,16 +14452,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -14547,11 +14471,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14583,16 +14507,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -14602,11 +14526,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14638,31 +14562,31 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 59, "Comment": [ "0xde 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14676,10 +14600,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -14704,18 +14628,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14723,9 +14650,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14759,16 +14684,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -14815,15 +14740,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -14869,16 +14794,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -14924,16 +14849,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -14979,16 +14904,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -15034,16 +14959,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -15089,16 +15014,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -15144,20 +15069,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15165,9 +15090,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15183,10 +15106,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15201,16 +15124,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -15220,12 +15143,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15239,10 +15162,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15257,15 +15180,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -15275,11 +15198,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15293,10 +15216,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15311,16 +15234,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -15330,11 +15253,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15348,10 +15271,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15366,16 +15289,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -15385,11 +15308,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15403,10 +15326,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15421,16 +15344,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -15440,11 +15363,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15458,10 +15381,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15476,16 +15399,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -15495,11 +15418,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15513,10 +15436,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15531,16 +15454,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -15550,11 +15473,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15568,10 +15491,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1616]", "blr x5", "ldr w4, [x28, #1000]", @@ -15586,20 +15509,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15607,9 +15530,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15643,16 +15564,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -15699,15 +15620,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -15753,16 +15674,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -15808,16 +15729,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -15863,16 +15784,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -15918,16 +15839,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -15973,16 +15894,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -16028,20 +15949,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 47, + "ExpectedInstructionCount": 45, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16049,9 +15970,7 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16067,10 +15986,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16085,16 +16004,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -16104,12 +16023,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16123,10 +16042,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16141,15 +16060,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -16159,11 +16078,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16177,10 +16096,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16195,16 +16114,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -16214,11 +16133,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16232,10 +16151,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16250,16 +16169,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -16269,11 +16188,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16287,10 +16206,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16305,16 +16224,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -16324,11 +16243,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16342,10 +16261,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16360,16 +16279,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -16379,11 +16298,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16397,10 +16316,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16415,16 +16334,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -16434,11 +16353,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16452,10 +16371,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1632]", "blr x5", "ldr w4, [x28, #1000]", @@ -16470,59 +16389,58 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 35, + "ExpectedInstructionCount": 34, "Comment": [ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "mrs x21, nzcv", + "mov w22, #0x0", + "cmp x20, #0x0 (0)", + "mov w23, #0x8000", + "csel x23, x23, xzr, lt", + "cneg x20, x20, mi", + "mov w24, #0x3f", + "mov x0, #0x3f", + "clz x25, x20", + "sub x25, x0, x25", + "sub x24, x24, x25", + "lsl x25, x20, x24", + "mov w30, #0x403e", + "sub x24, x30, x24", + "cmp x20, #0x0 (0)", + "csel x20, x22, x24, eq", + "orr x20, x23, x20", + "fmov d2, x25", + "fmov d3, x20", + "mov v2.d[1], v3.d[0]", + "msr nzcv, x21", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "mov w23, #0x0", - "sxth x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w30, #0x3f", - "mov x0, #0x3f", - "clz x18, x22", - "sub x18, x0, x18", - "sub x30, x30, x18", - "lsl x18, x22, x30", - "mov w23, #0x403e", - "sub x23, x23, x30", - "mov w30, #0x0", - "cmp x22, #0x0 (0)", - "csel x22, x30, x23, eq", - "orr x22, x25, x22", - "fmov d2, x18", - "fmov d3, x22", - "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x24", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16565,10 +16483,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -16649,10 +16567,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -16661,14 +16579,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16698,9 +16608,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16747,10 +16665,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -16869,15 +16787,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16893,10 +16809,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16921,11 +16837,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st1": { @@ -16935,12 +16851,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16954,10 +16870,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -16981,11 +16897,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23", - "strb w21, [x28, #1298]" + "msr nzcv, x23" ] }, "fucomip st2": { @@ -16995,11 +16911,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17013,10 +16929,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17041,11 +16957,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st3": { @@ -17055,11 +16971,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17073,10 +16989,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17101,11 +17017,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st4": { @@ -17115,11 +17031,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17133,10 +17049,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17161,11 +17077,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st5": { @@ -17175,11 +17091,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17193,10 +17109,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17221,11 +17137,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st6": { @@ -17235,11 +17151,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17253,10 +17169,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17281,11 +17197,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st7": { @@ -17295,11 +17211,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17313,10 +17229,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17341,23 +17257,21 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st0": { - "ExpectedInstructionCount": 52, + "ExpectedInstructionCount": 50, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17373,10 +17287,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17401,11 +17315,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st1": { @@ -17415,12 +17329,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17434,10 +17348,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17461,11 +17375,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23", - "strb w21, [x28, #1298]" + "msr nzcv, x23" ] }, "fcomip st2": { @@ -17475,11 +17389,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17493,10 +17407,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17521,11 +17435,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st3": { @@ -17535,11 +17449,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17553,10 +17467,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17581,11 +17495,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st4": { @@ -17595,11 +17509,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17613,10 +17527,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17641,11 +17555,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st5": { @@ -17655,11 +17569,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17673,10 +17587,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17701,11 +17615,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st6": { @@ -17715,11 +17629,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17733,10 +17647,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17761,11 +17675,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st7": { @@ -17775,11 +17689,11 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17793,10 +17707,10 @@ "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", "str x30, [x0], #16", "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", "ldr x5, [x28, #1504]", "blr x5", "ldr w4, [x28, #1000]", @@ -17821,15 +17735,15 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 287, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -17841,595 +17755,59 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", + "ldr s2, [x4, #8]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", + "ldr s2, [x4, #12]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" + ] + }, + "memcpy4_64": { + "ExpectedInstructionCount": 19, + "x86Insts": [ + "fld qword [rax]", + "fstp qword [rdx]", + "fld qword [rax + 8]", + "fstp qword [rdx + 8]", + "fld qword [rax + 16]", + "fstp qword [rdx + 16]", + "fld qword [rax + 32]", + "fstp qword [rdx + 32]" + ], + "ExpectedArm64ASM": [ + "ldr d2, [x4]", + "str d2, [x6]", + "ldr d2, [x4, #8]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", + "ldr d2, [x4, #16]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", + "ldr d2, [x4, #32]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "fmov s2, s0", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" - ] - }, - "memcpy4_64": { - "ExpectedInstructionCount": 287, - "x86Insts": [ - "fld qword [rax]", - "fstp qword [rdx]", - "fld qword [rax + 8]", - "fstp qword [rdx + 8]", - "fld qword [rax + 16]", - "fstp qword [rdx + 16]", - "fld qword [rax + 32]", - "fstp qword [rdx + 32]" - ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "ldr d2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "stp x16, x17, [x28, #376]", - "sub sp, sp, #0x70 (112)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ldp x16, x17, [x28, #376]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index 485ee0cc25..14744f9889 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -20,9 +20,9 @@ "0xd8 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -36,9 +36,9 @@ "0xd8 !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -52,9 +52,9 @@ "0xd8 !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -75,9 +75,9 @@ "0xd8 !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -94,10 +94,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub dword [rax]": { @@ -106,9 +106,9 @@ "0xd8 !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -122,9 +122,9 @@ "0xd8 !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -138,9 +138,9 @@ "0xd8 !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -154,9 +154,9 @@ "0xd8 !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -165,20 +165,18 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -309,20 +307,18 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -453,15 +449,13 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xd8 11b 0xd0 /2" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -653,15 +647,13 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xd8 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -679,10 +671,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st1": { @@ -712,10 +704,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st2": { @@ -745,10 +737,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st3": { @@ -778,10 +770,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st4": { @@ -811,10 +803,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st5": { @@ -844,10 +836,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st6": { @@ -877,10 +869,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcomp st0, st7": { @@ -910,27 +902,25 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1061,20 +1051,18 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1085,13 +1073,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1103,13 +1091,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1121,13 +1109,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1139,13 +1127,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1157,13 +1145,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1175,13 +1163,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1193,32 +1181,30 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", + "fsub d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1349,20 +1335,18 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "0xd8 11b 0xf8 /7" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -1373,13 +1357,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1391,13 +1375,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1409,13 +1393,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1427,13 +1411,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1445,13 +1429,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1463,13 +1447,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1481,13 +1465,13 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", + "fdiv d2, d3, d2", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] @@ -1498,19 +1482,19 @@ "0xd9 !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "fcvt d2, s2", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1541,10 +1525,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fldenv [rax]": { @@ -1710,26 +1694,24 @@ ] }, "fld st0": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "0xd9 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st1": { @@ -1746,13 +1728,13 @@ "ldr d2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st2": { @@ -1769,13 +1751,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st3": { @@ -1792,13 +1774,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st4": { @@ -1815,13 +1797,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st5": { @@ -1838,13 +1820,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st6": { @@ -1861,13 +1843,13 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fld st7": { @@ -1884,33 +1866,22 @@ "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fxch st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 1, "Comment": [ "0xd9 11b 0xc8 /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "strb wzr, [x28, #1017]" ] }, "fxch st0, st1": { @@ -1920,17 +1891,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st2": { @@ -1940,17 +1911,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st3": { @@ -1960,17 +1931,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st4": { @@ -1980,17 +1951,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st5": { @@ -2000,17 +1971,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st6": { @@ -2020,17 +1991,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fxch st0, st7": { @@ -2040,17 +2011,17 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb wzr, [x28, #1017]", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", + "str d3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1017]" ] }, "fnop": { @@ -2112,7 +2083,7 @@ ] }, "fxam": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd9 11b 0xe5 /4" ], @@ -2125,16 +2096,14 @@ "strb w21, [x28, #1017]", "ldrb w21, [x28, #1298]", "lsr w20, w21, w20", - "mov w21, #0x1", "and w20, w20, #0x1", - "mov w22, #0x0", - "mrs x23, nzcv", + "mrs x21, nzcv", "cmp x20, #0x1 (1)", - "csel x21, x22, x21, eq", - "strb w21, [x28, #1016]", + "cset x22, ne", + "strb w22, [x28, #1016]", "strb w20, [x28, #1018]", - "strb w21, [x28, #1022]", - "msr nzcv, x23" + "strb w22, [x28, #1022]", + "msr nzcv, x21" ] }, "fld1": { @@ -2143,19 +2112,19 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x3ff0000000000000", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2t": { @@ -2164,22 +2133,22 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ + "mov x20, #0xa372", + "movk x20, #0x979, lsl #16", + "movk x20, #0x934f, lsl #32", + "movk x20, #0x400a, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0xa372", - "movk x22, #0x979, lsl #16", - "movk x22, #0x934f, lsl #32", - "movk x22, #0x400a, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldl2e": { @@ -2188,22 +2157,22 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x82fe", + "movk x20, #0x652b, lsl #16", + "movk x20, #0x1547, lsl #32", + "movk x20, #0x3ff7, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x82fe", - "movk x22, #0x652b, lsl #16", - "movk x22, #0x1547, lsl #32", - "movk x22, #0x3ff7, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldpi": { @@ -2212,22 +2181,22 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x2d18", + "movk x20, #0x5444, lsl #16", + "movk x20, #0x21fb, lsl #32", + "movk x20, #0x4009, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x2d18", - "movk x22, #0x5444, lsl #16", - "movk x22, #0x21fb, lsl #32", - "movk x22, #0x4009, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldlg2": { @@ -2236,22 +2205,22 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x79ff", + "movk x20, #0x509f, lsl #16", + "movk x20, #0x4413, lsl #32", + "movk x20, #0x3fd3, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x79ff", - "movk x22, #0x509f, lsl #16", - "movk x22, #0x4413, lsl #32", - "movk x22, #0x3fd3, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldln2": { @@ -2260,22 +2229,22 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ + "mov x20, #0x39ef", + "movk x20, #0xfefa, lsl #16", + "movk x20, #0x2e42, lsl #32", + "movk x20, #0x3fe6, lsl #48", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov x22, #0x39ef", - "movk x22, #0xfefa, lsl #16", - "movk x22, #0x2e42, lsl #32", - "movk x22, #0x3fe6, lsl #48", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fldz": { @@ -2284,19 +2253,19 @@ "0xd9 11b 0xee /5" ], "ExpectedArm64ASM": [ + "mov w20, #0x0", + "fmov d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "fmov d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "f2xm1": { @@ -2364,25 +2333,20 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf1 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2433,9 +2397,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fptan": { @@ -2445,13 +2411,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2505,33 +2464,35 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x23, #0x3ff0000000000000", - "fmov d3, x23", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "mov x21, #0x3ff0000000000000", + "fmov d2, x21", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "fpatan": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 64, "Comment": [ "0xd9 11b 0xf3 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2585,9 +2546,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fxtract": { @@ -2597,28 +2560,28 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x23, v2.d[0]", - "and x24, x23, #0x7ff0000000000000", - "lsr x24, x24, #52", - "sub x24, x24, #0x3ff (1023)", - "scvtf d2, x24", - "and x23, x23, #0x800fffffffffffff", - "orr x23, x23, #0x3ff0000000000000", - "fmov d3, x23", + "mov x21, v2.d[0]", + "and x22, x21, #0x7ff0000000000000", + "lsr x22, x22, #52", + "sub x22, x22, #0x3ff (1023)", + "scvtf d2, x22", + "and x21, x21, #0x800fffffffffffff", + "orr x21, x21, #0x3ff0000000000000", + "fmov d3, x21", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fprem1": { @@ -2630,12 +2593,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2686,9 +2649,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fdecstp": { @@ -2724,12 +2687,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2780,34 +2743,33 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fyl2xp1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf9 /7" ], "ExpectedArm64ASM": [ + "mov x20, #0x3ff0000000000000", + "fmov d2, x20", "ldrb w20, [x28, #1019]", - "ldrb w21, [x28, #1298]", - "mov w22, #0x1", - "lsl w22, w22, w20", - "bic w21, w21, w22", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", + "ldr d3, [x0, #1040]", + "fadd d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "add w21, w20, #0x1 (1)", + "and w21, w21, #0x7", + "add x0, x28, x21, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov x20, #0x3ff0000000000000", - "fmov d4, x20", - "fadd d2, d2, d4", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2858,9 +2820,11 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x22, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsqrt": { @@ -2884,13 +2848,6 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w21, w21, w22", - "orr w21, w23, w21", - "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "mrs x0, nzcv", @@ -2995,12 +2952,19 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]", + "strb wzr, [x28, #1018]" ] }, "frndint": { @@ -3026,12 +2990,12 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "add x0, x28, x21, lsl #4", + "ldr d2, [x0, #1040]", + "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "mov v0.8b, v2.8b", - "mov v1.8b, v3.8b", + "mov v0.8b, v3.8b", + "mov v1.8b, v2.8b", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -3146,9 +3110,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fcos": { @@ -3211,9 +3175,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "strb wzr, [x28, #1018]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb wzr, [x28, #1018]" ] }, "fiadd dword [rax]": { @@ -3222,9 +3186,9 @@ "0xda !11b /0" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -3238,9 +3202,9 @@ "0xda !11b /1" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -3254,9 +3218,9 @@ "0xda !11b /2" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3277,9 +3241,9 @@ "0xda !11b /3" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -3296,10 +3260,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub dword [rax]": { @@ -3308,9 +3272,9 @@ "0xda !11b /4" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -3324,9 +3288,9 @@ "0xda !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -3340,9 +3304,9 @@ "0xda !11b /6" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -3356,9 +3320,9 @@ "0xda !11b /7" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -3367,7 +3331,7 @@ ] }, "fcmovb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc0 /0" ], @@ -3375,15 +3339,13 @@ "csetm x20, hs", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st1": { @@ -3397,13 +3359,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st2": { @@ -3417,13 +3379,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st3": { @@ -3437,13 +3399,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st4": { @@ -3457,14 +3419,14 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" - ] + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" + ] }, "fcmovb st0, st5": { "ExpectedInstructionCount": 12, @@ -3477,13 +3439,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st6": { @@ -3497,13 +3459,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovb st0, st7": { @@ -3517,17 +3479,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmove st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xda 11b 0xc8 /1" ], @@ -3535,15 +3497,13 @@ "csetm x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st1": { @@ -3557,13 +3517,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st2": { @@ -3577,13 +3537,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st3": { @@ -3597,13 +3557,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st4": { @@ -3617,13 +3577,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st5": { @@ -3637,13 +3597,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st6": { @@ -3657,13 +3617,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmove st0, st7": { @@ -3677,17 +3637,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st0": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 12, "Comment": [ "0xda 11b 0xd0 /0" ], @@ -3697,15 +3657,13 @@ "csel x20, x20, x21, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st1": { @@ -3721,13 +3679,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st2": { @@ -3743,13 +3701,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st3": { @@ -3765,13 +3723,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st4": { @@ -3787,13 +3745,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st5": { @@ -3809,13 +3767,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st6": { @@ -3831,13 +3789,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovbe st0, st7": { @@ -3853,17 +3811,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xda 11b 0xd8 /1" ], @@ -3876,15 +3834,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3904,13 +3860,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3930,13 +3886,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3956,13 +3912,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -3982,13 +3938,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4008,13 +3964,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4034,13 +3990,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4060,18 +4016,18 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, "fucompp": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 32, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4097,14 +4053,17 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fild dword [rax]": { @@ -4113,19 +4072,19 @@ "0xdf !11b /5" ], "ExpectedArm64ASM": [ + "ldr w20, [x4]", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldr w22, [x4]", - "scvtf d2, w22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4143,10 +4102,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist dword [rax]": { @@ -4179,10 +4138,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fld tword [rax]": { @@ -4191,7 +4150,6 @@ "0xdb !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4219,16 +4177,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4274,14 +4233,14 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fcmovnb st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc0 /0" ], @@ -4289,15 +4248,13 @@ "csetm x20, lo", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st1": { @@ -4311,13 +4268,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st2": { @@ -4331,13 +4288,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st3": { @@ -4351,13 +4308,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st4": { @@ -4371,13 +4328,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st5": { @@ -4391,13 +4348,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st6": { @@ -4411,13 +4368,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnb st0, st7": { @@ -4431,17 +4388,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovne st0, st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xc8 /1" ], @@ -4449,15 +4406,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st1": { @@ -4471,13 +4426,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st2": { @@ -4491,13 +4446,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st3": { @@ -4511,13 +4466,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st4": { @@ -4531,13 +4486,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st5": { @@ -4551,13 +4506,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st6": { @@ -4571,13 +4526,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovne st0, st7": { @@ -4591,17 +4546,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st0": { - "ExpectedInstructionCount": 13, + "ExpectedInstructionCount": 11, "Comment": [ "0xdb 11b 0xd0 /2" ], @@ -4610,15 +4565,13 @@ "csel x20, x20, xzr, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st1": { @@ -4633,13 +4586,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x1 (1)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st2": { @@ -4654,13 +4607,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st3": { @@ -4675,13 +4628,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st4": { @@ -4696,13 +4649,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st5": { @@ -4717,13 +4670,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st6": { @@ -4738,13 +4691,13 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnbe st0, st7": { @@ -4759,17 +4712,17 @@ "ldrb w20, [x28, #1019]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x21, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str d2, [x0, #1040]" ] }, "fcmovnu st0, st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xdb 11b 0xd8 /3" ], @@ -4782,15 +4735,13 @@ "csetm x20, ne", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4810,13 +4761,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4836,13 +4787,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x2 (2)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4862,13 +4813,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x3 (3)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4888,13 +4839,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x4 (4)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4914,13 +4865,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x5 (5)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4940,13 +4891,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x6 (6)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -4966,13 +4917,13 @@ "ldrb w20, [x28, #1019]", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", + "ldr d3, [x0, #1040]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", + "ldr d4, [x0, #1040]", + "bsl v2.16b, v3.16b, v4.16b", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", "msr nzcv, x21" ] }, @@ -5008,15 +4959,13 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5208,15 +5157,13 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdb 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -5413,8 +5360,8 @@ "0xdc !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -5428,8 +5375,8 @@ "0xdc !11b /1" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -5443,8 +5390,8 @@ "0xdc !11b /2" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5465,8 +5412,8 @@ "0xdc !11b /3" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -5483,10 +5430,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsub qword [rax]": { @@ -5495,8 +5442,8 @@ "0xdc !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -5510,8 +5457,8 @@ "0xdc !11b /5" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -5525,8 +5472,8 @@ "0xdc !11b /6" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -5540,8 +5487,8 @@ "0xdc !11b /7" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -5550,7 +5497,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5558,14 +5505,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5576,14 +5521,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5594,14 +5539,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5612,14 +5557,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5630,14 +5575,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5648,14 +5593,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5666,14 +5611,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5684,19 +5629,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5704,14 +5649,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5722,14 +5665,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5740,14 +5683,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5758,14 +5701,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5776,14 +5719,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5794,14 +5737,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5812,14 +5755,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5830,19 +5773,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5850,14 +5793,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -5988,7 +5929,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -5996,14 +5937,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6014,14 +5953,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6032,14 +5971,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6050,14 +5989,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6068,14 +6007,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6086,14 +6025,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6104,14 +6043,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6122,19 +6061,19 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6142,14 +6081,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6280,7 +6217,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 8, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -6288,14 +6225,12 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6306,14 +6241,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6324,14 +6259,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6342,14 +6277,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6360,14 +6295,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6378,14 +6313,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6396,14 +6331,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6414,14 +6349,14 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "add x0, x28, x21, lsl #4", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]" ] }, @@ -6431,18 +6366,18 @@ "0xdd !11b /0" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", + "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6460,10 +6395,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fst qword [rax]": { @@ -6492,10 +6427,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "frstor [rax]": { @@ -7178,14 +7113,12 @@ ] }, "ffree st0": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 6, "Comment": [ "0xdd 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w20, w20, #0x0 (0)", - "and w20, w20, #0x7", "ldrb w21, [x28, #1298]", "mov w22, #0x1", "lsl w20, w22, w20", @@ -7306,24 +7239,11 @@ ] }, "fst st0": { - "ExpectedInstructionCount": 12, + "ExpectedInstructionCount": 0, "Comment": [ "0xdd 11b 0xd0 /2" ], - "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", - "strb w20, [x28, #1298]" - ] + "ExpectedArm64ASM": [] }, "fst st1": { "ExpectedInstructionCount": 12, @@ -7332,16 +7252,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", - "lsl w21, w21, w22", - "orr w20, w20, w21", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", "strb w20, [x28, #1298]" ] }, @@ -7352,16 +7272,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x2 (2)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7372,16 +7292,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x3 (3)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7392,16 +7312,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x4 (4)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x4 (4)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7412,16 +7332,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x5 (5)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x5 (5)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7432,16 +7352,16 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x6 (6)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x6 (6)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, @@ -7452,229 +7372,235 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x7 (7)", - "and w21, w21, #0x7", "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1298]", + "ldr d2, [x0, #1040]", + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", "mov w22, #0x1", - "lsl w21, w22, w21", - "orr w20, w20, w21", + "lsl w20, w22, w20", + "orr w20, w21, w20", "strb w20, [x28, #1298]" ] }, "fstp st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 11, "Comment": [ "0xdd 11b 0xd8 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w21, w23, w21", - "orr w21, w22, w21", - "lsl w22, w23, w20", - "bic w21, w21, w22", + "mov w21, #0x1", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "add w20, w20, #0x7 (7)", + "and w20, w20, #0x7", + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "bic w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xd9 /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", + "strb w22, [x28, #1298]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st2": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xda /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st3": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdb /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st4": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdc /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st5": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdd /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st6": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xde /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fstp st7": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": [ "0xdd 11b 0xdf /3" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", + "str d2, [x0, #1040]", "ldrb w22, [x28, #1298]", "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", + "strb w21, [x28, #1298]", + "ldrb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucom st0": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 15, "Comment": [ "0xdd 11b 0xe0 /4" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7866,15 +7792,13 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdd 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -7892,10 +7816,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st1": { @@ -7925,10 +7849,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st2": { @@ -7958,10 +7882,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st3": { @@ -7991,10 +7915,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st4": { @@ -8024,10 +7948,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st5": { @@ -8057,10 +7981,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st6": { @@ -8090,10 +8014,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fucomp st7": { @@ -8123,10 +8047,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fiadd word [rax]": { @@ -8135,10 +8059,10 @@ "0xde !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", @@ -8152,10 +8076,10 @@ "0xde !11b /1" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", @@ -8169,10 +8093,10 @@ "0xde !11b /2" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8193,10 +8117,10 @@ "0xde !11b /3" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fcmp d3, d2", @@ -8213,10 +8137,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fisub word [rax]": { @@ -8225,10 +8149,10 @@ "0xde !11b /4" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", @@ -8242,10 +8166,10 @@ "0xde !11b /5" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d2, d3", @@ -8259,10 +8183,10 @@ "0xde !11b /6" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", @@ -8276,10 +8200,10 @@ "0xde !11b /7" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, w20", "ldrb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, w21", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d2, d3", @@ -8288,29 +8212,27 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xd8 11b 0xc0 /0" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st1": { @@ -8320,23 +8242,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "faddp st2": { @@ -8346,23 +8268,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st3": { @@ -8372,23 +8294,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st4": { @@ -8398,23 +8320,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st5": { @@ -8424,23 +8346,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st6": { @@ -8450,23 +8372,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "faddp st7": { @@ -8476,49 +8398,47 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fadd d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "0xde 11b 0xc8 /1" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st1": { @@ -8528,23 +8448,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fmulp st2": { @@ -8554,23 +8474,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st3": { @@ -8580,23 +8500,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st4": { @@ -8606,23 +8526,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st5": { @@ -8632,23 +8552,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st6": { @@ -8658,23 +8578,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fmulp st7": { @@ -8684,27 +8604,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fmul d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fcompp": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 32, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8730,18 +8650,21 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", + "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8749,23 +8672,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st1, st0": { @@ -8783,15 +8704,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubrp st2, st0": { @@ -8808,16 +8729,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st3, st0": { @@ -8834,16 +8755,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st4, st0": { @@ -8860,16 +8781,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st5, st0": { @@ -8886,16 +8807,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st6, st0": { @@ -8912,16 +8833,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubrp st7, st0": { @@ -8938,20 +8859,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fsub d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -8959,23 +8880,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fsub d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st1, st0": { @@ -8985,23 +8904,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fsub d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fsubp st2, st0": { @@ -9011,23 +8930,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st3, st0": { @@ -9037,23 +8956,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st4, st0": { @@ -9063,23 +8982,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st5, st0": { @@ -9089,23 +9008,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st6, st0": { @@ -9115,23 +9034,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fsubp st7, st0": { @@ -9141,27 +9060,27 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fsub d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fsub d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9169,23 +9088,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st1, st0": { @@ -9203,15 +9120,15 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w23, [x28, #1298]", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivrp st2, st0": { @@ -9228,16 +9145,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st3, st0": { @@ -9254,16 +9171,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st4, st0": { @@ -9280,16 +9197,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st5, st0": { @@ -9306,16 +9223,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st6, st0": { @@ -9332,16 +9249,16 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivrp st7, st0": { @@ -9358,20 +9275,20 @@ "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", "fdiv d2, d3, d2", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 16, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -9379,23 +9296,21 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", + "fdiv d2, d3, d2", + "add x0, x28, x20, lsl #4", + "str d2, [x0, #1040]", + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st1, st0": { @@ -9405,23 +9320,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "mov w21, #0x1", "add w22, w20, #0x1 (1)", "and w22, w22, #0x7", "add x0, x28, x22, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w23, [x28, #1298]", + "fdiv d2, d3, d2", + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w23, w21", + "bic w21, w22, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fdivp st2, st0": { @@ -9431,23 +9346,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x2 (2)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st3, st0": { @@ -9457,23 +9372,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x3 (3)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st4, st0": { @@ -9483,23 +9398,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x4 (4)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st5, st0": { @@ -9509,23 +9424,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x5 (5)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st6, st0": { @@ -9535,23 +9450,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x6 (6)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fdivp st7, st0": { @@ -9561,23 +9476,23 @@ ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr d2, [x0, #1040]", "add w21, w20, #0x7 (7)", "and w21, w21, #0x7", "add x0, x28, x21, lsl #4", - "ldr d2, [x0, #1040]", - "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", - "fdiv d2, d2, d3", - "ldrb w22, [x28, #1298]", - "mov w23, #0x1", - "lsl w23, w23, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", + "fdiv d2, d3, d2", "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "strb w22, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w22, w22, w20", + "bic w21, w21, w22", + "strb w21, [x28, #1298]", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]" ] }, "fild word [rax]": { @@ -9586,20 +9501,20 @@ "0xdf !11b /0" ], "ExpectedArm64ASM": [ + "ldrh w20, [x4]", + "sxth x20, w20", + "scvtf d2, x20", "ldrb w20, [x28, #1019]", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", "strb w20, [x28, #1019]", - "ldrh w22, [x4]", - "sxth x22, w22", - "scvtf d2, x22", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9617,10 +9532,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fist word [rax]": { @@ -9653,10 +9568,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "fbld tword [rax]": { @@ -9665,14 +9580,6 @@ "0xdf !11b /4" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w21, w21, w20", - "orr w21, w22, w21", - "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9728,9 +9635,17 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", + "ldrb w20, [x28, #1019]", + "mov w21, #0x1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", - "strb w21, [x28, #1298]" + "ldrb w22, [x28, #1298]", + "lsl w20, w21, w20", + "orr w20, w22, w20", + "strb w20, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9804,10 +9719,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "strb w20, [x28, #1019]" ] }, "ffreep st0": { @@ -9926,15 +9841,13 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdf 11b 0xe8 /5" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -9951,11 +9864,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st1": { @@ -9984,11 +9897,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st2": { @@ -10017,11 +9930,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st3": { @@ -10050,11 +9963,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st4": { @@ -10083,11 +9996,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st5": { @@ -10116,11 +10029,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st6": { @@ -10149,11 +10062,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fucomip st7": { @@ -10182,23 +10095,21 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st0": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 23, "Comment": [ "0xdf 11b 0xf0 /6" ], "ExpectedArm64ASM": [ "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr d3, [x0, #1040]", @@ -10215,11 +10126,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st1": { @@ -10248,11 +10159,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st2": { @@ -10281,11 +10192,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st3": { @@ -10314,11 +10225,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st4": { @@ -10347,11 +10258,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st5": { @@ -10380,11 +10291,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st6": { @@ -10413,11 +10324,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "fcomip st7": { @@ -10446,15 +10357,15 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", + "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22", - "strb w21, [x28, #1298]" + "msr nzcv, x22" ] }, "memcpy4_32": { - "ExpectedInstructionCount": 83, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld dword [rax]", "fstp dword [rdx]", @@ -10466,93 +10377,29 @@ "fstp dword [rdx + 12]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr s2, [x4]", - "fcvt d2, s2", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", "str s2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #4]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x4 (4)", + "str s2, [x20]", "ldr s2, [x4, #8]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str s2, [x20]", "ldr s2, [x4, #12]", - "fcvt d2, s2", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0xc (12)", + "str s2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "fcvt s2, d2", - "str s2, [x6, #12]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] }, "memcpy4_64": { - "ExpectedInstructionCount": 75, + "ExpectedInstructionCount": 19, "x86Insts": [ "fld qword [rax]", "fstp qword [rdx]", @@ -10564,81 +10411,25 @@ "fstp qword [rdx + 32]" ], "ExpectedArm64ASM": [ - "ldrb w20, [x28, #1019]", "ldr d2, [x4]", - "mov w21, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", "str d2, [x6]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", "ldr d2, [x4, #8]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #8]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x8 (8)", + "str d2, [x20]", "ldr d2, [x4, #16]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #16]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldrb w20, [x28, #1019]", + "add x20, x6, #0x10 (16)", + "str d2, [x20]", "ldr d2, [x4, #32]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]", + "add x20, x6, #0x20 (32)", + "str d2, [x20]", "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr d2, [x0, #1040]", - "str d2, [x6, #32]", - "lsl w21, w21, w20", - "bic w21, w22, w21", - "add w20, w20, #0x1 (1)", + "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "strb w21, [x28, #1298]" + "ldrb w21, [x28, #1298]", + "mov w22, #0x1", + "lsl w20, w22, w20", + "bic w20, w21, w20", + "strb w20, [x28, #1298]" ] } }