From 0e6fc511493233251db9df5124fea30f5748ed73 Mon Sep 17 00:00:00 2001 From: eeucalyptus Date: Wed, 23 Oct 2024 06:12:12 +0200 Subject: [PATCH] fix the adc code without debug printf --- ch32v003fun/ch32v003fun.c | 79 +++++++++++++++++++-------------------- 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/ch32v003fun/ch32v003fun.c b/ch32v003fun/ch32v003fun.c index 6918b61b..b7e0da84 100644 --- a/ch32v003fun/ch32v003fun.c +++ b/ch32v003fun/ch32v003fun.c @@ -1571,46 +1571,6 @@ WEAK int putchar(int c) return 1; } -void funAnalogInit() -{ - //RCC->CFGR0 &= ~(0x1F<<11); // Assume ADCPRE = 0 - RCC->APB2PCENR |= RCC_APB2Periph_ADC1; - - // Reset ADC. - RCC->APB2PRSTR |= RCC_APB2Periph_ADC1; - RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1; - - // set sampling time for all channels to 15 (A good middleground) ADC_SMP0_1. - ADC1->SAMPTR2 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5)) | (ADC_SMP0_1<<(3*6)) | (ADC_SMP0_1<<(3*7)) | (ADC_SMP0_1<<(3*8)) | (ADC_SMP0_1<<(3*9)); - ADC1->SAMPTR1 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5)); - - ADC1->CTLR2 |= ADC_ADON | ADC_EXTSEL; // turn on ADC and set rule group to sw trig - - // Reset calibration - ADC1->CTLR2 |= ADC_RSTCAL; - while(ADC1->CTLR2 & ADC_RSTCAL); - - // Calibrate - ADC1->CTLR2 |= ADC_CAL; - while(ADC1->CTLR2 & ADC_CAL); - -} - - -int funAnalogRead( int nAnalogNumber ) -{ - ADC1->RSQR3 = nAnalogNumber; - - // start sw conversion (auto clears) - ADC1->CTLR2 |= ADC_SWSTART; - - // wait for conversion complete - while(!(ADC1->STATR & ADC_EOC)); - - // get result - return ADC1->RDATAR; -} - void SetupDebugPrintf() { // Clear out the sending flag. @@ -1780,6 +1740,45 @@ void SystemInit() #endif } +void funAnalogInit() +{ + //RCC->CFGR0 &= ~(0x1F<<11); // Assume ADCPRE = 0 + RCC->APB2PCENR |= RCC_APB2Periph_ADC1; + + // Reset ADC. + RCC->APB2PRSTR |= RCC_APB2Periph_ADC1; + RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1; + + // set sampling time for all channels to 15 (A good middleground) ADC_SMP0_1. + ADC1->SAMPTR2 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5)) | (ADC_SMP0_1<<(3*6)) | (ADC_SMP0_1<<(3*7)) | (ADC_SMP0_1<<(3*8)) | (ADC_SMP0_1<<(3*9)); + ADC1->SAMPTR1 = (ADC_SMP0_1<<(3*0)) | (ADC_SMP0_1<<(3*1)) | (ADC_SMP0_1<<(3*2)) | (ADC_SMP0_1<<(3*3)) | (ADC_SMP0_1<<(3*4)) | (ADC_SMP0_1<<(3*5)); + + ADC1->CTLR2 |= ADC_ADON | ADC_EXTSEL; // turn on ADC and set rule group to sw trig + + // Reset calibration + ADC1->CTLR2 |= ADC_RSTCAL; + while(ADC1->CTLR2 & ADC_RSTCAL); + + // Calibrate + ADC1->CTLR2 |= ADC_CAL; + while(ADC1->CTLR2 & ADC_CAL); + +} + +int funAnalogRead( int nAnalogNumber ) +{ + ADC1->RSQR3 = nAnalogNumber; + + // start sw conversion (auto clears) + ADC1->CTLR2 |= ADC_SWSTART; + + // wait for conversion complete + while(!(ADC1->STATR & ADC_EOC)); + + // get result + return ADC1->RDATAR; +} + // C++ Support #ifdef CPLUSPLUS