From 838e204efda462ec14a0010d5d38ccfb4b1d5398 Mon Sep 17 00:00:00 2001 From: CodeChenL <2540735020@qq.com> Date: Thu, 11 Apr 2024 18:34:14 +0800 Subject: [PATCH] refactor: ROCK series overlays are replaced with reference syntax --- .../overlays/radxa-s0-ext-antenna.dts | 53 +- .../dts/rockchip/overlays/rock-3-ov5647.dtsi | 110 +-- .../overlays/rock-3a-radxa-25w-poe.dts | 65 +- .../rock-3a-radxa-5inch-touchscreen.dts | 146 ++-- .../overlays/rock-3a-radxa-display-10hd.dts | 772 ++++++++--------- .../overlays/rock-3a-radxa-display-8hd.dts | 680 +++++++-------- .../rock-3a-raspberrypi-7inch-touchscreen.dts | 154 ++-- .../dts/rockchip/overlays/rock-3a-sata0.dts | 30 +- .../dts/rockchip/overlays/rock-3a-sata1.dts | 30 +- .../dts/rockchip/overlays/rock-3a-sata2.dts | 20 +- .../overlays/rock-3a-v12-radxa-25w-poe.dts | 65 +- .../overlays/rock-3ab-okdo-5mp-camera.dts | 224 ++--- .../overlays/rock-3ab-radxa-camera-8m.dts | 230 +++-- .../rock-3ab-rpi-camera-v1p3-ov5647.dts | 224 ++--- .../rock-3ab-rpi-camera-v2-imx219.dts | 230 +++-- .../overlays/rock-3b-enable-hdmicec.dts | 10 +- ...-3b-hdmi-and-sharp-lq133t1jw01-edp-lcd.dts | 308 +++---- .../rock-3b-radxa-10p1inch-display.dts | 790 +++++++++--------- .../overlays/rock-3b-radxa-25w-poe.dts | 65 +- .../rock-3b-radxa-5inch-touchscreen.dts | 146 ++-- .../overlays/rock-3b-radxa-8inch-display.dts | 744 ++++++++--------- .../overlays/rock-3b-radxa-display-10fhd.dts | 402 ++++----- .../rock-3b-raspberrypi-7inch-touchscreen.dts | 154 ++-- .../dts/rockchip/overlays/rock-3b-sata2.dts | 22 +- .../overlays/rock-3c-okdo-5mp-camera.dts | 10 +- .../dts/rockchip/overlays/rock-3c-ov5647.dtsi | 228 +++-- .../overlays/rock-3c-radxa-25w-poe.dts | 65 +- .../rock-3c-radxa-5inch-touchscreen.dts | 158 ++-- .../overlays/rock-3c-radxa-camera-8m.dts | 230 +++-- .../overlays/rock-3c-radxa-display-10hd.dts | 772 ++++++++--------- .../overlays/rock-3c-radxa-display-8hd.dts | 688 +++++++-------- .../rock-3c-raspberrypi-7inch-touchscreen.dts | 166 ++-- .../overlays/rock-3c-rpi-camera-v1p3.dts | 10 +- .../overlays/rock-3c-rpi-camera-v2.dts | 230 +++-- .../overlays/rock-4-okdo-5mp-camera.dts | 10 +- .../dts/rockchip/overlays/rock-4-ov5647.dtsi | 188 ++--- .../overlays/rock-4-radxa-camera-8m.dts | 188 ++--- .../overlays/rock-4-radxa-display-10hd.dts | 716 ++++++++-------- .../rock-4-raspi-7inch-touchscreen.dts | 122 ++- .../overlays/rock-4-rpi-camera-v1_3.dts | 10 +- .../overlays/rock-4-rpi-camera-v2.dts | 188 ++--- .../rock-4c-plus-radxa-display-10fhd.dts | 416 ++++----- .../rock-4c-plus-radxa-display-10hd.dts | 336 +++----- .../rock-4c-plus-radxa-display-8hd.dts | 340 +++----- .../rock-4c-plus-raspi-7inch-touchscreen.dts | 168 ++-- .../overlays/rock-4se-radxa-display-8hd.dts | 664 +++++++-------- ...-sharp-lq133t1jw01-edp-lcd-disable-dp0.dts | 330 +++----- ...-sharp-lq133t1jw01-edp-lcd-disable-dp1.dts | 390 ++++----- .../rockchip/overlays/rock-5-itx-hdmi1-8k.dts | 75 +- .../rock-5-itx-okdo-5mp-camera-on-cam0.dts | 267 +++--- .../rock-5-itx-okdo-5mp-camera-on-cam1.dts | 268 +++--- .../rock-5-itx-radxa-camera-4k-on-cam0.dts | 257 +++--- .../rock-5-itx-radxa-camera-4k-on-cam1.dts | 258 +++--- ...rock-5-itx-radxa-camera-8m-219-on-cam0.dts | 295 +++---- ...rock-5-itx-radxa-camera-8m-219-on-cam1.dts | 296 +++---- ...rock-5-itx-radxa-display-10fhd-on-lcd0.dts | 400 ++++----- ...rock-5-itx-radxa-display-10fhd-on-lcd1.dts | 400 ++++----- .../rock-5-itx-radxa-display-10hd-on-lcd0.dts | 302 +++---- .../rock-5-itx-radxa-display-10hd-on-lcd1.dts | 302 +++---- .../rock-5-itx-radxa-display-8hd-on-lcd0.dts | 306 +++---- .../rock-5-itx-radxa-display-8hd-on-lcd1.dts | 306 +++---- .../overlays/rock-5a-allnet-5inch-display.dts | 156 ++-- .../overlays/rock-5a-okdo-5mp-camera.dts | 281 +++---- .../overlays/rock-5a-radxa-25w-poe.dts | 65 +- .../overlays/rock-5a-radxa-camera-4k.dts | 257 +++--- .../rock-5a-raspi-7inch-touchscreen.dts | 154 ++-- .../overlays/rock-5a-rpi-camera-v1_3.dts | 281 +++---- .../overlays/rock-5a-rpi-camera-v2.dts | 291 +++---- .../dts/rockchip/overlays/rock-5a-sata.dts | 20 +- .../rockchip/overlays/rock-5a-spi-flash.dts | 64 +- .../overlays/rock-5b-allnet-5inch-display.dts | 156 ++-- .../rockchip/overlays/rock-5b-hdmi1-8k.dts | 66 +- .../rockchip/overlays/rock-5b-hdmi2-8k.dts | 86 +- .../overlays/rock-5b-okdo-5mp-camera.dts | 281 +++---- .../rock-5b-plus-cam0-radxa-camera-4k.dts | 257 +++--- .../rock-5b-plus-cam1-radxa-camera-4k.dts | 261 +++--- .../rock-5b-plus-cam1-rpi-camera-v2.dts | 303 +++---- .../overlays/rock-5b-plus-hdmi0-8k.dts | 66 +- .../overlays/rock-5b-plus-hdmi1-8k.dts | 86 +- .../rock-5b-plus-radxa-display-10fhd.dts | 404 ++++----- .../rock-5b-plus-radxa-display-10hd.dts | 304 +++---- .../rock-5b-plus-radxa-display-8hd.dts | 306 +++---- .../overlays/rock-5b-radxa-25w-poe.dts | 65 +- .../overlays/rock-5b-radxa-camera-4k.dts | 257 +++--- .../overlays/rock-5b-radxa-display-10fhd.dts | 404 ++++----- .../overlays/rock-5b-radxa-display-10hd.dts | 304 +++---- .../overlays/rock-5b-radxa-display-8hd.dts | 306 +++---- .../rock-5b-raspi-7inch-touchscreen.dts | 158 ++-- .../overlays/rock-5b-rpi-camera-v1_3.dts | 281 +++---- .../overlays/rock-5b-rpi-camera-v2.dts | 295 +++---- .../dts/rockchip/overlays/rock-5b-sata.dts | 40 +- .../overlays/rock-pi-s-poe-headphone.dts | 40 +- .../rockchip/overlays/rockchip-watchdog.dts | 10 +- 93 files changed, 9624 insertions(+), 12710 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/overlays/radxa-s0-ext-antenna.dts b/arch/arm64/boot/dts/rockchip/overlays/radxa-s0-ext-antenna.dts index 8c32ee4d..c374ff99 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/radxa-s0-ext-antenna.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/radxa-s0-ext-antenna.dts @@ -11,43 +11,30 @@ exclusive = "GPIO0_A6", "GPIO0_A5"; description = "Enable External Antenna."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - ext_antenna: ext-antenna { - status = "okay"; - compatible = "regulator-fixed"; - enable-active-low; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; - regulator-always-on; - regulator-boot-on; - pinctrl-0 = <&ant_2>; - pinctrl-names = "default"; - regulator-name = "ext_antenna"; - }; - }; - }; - - fragment@1 { - target = <&board_antenna>; - - __overlay__ { - status = "disabled"; - }; +&{/} { + ext_antenna: ext-antenna { + status = "okay"; + compatible = "regulator-fixed"; + enable-active-low; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; + regulator-always-on; + regulator-boot-on; + pinctrl-0 = <&ant_2>; + pinctrl-names = "default"; + regulator-name = "ext_antenna"; }; +}; - fragment@2 { - target = <&pinctrl>; +&board_antenna { + status = "disabled"; +}; - __overlay__ { - antenna { - ant_2: ant-2 { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; +&pinctrl { + antenna { + ant_2: ant-2 { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3-ov5647.dtsi b/arch/arm64/boot/dts/rockchip/overlays/rock-3-ov5647.dtsi index 10eeb2d1..27e36593 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3-ov5647.dtsi +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3-ov5647.dtsi @@ -1,89 +1,43 @@ -/ { - fragment@0 { - target = <&ext_cam_clk>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@1 { - target = <&i2c5>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@2 { - target = <&ov5647>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&csi2_dphy_hw>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&rkisp_vir0>; - - __overlay__ { - status = "okay"; - }; - }; +&ext_cam_clk { + status = "okay"; +}; - fragment@6 { - target = <&rkisp>; +&i2c5 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&ov5647 { + status = "okay"; +}; - fragment@7 { - target = <&rkisp_mmu>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkisp_vir0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp{ + status = "okay"; +}; - fragment@9 { - target = <&rkcif>; +&rkisp_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif_mmu { + status = "okay"; +}; - fragment@10 { - target = <&vcc_camera>; +&rkcif { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&vcc_camera { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-25w-poe.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-25w-poe.dts index 9c4e2986..dc32dfad 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-25w-poe.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-25w-poe.dts @@ -15,47 +15,40 @@ exclusive = "GPIO0_B5", "GPIO3_C3"; package = "rsetup-config-thermal-governor-step-wise"; }; +}; - fragment@0 { - target-path = "/"; - __overlay__ { - radxa_pow_w1: radxa-poe-w1 { - compatible = "w1-gpio"; - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - radxa_poe_pwm: radxa-poe-pwm { - compatible = "pwm-gpio"; - #pwm-cells = <3>; - pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - }; +&{/} { + radxa_pow_w1: radxa-poe-w1 { + compatible = "w1-gpio"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; - radxa_poe_fan: radxa-poe-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <4>; - cooling-levels = <0 64 128 192 255>; - pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; - }; - }; + radxa_poe_pwm: radxa-poe-pwm { + compatible = "pwm-gpio"; + #pwm-cells = <3>; + pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&soc_thermal>; + radxa_poe_fan: radxa-poe-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <4>; + cooling-levels = <0 64 128 192 255>; + pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; + }; +}; - __overlay__ { - cooling-maps { - map3 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map4 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; +&soc_thermal { + cooling-maps { + map3 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map4 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-5inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-5inch-touchscreen.dts index a0ed4970..42cc5b81 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-5inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-5inch-touchscreen.dts @@ -12,120 +12,92 @@ exclusive = "dsi1"; description = "Enable Radxa 5-inch Touchscreen."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; + port@0 { + reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dsi1_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; + port@1 { + reg = <1>; #address-cells = <1>; #size-cells = <0>; - rockpi_ft5406: rockpi_ft5406@38 { - compatible = "rockpi_ft5406"; - reg = <0x38>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + dsi1_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&video_phy1>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + rockpi_ft5406: rockpi_ft5406@38 { + compatible = "rockpi_ft5406"; + reg = <0x38>; }; - fragment@4 { - target = <&dsi1_in_vp0>; - - __overlay__ { - status = "disabled"; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&dsi1_in_vp1>; +&video_phy1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi1_in_vp0 { + status = "disabled"; +}; - fragment@6 { - target = <&route_dsi1>; +&dsi1_in_vp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&route_dsi1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-10hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-10hd.dts index e52ed8d8..1bbb05a3 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-10hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-10hd.dts @@ -14,429 +14,389 @@ exclusive = "video_phy1","GPIO3_C4","GPIO3_C5","GPIO0_C0"; description = "Enable Radxa Display 10HD"; }; +}; + +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + enable-active-high; + regulator-always-on; + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; + }; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - enable-active-high; - regulator-always-on; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - }; - - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm14 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm14 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; +}; + +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + power-supply = <&vcc_mipi>; + width-mm = <135>; + height-mm = <216>; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <2>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 3B + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 AF + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B AF + 15 00 02 1C 00 + 15 00 02 35 26 + 15 00 02 37 09 + 15 00 02 38 04 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3C 78 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F 7F + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 42 81 + 15 00 02 43 14 + 15 00 02 44 23 + 15 00 02 45 28 + 15 00 02 55 02 + 15 00 02 57 69 + 15 00 02 59 0A + 15 00 02 5A 2A + 15 00 02 5B 17 + 15 00 02 5D 7F + 15 00 02 5E 6B + 15 00 02 5F 5C + 15 00 02 60 4F + 15 00 02 61 4D + 15 00 02 62 3F + 15 00 02 63 42 + 15 00 02 64 2B + 15 00 02 65 44 + 15 00 02 66 43 + 15 00 02 67 43 + 15 00 02 68 63 + 15 00 02 69 52 + 15 00 02 6A 5A + 15 00 02 6B 4F + 15 00 02 6C 4E + 15 00 02 6D 20 + 15 00 02 6E 0F + 15 00 02 6F 00 + 15 00 02 70 7F + 15 00 02 71 6B + 15 00 02 72 5C + 15 00 02 73 4F + 15 00 02 74 4D + 15 00 02 75 3F + 15 00 02 76 42 + 15 00 02 77 2B + 15 00 02 78 44 + 15 00 02 79 43 + 15 00 02 7A 43 + 15 00 02 7B 63 + 15 00 02 7C 52 + 15 00 02 7D 5A + 15 00 02 7E 4F + 15 00 02 7F 4E + 15 00 02 80 20 + 15 00 02 81 0F + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 02 + 15 00 02 01 02 + 15 00 02 02 00 + 15 00 02 03 00 + 15 00 02 04 1E + 15 00 02 05 1E + 15 00 02 06 1F + 15 00 02 07 1F + 15 00 02 08 1F + 15 00 02 09 17 + 15 00 02 0A 17 + 15 00 02 0B 37 + 15 00 02 0C 37 + 15 00 02 0D 47 + 15 00 02 0E 47 + 15 00 02 0F 45 + 15 00 02 10 45 + 15 00 02 11 4B + 15 00 02 12 4B + 15 00 02 13 49 + 15 00 02 14 49 + 15 00 02 15 1F + 15 00 02 16 01 + 15 00 02 17 01 + 15 00 02 18 00 + 15 00 02 19 00 + 15 00 02 1A 1E + 15 00 02 1B 1E + 15 00 02 1C 1F + 15 00 02 1D 1F + 15 00 02 1E 1F + 15 00 02 1F 17 + 15 00 02 20 17 + 15 00 02 21 37 + 15 00 02 22 37 + 15 00 02 23 46 + 15 00 02 24 46 + 15 00 02 25 44 + 15 00 02 26 44 + 15 00 02 27 4A + 15 00 02 28 4A + 15 00 02 29 48 + 15 00 02 2A 48 + 15 00 02 2B 1F + 15 00 02 2C 01 + 15 00 02 2D 01 + 15 00 02 2E 00 + 15 00 02 2F 00 + 15 00 02 30 1F + 15 00 02 31 1F + 15 00 02 32 1E + 15 00 02 33 1E + 15 00 02 34 1F + 15 00 02 35 17 + 15 00 02 36 17 + 15 00 02 37 37 + 15 00 02 38 37 + 15 00 02 39 08 + 15 00 02 3A 08 + 15 00 02 3B 0A + 15 00 02 3C 0A + 15 00 02 3D 04 + 15 00 02 3E 04 + 15 00 02 3F 06 + 15 00 02 40 06 + 15 00 02 41 1F + 15 00 02 42 02 + 15 00 02 43 02 + 15 00 02 44 00 + 15 00 02 45 00 + 15 00 02 46 1F + 15 00 02 47 1F + 15 00 02 48 1E + 15 00 02 49 1E + 15 00 02 4A 1F + 15 00 02 4B 17 + 15 00 02 4C 17 + 15 00 02 4D 37 + 15 00 02 4E 37 + 15 00 02 4F 09 + 15 00 02 50 09 + 15 00 02 51 0B + 15 00 02 52 0B + 15 00 02 53 05 + 15 00 02 54 05 + 15 00 02 55 07 + 15 00 02 56 07 + 15 00 02 57 1F + 15 00 02 58 40 + 15 00 02 5B 30 + 15 00 02 5C 16 + 15 00 02 5D 34 + 15 00 02 5E 05 + 15 00 02 5F 02 + 15 00 02 63 00 + 15 00 02 64 6A + 15 00 02 67 73 + 15 00 02 68 1D + 15 00 02 69 08 + 15 00 02 6A 6A + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 00 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 75 FF + 15 00 02 77 DD + 15 00 02 78 3F + 15 00 02 79 15 + 15 00 02 7A 17 + 15 00 02 7D 14 + 15 00 02 7E 82 + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 61 + 15 00 02 0E 48 + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 0C + 15 00 02 E0 00 + 15 00 02 80 01 + 05 78 01 11 + 05 14 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display_timings0: display-timings { + native-mode = <&dsi1_timing0>; + + dsi1_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + + hsync-len = <18>; + hback-porch = <20>; + hfront-porch = <40>; + + vsync-len = <4>; + vback-porch = <20>; + vfront-porch = <20>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <1>; }; }; - }; - - fragment@1 { - target = <&dsi1>; - __overlay__ { - status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&backlight>; - power-supply = <&vcc_mipi>; - width-mm = <135>; - height-mm = <216>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <2>; - - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 3B - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 AF - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B AF - 15 00 02 1C 00 - 15 00 02 35 26 - 15 00 02 37 09 - 15 00 02 38 04 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3C 78 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F 7F - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 42 81 - 15 00 02 43 14 - 15 00 02 44 23 - 15 00 02 45 28 - 15 00 02 55 02 - 15 00 02 57 69 - 15 00 02 59 0A - 15 00 02 5A 2A - 15 00 02 5B 17 - 15 00 02 5D 7F - 15 00 02 5E 6B - 15 00 02 5F 5C - 15 00 02 60 4F - 15 00 02 61 4D - 15 00 02 62 3F - 15 00 02 63 42 - 15 00 02 64 2B - 15 00 02 65 44 - 15 00 02 66 43 - 15 00 02 67 43 - 15 00 02 68 63 - 15 00 02 69 52 - 15 00 02 6A 5A - 15 00 02 6B 4F - 15 00 02 6C 4E - 15 00 02 6D 20 - 15 00 02 6E 0F - 15 00 02 6F 00 - 15 00 02 70 7F - 15 00 02 71 6B - 15 00 02 72 5C - 15 00 02 73 4F - 15 00 02 74 4D - 15 00 02 75 3F - 15 00 02 76 42 - 15 00 02 77 2B - 15 00 02 78 44 - 15 00 02 79 43 - 15 00 02 7A 43 - 15 00 02 7B 63 - 15 00 02 7C 52 - 15 00 02 7D 5A - 15 00 02 7E 4F - 15 00 02 7F 4E - 15 00 02 80 20 - 15 00 02 81 0F - 15 00 02 82 00 - 15 00 02 E0 02 - 15 00 02 00 02 - 15 00 02 01 02 - 15 00 02 02 00 - 15 00 02 03 00 - 15 00 02 04 1E - 15 00 02 05 1E - 15 00 02 06 1F - 15 00 02 07 1F - 15 00 02 08 1F - 15 00 02 09 17 - 15 00 02 0A 17 - 15 00 02 0B 37 - 15 00 02 0C 37 - 15 00 02 0D 47 - 15 00 02 0E 47 - 15 00 02 0F 45 - 15 00 02 10 45 - 15 00 02 11 4B - 15 00 02 12 4B - 15 00 02 13 49 - 15 00 02 14 49 - 15 00 02 15 1F - 15 00 02 16 01 - 15 00 02 17 01 - 15 00 02 18 00 - 15 00 02 19 00 - 15 00 02 1A 1E - 15 00 02 1B 1E - 15 00 02 1C 1F - 15 00 02 1D 1F - 15 00 02 1E 1F - 15 00 02 1F 17 - 15 00 02 20 17 - 15 00 02 21 37 - 15 00 02 22 37 - 15 00 02 23 46 - 15 00 02 24 46 - 15 00 02 25 44 - 15 00 02 26 44 - 15 00 02 27 4A - 15 00 02 28 4A - 15 00 02 29 48 - 15 00 02 2A 48 - 15 00 02 2B 1F - 15 00 02 2C 01 - 15 00 02 2D 01 - 15 00 02 2E 00 - 15 00 02 2F 00 - 15 00 02 30 1F - 15 00 02 31 1F - 15 00 02 32 1E - 15 00 02 33 1E - 15 00 02 34 1F - 15 00 02 35 17 - 15 00 02 36 17 - 15 00 02 37 37 - 15 00 02 38 37 - 15 00 02 39 08 - 15 00 02 3A 08 - 15 00 02 3B 0A - 15 00 02 3C 0A - 15 00 02 3D 04 - 15 00 02 3E 04 - 15 00 02 3F 06 - 15 00 02 40 06 - 15 00 02 41 1F - 15 00 02 42 02 - 15 00 02 43 02 - 15 00 02 44 00 - 15 00 02 45 00 - 15 00 02 46 1F - 15 00 02 47 1F - 15 00 02 48 1E - 15 00 02 49 1E - 15 00 02 4A 1F - 15 00 02 4B 17 - 15 00 02 4C 17 - 15 00 02 4D 37 - 15 00 02 4E 37 - 15 00 02 4F 09 - 15 00 02 50 09 - 15 00 02 51 0B - 15 00 02 52 0B - 15 00 02 53 05 - 15 00 02 54 05 - 15 00 02 55 07 - 15 00 02 56 07 - 15 00 02 57 1F - 15 00 02 58 40 - 15 00 02 5B 30 - 15 00 02 5C 16 - 15 00 02 5D 34 - 15 00 02 5E 05 - 15 00 02 5F 02 - 15 00 02 63 00 - 15 00 02 64 6A - 15 00 02 67 73 - 15 00 02 68 1D - 15 00 02 69 08 - 15 00 02 6A 6A - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 00 - 15 00 02 6E 00 - 15 00 02 6F 88 - 15 00 02 75 FF - 15 00 02 77 DD - 15 00 02 78 3F - 15 00 02 79 15 - 15 00 02 7A 17 - 15 00 02 7D 14 - 15 00 02 7E 82 - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 61 - 15 00 02 0E 48 - 15 00 02 E0 00 - 15 00 02 E6 02 - 15 00 02 E7 0C - 15 00 02 E0 00 - 15 00 02 80 01 - 05 78 01 11 - 05 14 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display_timings0: display-timings { - native-mode = <&dsi1_timing0>; - - dsi1_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - - hsync-len = <18>; - hback-porch = <20>; - hfront-porch = <40>; - - vsync-len = <4>; - vback-porch = <20>; - vfront-porch = <20>; - - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <1>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; - }; - }; - }; - }; - - fragment@2 { - target = <&dsi1_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&video_phy1>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&hdmi_in_vp0>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@5 { - target = <&hdmi>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&route_dsi1>; - - __overlay__ { - status = "disabled"; - connect = <&vp0_out_dsi1>; }; }; - fragment@7 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - power-supply = <&vcc_mipi>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio3 RK_PC5 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; - focaltech,max-touch-number = <5>; - focaltech,display-coords = <0 0 799 1279>; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; }; }; }; - - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - }; +}; + +&dsi1_in_vp0 { + status = "okay"; +}; + +&video_phy1 { + status = "okay"; +}; + +&hdmi_in_vp0 { + status = "disabled"; +}; + +&hdmi { + status = "disabled"; +}; + +&route_dsi1 { + status = "disabled"; + connect = <&vp0_out_dsi1>; +}; + +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + power-supply = <&vcc_mipi>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio3 RK_PC5 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + focaltech,max-touch-number = <5>; + focaltech,display-coords = <0 0 799 1279>; }; - - fragment@9 { - target = <&pwm14>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&pwm14m0_pins>; +}; + +&pinctrl { + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; -}; \ No newline at end of file +}; + +&pwm14 { + status = "okay"; + pinctrl-0 = <&pwm14m0_pins>; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-8hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-8hd.dts index ba8d671b..47023dbe 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-8hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-radxa-display-8hd.dts @@ -14,391 +14,355 @@ exclusive = "video_phy1","GPIO3_C4","GPIO0_B6","GPIO3_B2"; description = "Enable Radxa Display 8HD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - vin-supply = <&vcc3v3_sys>; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + vin-supply = <&vcc3v3_sys>; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; + }; - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm14 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm14 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; - __overlay__ { - status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - #address-cells = <1>; - #size-cells = <0>; + dsi_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + power-supply = <&vcc_mipi>; + backlight = <&backlight>; + width-mm = <107>; + height-mm = <199>; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <2>; + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 72 + 15 00 02 03 00 + 15 00 02 04 65 + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 B7 + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B B7 + 15 00 02 1C 00 + 15 00 02 24 FE + 15 00 02 37 19 + 15 00 02 38 05 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3B 01 + 15 00 02 3C 70 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 1E + 15 00 02 44 0F + 15 00 02 45 28 + 15 00 02 4B 04 + 15 00 02 55 02 + 15 00 02 56 01 + 15 00 02 57 A9 + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 37 + 15 00 02 5B 19 + 15 00 02 5D 78 + 15 00 02 5E 63 + 15 00 02 5F 54 + 15 00 02 60 48 + 15 00 02 61 45 + 15 00 02 62 38 + 15 00 02 63 3D + 15 00 02 64 28 + 15 00 02 65 43 + 15 00 02 66 41 + 15 00 02 67 43 + 15 00 02 68 62 + 15 00 02 69 50 + 15 00 02 6A 57 + 15 00 02 6B 49 + 15 00 02 6C 44 + 15 00 02 6D 37 + 15 00 02 6E 23 + 15 00 02 6F 10 + 15 00 02 70 78 + 15 00 02 71 63 + 15 00 02 72 54 + 15 00 02 73 49 + 15 00 02 74 45 + 15 00 02 75 38 + 15 00 02 76 3D + 15 00 02 77 28 + 15 00 02 78 43 + 15 00 02 79 41 + 15 00 02 7A 43 + 15 00 02 7B 62 + 15 00 02 7C 50 + 15 00 02 7D 57 + 15 00 02 7E 49 + 15 00 02 7F 44 + 15 00 02 80 37 + 15 00 02 81 23 + 15 00 02 82 10 + 15 00 02 E0 02 + 15 00 02 00 47 + 15 00 02 01 47 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 4B + 15 00 02 05 4B + 15 00 02 06 49 + 15 00 02 07 49 + 15 00 02 08 41 + 15 00 02 09 1F + 15 00 02 0A 1F + 15 00 02 0B 1F + 15 00 02 0C 1F + 15 00 02 0D 1F + 15 00 02 0E 1F + 15 00 02 0F 5F + 15 00 02 10 5F + 15 00 02 11 57 + 15 00 02 12 77 + 15 00 02 13 35 + 15 00 02 14 1F + 15 00 02 15 1F + 15 00 02 16 46 + 15 00 02 17 46 + 15 00 02 18 44 + 15 00 02 19 44 + 15 00 02 1A 4A + 15 00 02 1B 4A + 15 00 02 1C 48 + 15 00 02 1D 48 + 15 00 02 1E 40 + 15 00 02 1F 1F + 15 00 02 20 1F + 15 00 02 21 1F + 15 00 02 22 1F + 15 00 02 23 1F + 15 00 02 24 1F + 15 00 02 25 5F + 15 00 02 26 5F + 15 00 02 27 57 + 15 00 02 28 77 + 15 00 02 29 35 + 15 00 02 2A 1F + 15 00 02 2B 1F + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 10 + 15 00 02 5C 06 + 15 00 02 5D 40 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 30 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 03 + 15 00 02 64 6B + 15 00 02 65 05 + 15 00 02 66 0C + 15 00 02 67 73 + 15 00 02 68 09 + 15 00 02 69 03 + 15 00 02 6A 56 + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 04 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 D5 + 15 00 02 78 2E + 15 00 02 79 12 + 15 00 02 7A 03 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 60 + 15 00 02 0E 2A + 15 00 02 36 59 + 15 00 02 E0 00 + 15 00 02 80 01 + 15 00 02 E0 00 + 15 00 02 11 00 + 15 78 02 29 00 + ]; - dsi_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; - reg = <0>; - power-supply = <&vcc_mipi>; - backlight = <&backlight>; - width-mm = <107>; - height-mm = <199>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <2>; - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 72 - 15 00 02 03 00 - 15 00 02 04 65 - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 B7 - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B B7 - 15 00 02 1C 00 - 15 00 02 24 FE - 15 00 02 37 19 - 15 00 02 38 05 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3B 01 - 15 00 02 3C 70 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F FF - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 43 1E - 15 00 02 44 0F - 15 00 02 45 28 - 15 00 02 4B 04 - 15 00 02 55 02 - 15 00 02 56 01 - 15 00 02 57 A9 - 15 00 02 58 0A - 15 00 02 59 0A - 15 00 02 5A 37 - 15 00 02 5B 19 - 15 00 02 5D 78 - 15 00 02 5E 63 - 15 00 02 5F 54 - 15 00 02 60 48 - 15 00 02 61 45 - 15 00 02 62 38 - 15 00 02 63 3D - 15 00 02 64 28 - 15 00 02 65 43 - 15 00 02 66 41 - 15 00 02 67 43 - 15 00 02 68 62 - 15 00 02 69 50 - 15 00 02 6A 57 - 15 00 02 6B 49 - 15 00 02 6C 44 - 15 00 02 6D 37 - 15 00 02 6E 23 - 15 00 02 6F 10 - 15 00 02 70 78 - 15 00 02 71 63 - 15 00 02 72 54 - 15 00 02 73 49 - 15 00 02 74 45 - 15 00 02 75 38 - 15 00 02 76 3D - 15 00 02 77 28 - 15 00 02 78 43 - 15 00 02 79 41 - 15 00 02 7A 43 - 15 00 02 7B 62 - 15 00 02 7C 50 - 15 00 02 7D 57 - 15 00 02 7E 49 - 15 00 02 7F 44 - 15 00 02 80 37 - 15 00 02 81 23 - 15 00 02 82 10 - 15 00 02 E0 02 - 15 00 02 00 47 - 15 00 02 01 47 - 15 00 02 02 45 - 15 00 02 03 45 - 15 00 02 04 4B - 15 00 02 05 4B - 15 00 02 06 49 - 15 00 02 07 49 - 15 00 02 08 41 - 15 00 02 09 1F - 15 00 02 0A 1F - 15 00 02 0B 1F - 15 00 02 0C 1F - 15 00 02 0D 1F - 15 00 02 0E 1F - 15 00 02 0F 5F - 15 00 02 10 5F - 15 00 02 11 57 - 15 00 02 12 77 - 15 00 02 13 35 - 15 00 02 14 1F - 15 00 02 15 1F - 15 00 02 16 46 - 15 00 02 17 46 - 15 00 02 18 44 - 15 00 02 19 44 - 15 00 02 1A 4A - 15 00 02 1B 4A - 15 00 02 1C 48 - 15 00 02 1D 48 - 15 00 02 1E 40 - 15 00 02 1F 1F - 15 00 02 20 1F - 15 00 02 21 1F - 15 00 02 22 1F - 15 00 02 23 1F - 15 00 02 24 1F - 15 00 02 25 5F - 15 00 02 26 5F - 15 00 02 27 57 - 15 00 02 28 77 - 15 00 02 29 35 - 15 00 02 2A 1F - 15 00 02 2B 1F - 15 00 02 58 40 - 15 00 02 59 00 - 15 00 02 5A 00 - 15 00 02 5B 10 - 15 00 02 5C 06 - 15 00 02 5D 40 - 15 00 02 5E 01 - 15 00 02 5F 02 - 15 00 02 60 30 - 15 00 02 61 01 - 15 00 02 62 02 - 15 00 02 63 03 - 15 00 02 64 6B - 15 00 02 65 05 - 15 00 02 66 0C - 15 00 02 67 73 - 15 00 02 68 09 - 15 00 02 69 03 - 15 00 02 6A 56 - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 04 - 15 00 02 6E 04 - 15 00 02 6F 88 - 15 00 02 70 00 - 15 00 02 71 00 - 15 00 02 72 06 - 15 00 02 73 7B - 15 00 02 74 00 - 15 00 02 75 F8 - 15 00 02 76 00 - 15 00 02 77 D5 - 15 00 02 78 2E - 15 00 02 79 12 - 15 00 02 7A 03 - 15 00 02 7B 00 - 15 00 02 7C 00 - 15 00 02 7D 03 - 15 00 02 7E 7B - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 60 - 15 00 02 0E 2A - 15 00 02 36 59 - 15 00 02 E0 00 - 15 00 02 80 01 - 15 00 02 E0 00 - 15 00 02 11 00 - 15 78 02 29 00 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - disp_timings0: display-timings { - native-mode = <&dsi0_timing0>; - dsi0_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - hsync-len = <20>; - hback-porch = <20>; - hfront-porch = <40>; - vsync-len = <4>; - vback-porch = <28>; - vfront-porch = <30>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <20>; + hback-porch = <20>; + hfront-porch = <40>; + vsync-len = <4>; + vback-porch = <28>; + vfront-porch = <30>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; + }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; }; - fragment@2 { - target = <&dsi1_in_vp1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&video_phy1>; - - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; }; }; +}; - fragment@5 { - target = <&dsi1_in_vp0>; - - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp1 { + status = "okay"; +}; - fragment@6 { - target = <&route_dsi1>; +&video_phy1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - connect = <&vp1_out_dsi1>; - }; - }; +&dsi1_in_vp0 { + status = "disabled"; +}; - fragment@7 { - target = <&i2c3>; +&route_dsi1 { + status = "okay"; + connect = <&vp1_out_dsi1>; +}; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; - #address-cells = <1>; - #size-cells = <0>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PB6 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_mipi>; - }; - }; + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PB6 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_mipi>; }; +}; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; +}; - fragment@9 { - target = <&pwm14>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&pwm14m0_pins>; - }; - }; +&pwm14 { + status = "okay"; + pinctrl-0 = <&pwm14m0_pins>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-raspberrypi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-raspberrypi-7inch-touchscreen.dts index 7c6abbb0..1f63ab4d 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-raspberrypi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-raspberrypi-7inch-touchscreen.dts @@ -12,124 +12,96 @@ exclusive = "dsi1"; description = "Enable Raspberry Pi 7-inch Touchscreen."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dsi1_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_dsi1>; - }; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; + port@1 { + reg = <1>; #address-cells = <1>; #size-cells = <0>; - rockpi_ft5406: rockpi_ft5406@38 { - compatible = "rockpi_ft5406"; - reg = <0x38>; - }; - - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + dsi1_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&dsi1_in_vp0>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "disabled"; - }; + rockpi_ft5406: rockpi_ft5406@38 { + compatible = "rockpi_ft5406"; + reg = <0x38>; }; - fragment@4 { - target = <&dsi1_in_vp1>; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; + }; - __overlay__ { - status = "okay"; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&route_dsi1>; +&dsi1_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi1_in_vp1 { + status = "okay"; +}; - fragment@6 { - target = <&video_phy1>; +&route_dsi1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&video_phy1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata0.dts index dd072d1e..87455f50 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata0.dts @@ -9,28 +9,16 @@ category = "misc"; description = "Enable SATA0.\nWhen SATA0 is enabled, USB3.0 cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&usbdrd_dwc3>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@1 { - target = <&usbdrd30>; - - __overlay__ { - status = "disabled"; - }; - }; +&usbdrd_dwc3 { + status = "disabled"; +}; - fragment@2 { - target = <&sata0>; +&usbdrd30 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&sata0 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata1.dts index 92c3278c..f3f5d10a 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata1.dts @@ -9,28 +9,16 @@ category = "misc"; description = "Enable SATA1.\nWhen SATA1 is enabled, USB3.0 cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&usbhost_dwc3>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@1 { - target = <&usbhost30>; - - __overlay__ { - status = "disabled"; - }; - }; +&usbhost_dwc3 { + status = "disabled"; +}; - fragment@2 { - target = <&sata1>; +&usbhost30 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&sata1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata2.dts index df94d893..fc94f663 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-sata2.dts @@ -9,20 +9,12 @@ category = "misc"; description = "Enable SATA2.\nWhen SATA2 is enabled, PCIe cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&pcie2x1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@1 { - target = <&sata2>; +&pcie2x1 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&sata2 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-v12-radxa-25w-poe.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-v12-radxa-25w-poe.dts index 10604e07..0ee75464 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3a-v12-radxa-25w-poe.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3a-v12-radxa-25w-poe.dts @@ -15,47 +15,40 @@ exclusive = "GPIO3_B7", "GPIO3_C3"; package = "rsetup-config-thermal-governor-step-wise"; }; +}; - fragment@0 { - target-path = "/"; - __overlay__ { - radxa_pow_w1: radxa-poe-w1 { - compatible = "w1-gpio"; - gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - radxa_poe_pwm: radxa-poe-pwm { - compatible = "pwm-gpio"; - #pwm-cells = <3>; - pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - }; +&{/} { + radxa_pow_w1: radxa-poe-w1 { + compatible = "w1-gpio"; + gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; - radxa_poe_fan: radxa-poe-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <4>; - cooling-levels = <0 64 128 192 255>; - pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; - }; - }; + radxa_poe_pwm: radxa-poe-pwm { + compatible = "pwm-gpio"; + #pwm-cells = <3>; + pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&soc_thermal>; + radxa_poe_fan: radxa-poe-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <4>; + cooling-levels = <0 64 128 192 255>; + pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; + }; +}; - __overlay__ { - cooling-maps { - map3 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map4 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; +&soc_thermal { + cooling-maps { + map3 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map4 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-okdo-5mp-camera.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-okdo-5mp-camera.dts index be3df802..d2e5398f 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-okdo-5mp-camera.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-okdo-5mp-camera.dts @@ -12,164 +12,124 @@ exclusive = "csi2_dphy0"; description = "Enable OKdo 5MP Camera."; }; +}; - fragment@0 { - target-path = "/"; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; - }; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; +}; - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; +&i2c5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OKDO-5MP"; + rockchip,camera-module-lens-name = "default"; + + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@1 { - target = <&i2c5>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; +&csi2_dphy0 { + status = "okay"; - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OKDO-5MP"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; - }; - }; - }; - - fragment@2 { - target = <&csi2_dphy_hw>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - - fragment@4 { - target = <&rkisp_vir0>; - __overlay__ { - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; }; }; }; +}; - fragment@5 { - target = <&rkisp_vir0>; - - __overlay__ { - status = "okay"; - }; - }; +&rkisp_vir0 { + status = "okay"; - fragment@6 { - target = <&rkisp>; + port { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkisp_mmu>; - - __overlay__ { - status = "okay"; - }; - }; +&rkisp_vir0 { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkisp { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp_mmu { + status = "okay"; +}; - fragment@9 { - target = <&rkcif>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-radxa-camera-8m.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-radxa-camera-8m.dts index 4ed92393..27eeb7f9 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-radxa-camera-8m.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-radxa-camera-8m.dts @@ -13,165 +13,129 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 8M 219."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - ext_cam_clk_imx219: ext-cam-clk-imx219 { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "ext_cam_clk_imx219"; - #clock-cells = <0>; - }; - - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + ext_cam_clk_imx219: ext-cam-clk-imx219 { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "ext_cam_clk_imx219"; + #clock-cells = <0>; }; - fragment@1 { - target = <&i2c5>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - camera_imx219: camera-imx219@10 { - status = "okay"; - compatible = "sony,imx219"; - reg = <0x10>; - clocks = <&ext_cam_clk_imx219>; - clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-8M"; - rockchip,camera-module-lens-name = "default"; - - port { - imx219_out: endpoint { - remote-endpoint = <&mipi_in_ucam1>; - data-lanes = <1 2>; - }; - }; - }; - }; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; }; - fragment@2 { - target = <&csi2_dphy_hw>; - - __overlay__ { - status = "okay"; - }; + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; }; +}; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&imx219_out>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; +&i2c5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + camera_imx219: camera-imx219@10 { + status = "okay"; + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&ext_cam_clk_imx219>; + clock-names = "xvclk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-8M"; + rockchip,camera-module-lens-name = "default"; + + port { + imx219_out: endpoint { + remote-endpoint = <&mipi_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@4 { - target = <&rkisp_vir0>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&csi2_dphy0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&imx219_out>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkisp>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; + }; }; }; +}; - fragment@6 { - target = <&rkisp_mmu>; +&rkisp_vir0 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkisp { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp_mmu { + status = "okay"; +}; - fragment@8 { - target = <&rkcif>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v1p3-ov5647.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v1p3-ov5647.dts index 20687af1..1dbd65ab 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v1p3-ov5647.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v1p3-ov5647.dts @@ -12,164 +12,124 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera v1.3."; }; +}; - fragment@0 { - target-path = "/"; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; - }; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; +}; - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; +&i2c5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v1p3"; + rockchip,camera-module-lens-name = "default"; + + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@1 { - target = <&i2c5>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; +&csi2_dphy0 { + status = "okay"; - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v1p3"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; - }; - }; - }; - - fragment@2 { - target = <&csi2_dphy_hw>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - - fragment@4 { - target = <&rkisp_vir0>; - __overlay__ { - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; }; }; }; +}; - fragment@5 { - target = <&rkisp_vir0>; - - __overlay__ { - status = "okay"; - }; - }; +&rkisp_vir0 { + status = "okay"; - fragment@6 { - target = <&rkisp>; + port { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkisp_mmu>; - - __overlay__ { - status = "okay"; - }; - }; +&rkisp_vir0 { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkisp { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp_mmu { + status = "okay"; +}; - fragment@9 { - target = <&rkcif>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v2-imx219.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v2-imx219.dts index 3d8eb037..ff4056e3 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v2-imx219.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3ab-rpi-camera-v2-imx219.dts @@ -13,165 +13,129 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera v2."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - ext_cam_clk_imx219: ext-cam-clk-imx219 { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "ext_cam_clk_imx219"; - #clock-cells = <0>; - }; - - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + ext_cam_clk_imx219: ext-cam-clk-imx219 { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "ext_cam_clk_imx219"; + #clock-cells = <0>; }; - fragment@1 { - target = <&i2c5>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - camera_imx219: camera-imx219@10 { - status = "okay"; - compatible = "sony,imx219"; - reg = <0x10>; - clocks = <&ext_cam_clk_imx219>; - clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "front"; - rockchip,camera-module-name = "rpi-camera-v2"; - rockchip,camera-module-lens-name = "default"; - - port { - imx219_out: endpoint { - remote-endpoint = <&mipi_in_ucam1>; - data-lanes = <1 2>; - }; - }; - }; - }; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; }; - fragment@2 { - target = <&csi2_dphy_hw>; - - __overlay__ { - status = "okay"; - }; + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; }; +}; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&imx219_out>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; +&i2c5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + camera_imx219: camera-imx219@10 { + status = "okay"; + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&ext_cam_clk_imx219>; + clock-names = "xvclk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "front"; + rockchip,camera-module-name = "rpi-camera-v2"; + rockchip,camera-module-lens-name = "default"; + + port { + imx219_out: endpoint { + remote-endpoint = <&mipi_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@4 { - target = <&rkisp_vir0>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&csi2_dphy0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&imx219_out>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkisp>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; + }; }; }; +}; - fragment@6 { - target = <&rkisp_mmu>; +&rkisp_vir0 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkisp { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp_mmu { + status = "okay"; +}; - fragment@8 { - target = <&rkcif>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-enable-hdmicec.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-enable-hdmicec.dts index d3ccc68f..20e9a746 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-enable-hdmicec.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-enable-hdmicec.dts @@ -8,12 +8,8 @@ category = "misc"; description = "Enable HDMI CEC."; }; +}; - fragment@0 { - target = <&hdmi>; - - __overlay__ { - pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; - }; - }; +&hdmi { + pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-hdmi-and-sharp-lq133t1jw01-edp-lcd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-hdmi-and-sharp-lq133t1jw01-edp-lcd.dts index cdb0dd90..eb4c1540 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-hdmi-and-sharp-lq133t1jw01-edp-lcd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-hdmi-and-sharp-lq133t1jw01-edp-lcd.dts @@ -12,208 +12,160 @@ category = "display"; description = "Enable Sharp LQ133T1JW01 display."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight_edp: backlight-edp { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm4 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; - }; - - vcc3v3_lcd_edp: vcc3v3-lcd-edp { - status = "okay"; - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "vcc3v3_lcd_edp"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - edp_panel: edp-panel { - status = "okay"; - compatible = "simple-panel"; - backlight = <&backlight_edp>; - power-supply = <&vcc3v3_lcd_edp>; - pinctrl-names = "default"; - prepare-delay-ms = <100>; - enable-delay-ms = <100>; - bpc = <8>; - width-mm = <305>; - height-mm = <107>; - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <241500000>; - hactive = <2560>; - vactive = <1440>; - hfront-porch = <80>; - hsync-len = <32>; - hback-porch = <48>; - vfront-porch = <31>; - vsync-len = <5>; - vback-porch = <3>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - panel_in_edp: endpoint { - remote-endpoint = <&edp_out_panel>; - }; - }; - }; - }; +&{/} { + backlight_edp: backlight-edp { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm4 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&pwm4>; - - __overlay__ { - status = "okay"; + vcc3v3_lcd_edp: vcc3v3-lcd-edp { + status = "okay"; + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "vcc3v3_lcd_edp"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@2 { - target = <&edp>; - - __overlay__ { - force-hpd; - status = "okay"; - - ports { - edp_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - edp_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_edp>; - }; - }; + edp_panel: edp-panel { + status = "okay"; + compatible = "simple-panel"; + backlight = <&backlight_edp>; + power-supply = <&vcc3v3_lcd_edp>; + pinctrl-names = "default"; + prepare-delay-ms = <100>; + enable-delay-ms = <100>; + bpc = <8>; + width-mm = <305>; + height-mm = <107>; + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <241500000>; + hactive = <2560>; + vactive = <1440>; + hfront-porch = <80>; + hsync-len = <32>; + hback-porch = <48>; + vfront-porch = <31>; + vsync-len = <5>; + vback-porch = <3>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; }; - }; - - fragment@3 { - target = <&edp_phy>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&edp_in_vp0>; - __overlay__ { - status = "okay"; + ports { + panel_in_edp: endpoint { + remote-endpoint = <&edp_out_panel>; + }; }; }; +}; - fragment@5 { - target = <&edp_in_vp1>; +&pwm4 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&edp { + force-hpd; + status = "okay"; - fragment@6 { - target = <&route_edp>; + ports { + edp_out: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - connect = <&vp0_out_edp>; + edp_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_edp>; + }; }; }; +}; - fragment@7 { - target = <&hdmi>; - - __overlay__ { - status = "disabled"; - }; - }; +&edp_phy { + status = "okay"; +}; - fragment@8 { - target = <&hdmi_in_vp0>; +&edp_in_vp0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&edp_in_vp1 { + status = "disabled"; +}; - fragment@9 { - target = <&hdmi_in_vp1>; +&route_edp { + status = "okay"; + connect = <&vp0_out_edp>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdmi { + status = "disabled"; +}; - fragment@10 { - target = <&hdmi_sound>; +&hdmi_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdmi_in_vp1 { + status = "disabled"; +}; - fragment@11 { - target = <&route_hdmi>; +&hdmi_sound { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - connect = <&vp1_out_hdmi>; - }; - }; +&route_hdmi { + status = "disabled"; + connect = <&vp1_out_hdmi>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-10p1inch-display.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-10p1inch-display.dts index 3357bd86..dabe1202 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-10p1inch-display.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-10p1inch-display.dts @@ -14,454 +14,410 @@ exclusive = "dsi0"; description = "Enable Radxa Display 10HD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_dsi0: vcc-lcd-dsi0 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - backlight_dsi0: backlight-dsi0 { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; +&{/} { + vcc_lcd_dsi0: vcc-lcd-dsi0 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - }; + backlight_dsi0: backlight-dsi0 { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; + +&pwm2 { + status = "okay"; +}; - fragment@2 { - target = <&dsi0>; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <480>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight_dsi0>; + + power-supply = <&vcc_lcd_dsi0>; + reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + stbyb-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <135>; + height-mm = <216>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 3B + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 AF + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B AF + 15 00 02 1C 00 + 15 00 02 35 26 + 15 00 02 37 09 + 15 00 02 38 04 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3C 78 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F 7F + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 42 81 + 15 00 02 43 14 + 15 00 02 44 23 + 15 00 02 45 28 + 15 00 02 55 02 + 15 00 02 57 69 + 15 00 02 59 0A + 15 00 02 5A 2A + 15 00 02 5B 17 + 15 00 02 5D 7F + 15 00 02 5E 6B + 15 00 02 5F 5C + 15 00 02 60 4F + 15 00 02 61 4D + 15 00 02 62 3F + 15 00 02 63 42 + 15 00 02 64 2B + 15 00 02 65 44 + 15 00 02 66 43 + 15 00 02 67 43 + 15 00 02 68 63 + 15 00 02 69 52 + 15 00 02 6A 5A + 15 00 02 6B 4F + 15 00 02 6C 4E + 15 00 02 6D 20 + 15 00 02 6E 0F + 15 00 02 6F 00 + 15 00 02 70 7F + 15 00 02 71 6B + 15 00 02 72 5C + 15 00 02 73 4F + 15 00 02 74 4D + 15 00 02 75 3F + 15 00 02 76 42 + 15 00 02 77 2B + 15 00 02 78 44 + 15 00 02 79 43 + 15 00 02 7A 43 + 15 00 02 7B 63 + 15 00 02 7C 52 + 15 00 02 7D 5A + 15 00 02 7E 4F + 15 00 02 7F 4E + 15 00 02 80 20 + 15 00 02 81 0F + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 02 + 15 00 02 01 02 + 15 00 02 02 00 + 15 00 02 03 00 + 15 00 02 04 1E + 15 00 02 05 1E + 15 00 02 06 1F + 15 00 02 07 1F + 15 00 02 08 1F + 15 00 02 09 17 + 15 00 02 0A 17 + 15 00 02 0B 37 + 15 00 02 0C 37 + 15 00 02 0D 47 + 15 00 02 0E 47 + 15 00 02 0F 45 + 15 00 02 10 45 + 15 00 02 11 4B + 15 00 02 12 4B + 15 00 02 13 49 + 15 00 02 14 49 + 15 00 02 15 1F + 15 00 02 16 01 + 15 00 02 17 01 + 15 00 02 18 00 + 15 00 02 19 00 + 15 00 02 1A 1E + 15 00 02 1B 1E + 15 00 02 1C 1F + 15 00 02 1D 1F + 15 00 02 1E 1F + 15 00 02 1F 17 + 15 00 02 20 17 + 15 00 02 21 37 + 15 00 02 22 37 + 15 00 02 23 46 + 15 00 02 24 46 + 15 00 02 25 44 + 15 00 02 26 44 + 15 00 02 27 4A + 15 00 02 28 4A + 15 00 02 29 48 + 15 00 02 2A 48 + 15 00 02 2B 1F + 15 00 02 2C 01 + 15 00 02 2D 01 + 15 00 02 2E 00 + 15 00 02 2F 00 + 15 00 02 30 1F + 15 00 02 31 1F + 15 00 02 32 1E + 15 00 02 33 1E + 15 00 02 34 1F + 15 00 02 35 17 + 15 00 02 36 17 + 15 00 02 37 37 + 15 00 02 38 37 + 15 00 02 39 08 + 15 00 02 3A 08 + 15 00 02 3B 0A + 15 00 02 3C 0A + 15 00 02 3D 04 + 15 00 02 3E 04 + 15 00 02 3F 06 + 15 00 02 40 06 + 15 00 02 41 1F + 15 00 02 42 02 + 15 00 02 43 02 + 15 00 02 44 00 + 15 00 02 45 00 + 15 00 02 46 1F + 15 00 02 47 1F + 15 00 02 48 1E + 15 00 02 49 1E + 15 00 02 4A 1F + 15 00 02 4B 17 + 15 00 02 4C 17 + 15 00 02 4D 37 + 15 00 02 4E 37 + 15 00 02 4F 09 + 15 00 02 50 09 + 15 00 02 51 0B + 15 00 02 52 0B + 15 00 02 53 05 + 15 00 02 54 05 + 15 00 02 55 07 + 15 00 02 56 07 + 15 00 02 57 1F + 15 00 02 58 40 + 15 00 02 5B 30 + 15 00 02 5C 16 + 15 00 02 5D 34 + 15 00 02 5E 05 + 15 00 02 5F 02 + 15 00 02 63 00 + 15 00 02 64 6A + 15 00 02 67 73 + 15 00 02 68 1D + 15 00 02 69 08 + 15 00 02 6A 6A + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 00 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 75 FF + 15 00 02 77 DD + 15 00 02 78 3F + 15 00 02 79 15 + 15 00 02 7A 17 + 15 00 02 7D 14 + 15 00 02 7E 82 + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 61 + 15 00 02 0E 48 + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 0C + 05 78 01 11 + 05 14 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display_timings0: display-timings { + native-mode = <&dsi1_timing0>; + + dsi1_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + + hsync-len = <18>; + hback-porch = <20>; + hfront-porch = <40>; + + vsync-len = <4>; + vback-porch = <20>; + vfront-porch = <20>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <1>; + }; + }; - __overlay__ { - status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; - rockchip,lane-rate = <480>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&backlight_dsi0>; - - power-supply = <&vcc_lcd_dsi0>; - reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - stbyb-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <135>; - height-mm = <216>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 3B - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 AF - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B AF - 15 00 02 1C 00 - 15 00 02 35 26 - 15 00 02 37 09 - 15 00 02 38 04 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3C 78 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F 7F - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 42 81 - 15 00 02 43 14 - 15 00 02 44 23 - 15 00 02 45 28 - 15 00 02 55 02 - 15 00 02 57 69 - 15 00 02 59 0A - 15 00 02 5A 2A - 15 00 02 5B 17 - 15 00 02 5D 7F - 15 00 02 5E 6B - 15 00 02 5F 5C - 15 00 02 60 4F - 15 00 02 61 4D - 15 00 02 62 3F - 15 00 02 63 42 - 15 00 02 64 2B - 15 00 02 65 44 - 15 00 02 66 43 - 15 00 02 67 43 - 15 00 02 68 63 - 15 00 02 69 52 - 15 00 02 6A 5A - 15 00 02 6B 4F - 15 00 02 6C 4E - 15 00 02 6D 20 - 15 00 02 6E 0F - 15 00 02 6F 00 - 15 00 02 70 7F - 15 00 02 71 6B - 15 00 02 72 5C - 15 00 02 73 4F - 15 00 02 74 4D - 15 00 02 75 3F - 15 00 02 76 42 - 15 00 02 77 2B - 15 00 02 78 44 - 15 00 02 79 43 - 15 00 02 7A 43 - 15 00 02 7B 63 - 15 00 02 7C 52 - 15 00 02 7D 5A - 15 00 02 7E 4F - 15 00 02 7F 4E - 15 00 02 80 20 - 15 00 02 81 0F - 15 00 02 82 00 - 15 00 02 E0 02 - 15 00 02 00 02 - 15 00 02 01 02 - 15 00 02 02 00 - 15 00 02 03 00 - 15 00 02 04 1E - 15 00 02 05 1E - 15 00 02 06 1F - 15 00 02 07 1F - 15 00 02 08 1F - 15 00 02 09 17 - 15 00 02 0A 17 - 15 00 02 0B 37 - 15 00 02 0C 37 - 15 00 02 0D 47 - 15 00 02 0E 47 - 15 00 02 0F 45 - 15 00 02 10 45 - 15 00 02 11 4B - 15 00 02 12 4B - 15 00 02 13 49 - 15 00 02 14 49 - 15 00 02 15 1F - 15 00 02 16 01 - 15 00 02 17 01 - 15 00 02 18 00 - 15 00 02 19 00 - 15 00 02 1A 1E - 15 00 02 1B 1E - 15 00 02 1C 1F - 15 00 02 1D 1F - 15 00 02 1E 1F - 15 00 02 1F 17 - 15 00 02 20 17 - 15 00 02 21 37 - 15 00 02 22 37 - 15 00 02 23 46 - 15 00 02 24 46 - 15 00 02 25 44 - 15 00 02 26 44 - 15 00 02 27 4A - 15 00 02 28 4A - 15 00 02 29 48 - 15 00 02 2A 48 - 15 00 02 2B 1F - 15 00 02 2C 01 - 15 00 02 2D 01 - 15 00 02 2E 00 - 15 00 02 2F 00 - 15 00 02 30 1F - 15 00 02 31 1F - 15 00 02 32 1E - 15 00 02 33 1E - 15 00 02 34 1F - 15 00 02 35 17 - 15 00 02 36 17 - 15 00 02 37 37 - 15 00 02 38 37 - 15 00 02 39 08 - 15 00 02 3A 08 - 15 00 02 3B 0A - 15 00 02 3C 0A - 15 00 02 3D 04 - 15 00 02 3E 04 - 15 00 02 3F 06 - 15 00 02 40 06 - 15 00 02 41 1F - 15 00 02 42 02 - 15 00 02 43 02 - 15 00 02 44 00 - 15 00 02 45 00 - 15 00 02 46 1F - 15 00 02 47 1F - 15 00 02 48 1E - 15 00 02 49 1E - 15 00 02 4A 1F - 15 00 02 4B 17 - 15 00 02 4C 17 - 15 00 02 4D 37 - 15 00 02 4E 37 - 15 00 02 4F 09 - 15 00 02 50 09 - 15 00 02 51 0B - 15 00 02 52 0B - 15 00 02 53 05 - 15 00 02 54 05 - 15 00 02 55 07 - 15 00 02 56 07 - 15 00 02 57 1F - 15 00 02 58 40 - 15 00 02 5B 30 - 15 00 02 5C 16 - 15 00 02 5D 34 - 15 00 02 5E 05 - 15 00 02 5F 02 - 15 00 02 63 00 - 15 00 02 64 6A - 15 00 02 67 73 - 15 00 02 68 1D - 15 00 02 69 08 - 15 00 02 6A 6A - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 00 - 15 00 02 6E 00 - 15 00 02 6F 88 - 15 00 02 75 FF - 15 00 02 77 DD - 15 00 02 78 3F - 15 00 02 79 15 - 15 00 02 7A 17 - 15 00 02 7D 14 - 15 00 02 7E 82 - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 61 - 15 00 02 0E 48 - 15 00 02 E0 00 - 15 00 02 E6 02 - 15 00 02 E7 0C - 05 78 01 11 - 05 14 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display_timings0: display-timings { - native-mode = <&dsi1_timing0>; - - dsi1_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - - hsync-len = <18>; - hback-porch = <20>; - hfront-porch = <40>; - - vsync-len = <4>; - vback-porch = <20>; - vfront-porch = <20>; - - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <1>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@4 { - target = <&video_phy0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&dsi0_in_vp0>; - - __overlay__ { - status = "disabled"; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; + }; }; }; +}; - fragment@6 { - target = <&dsi0_in_vp1>; - - __overlay__ { - status = "okay"; - }; - }; +&video_phy0 { + status = "okay"; +}; - fragment@7 { - target = <&vp0_out_dsi0>; +&dsi0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi0_in_vp1 { + status = "okay"; +}; - fragment@8 { - target = <&vp1_out_dsi0>; +&vp0_out_dsi0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&vp1_out_dsi0 { + status = "okay"; +}; - fragment@9 { - target = <&route_dsi0>; +&route_dsi0 { + status = "okay"; + connect = <&vp1_out_dsi0>; +}; - __overlay__ { - status = "okay"; - connect = <&vp1_out_dsi0>; - }; +&i2c2 { + status = "okay"; + pinctrl-0 = <&i2c2m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&touch_gpio>; + focaltech,irq-gpio = <&gpio3 RK_PC4 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + focaltech,max-touch-number = <5>; + focaltech,display-coords = <0 0 800 1280>; }; +}; - fragment@10 { - target = <&i2c2>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c2m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&touch_gpio>; - focaltech,irq-gpio = <&gpio3 RK_PC4 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - focaltech,max-touch-number = <5>; - focaltech,display-coords = <0 0 800 1280>; - }; +&pinctrl { + dsi0-lcd { + dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@11 { - target = <&pinctrl>; - - __overlay__ { - dsi0-lcd { - dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - touch { - touch_gpio: touch-gpio { - rockchip,pins = - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; + touch { + touch_gpio: touch-gpio { + rockchip,pins = + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-25w-poe.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-25w-poe.dts index e44937ec..6802f0cb 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-25w-poe.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-25w-poe.dts @@ -15,47 +15,40 @@ exclusive = "GPIO0_B5", "GPIO3_C3"; package = "rsetup-config-thermal-governor-step-wise"; }; +}; - fragment@0 { - target-path = "/"; - __overlay__ { - radxa_pow_w1: radxa-poe-w1 { - compatible = "w1-gpio"; - gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - radxa_poe_pwm: radxa-poe-pwm { - compatible = "pwm-gpio"; - #pwm-cells = <3>; - pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - }; +&{/} { + radxa_pow_w1: radxa-poe-w1 { + compatible = "w1-gpio"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; - radxa_poe_fan: radxa-poe-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <4>; - cooling-levels = <0 64 128 192 255>; - pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; - }; - }; + radxa_poe_pwm: radxa-poe-pwm { + compatible = "pwm-gpio"; + #pwm-cells = <3>; + pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&soc_thermal>; + radxa_poe_fan: radxa-poe-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <4>; + cooling-levels = <0 64 128 192 255>; + pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; + }; +}; - __overlay__ { - cooling-maps { - map3 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map4 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; +&soc_thermal { + cooling-maps { + map3 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map4 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-5inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-5inch-touchscreen.dts index cf3969db..7deb5d24 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-5inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-5inch-touchscreen.dts @@ -12,120 +12,92 @@ exclusive = "dsi1"; description = "Enable Radxa 5-inch Touchscreen."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; + port@0 { + reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dsi1_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; + port@1 { + reg = <1>; #address-cells = <1>; #size-cells = <0>; - rockpi_ft5406: rockpi_ft5406@38 { - compatible = "rockpi_ft5406"; - reg = <0x38>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + dsi1_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&video_phy1>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + rockpi_ft5406: rockpi_ft5406@38 { + compatible = "rockpi_ft5406"; + reg = <0x38>; }; - fragment@4 { - target = <&dsi1_in_vp0>; - - __overlay__ { - status = "disabled"; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&dsi1_in_vp1>; +&video_phy1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi1_in_vp0 { + status = "disabled"; +}; - fragment@6 { - target = <&route_dsi1>; +&dsi1_in_vp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&route_dsi1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-8inch-display.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-8inch-display.dts index eff10ca7..a2cc6350 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-8inch-display.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-8inch-display.dts @@ -14,431 +14,387 @@ exclusive = "dsi0"; description = "Enable Radxa Display 8HD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_dsi0: vcc-lcd-dsi0 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - backlight_dsi0: backlight-dsi0 { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; +&{/} { + vcc_lcd_dsi0: vcc-lcd-dsi0 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - }; + backlight_dsi0: backlight-dsi0 { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; + +&pwm2 { + status = "okay"; +}; - fragment@2 { - target = <&dsi0>; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <480>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight_dsi0>; + + power-supply = <&vcc_lcd_dsi0>; + reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + stbyb-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <135>; + height-mm = <216>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 7E + 15 00 02 03 00 + 15 00 02 04 65 + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 B7 + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B B7 + 15 00 02 1C 00 + 15 00 02 24 FE + 15 00 02 37 19 + 15 00 02 38 05 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3B 01 + 15 00 02 3C 70 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 1E + 15 00 02 44 0F + 15 00 02 45 28 + 15 00 02 4B 04 + 15 00 02 55 02 + 15 00 02 56 01 + 15 00 02 57 A9 + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 37 + 15 00 02 5B 19 + 15 00 02 5D 78 + 15 00 02 5E 63 + 15 00 02 5F 54 + 15 00 02 60 49 + 15 00 02 61 45 + 15 00 02 62 38 + 15 00 02 63 3D + 15 00 02 64 28 + 15 00 02 65 43 + 15 00 02 66 41 + 15 00 02 67 43 + 15 00 02 68 62 + 15 00 02 69 50 + 15 00 02 6A 57 + 15 00 02 6B 49 + 15 00 02 6C 44 + 15 00 02 6D 37 + 15 00 02 6E 23 + 15 00 02 6F 10 + 15 00 02 70 78 + 15 00 02 71 63 + 15 00 02 72 54 + 15 00 02 73 49 + 15 00 02 74 45 + 15 00 02 75 38 + 15 00 02 76 3D + 15 00 02 77 28 + 15 00 02 78 43 + 15 00 02 79 41 + 15 00 02 7A 43 + 15 00 02 7B 62 + 15 00 02 7C 50 + 15 00 02 7D 57 + 15 00 02 7E 49 + 15 00 02 7F 44 + 15 00 02 80 37 + 15 00 02 81 23 + 15 00 02 82 10 + 15 00 02 E0 02 + 15 00 02 00 47 + 15 00 02 01 47 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 4B + 15 00 02 05 4B + 15 00 02 06 49 + 15 00 02 07 49 + 15 00 02 08 41 + 15 00 02 09 1F + 15 00 02 0A 1F + 15 00 02 0B 1F + 15 00 02 0C 1F + 15 00 02 0D 1F + 15 00 02 0E 1F + 15 00 02 0F 5F + 15 00 02 10 5F + 15 00 02 11 57 + 15 00 02 12 77 + 15 00 02 13 35 + 15 00 02 14 1F + 15 00 02 15 1F + 15 00 02 16 46 + 15 00 02 17 46 + 15 00 02 18 44 + 15 00 02 19 44 + 15 00 02 1A 4A + 15 00 02 1B 4A + 15 00 02 1C 48 + 15 00 02 1D 48 + 15 00 02 1E 40 + 15 00 02 1F 1F + 15 00 02 20 1F + 15 00 02 21 1F + 15 00 02 22 1F + 15 00 02 23 1F + 15 00 02 24 1F + 15 00 02 25 5F + 15 00 02 26 5F + 15 00 02 27 57 + 15 00 02 28 77 + 15 00 02 29 35 + 15 00 02 2A 1F + 15 00 02 2B 1F + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 10 + 15 00 02 5C 06 + 15 00 02 5D 40 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 30 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 03 + 15 00 02 64 6B + 15 00 02 65 05 + 15 00 02 66 0C + 15 00 02 67 73 + 15 00 02 68 09 + 15 00 02 69 03 + 15 00 02 6A 56 + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 04 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 D5 + 15 00 02 78 2E + 15 00 02 79 12 + 15 00 02 7A 03 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 60 + 15 00 02 0E 2A + 15 00 02 36 59 + 15 00 02 E0 00 + 05 78 01 11 + 05 14 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display_timings0: display-timings { + native-mode = <&dsi1_timing0>; + + dsi1_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + + hsync-len = <18>; + hback-porch = <20>; + hfront-porch = <40>; + + vsync-len = <4>; + vback-porch = <20>; + vfront-porch = <20>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <1>; + }; + }; - __overlay__ { - status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; - rockchip,lane-rate = <480>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&backlight_dsi0>; - - power-supply = <&vcc_lcd_dsi0>; - reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - stbyb-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <135>; - height-mm = <216>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 7E - 15 00 02 03 00 - 15 00 02 04 65 - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 B7 - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B B7 - 15 00 02 1C 00 - 15 00 02 24 FE - 15 00 02 37 19 - 15 00 02 38 05 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3B 01 - 15 00 02 3C 70 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F FF - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 43 1E - 15 00 02 44 0F - 15 00 02 45 28 - 15 00 02 4B 04 - 15 00 02 55 02 - 15 00 02 56 01 - 15 00 02 57 A9 - 15 00 02 58 0A - 15 00 02 59 0A - 15 00 02 5A 37 - 15 00 02 5B 19 - 15 00 02 5D 78 - 15 00 02 5E 63 - 15 00 02 5F 54 - 15 00 02 60 49 - 15 00 02 61 45 - 15 00 02 62 38 - 15 00 02 63 3D - 15 00 02 64 28 - 15 00 02 65 43 - 15 00 02 66 41 - 15 00 02 67 43 - 15 00 02 68 62 - 15 00 02 69 50 - 15 00 02 6A 57 - 15 00 02 6B 49 - 15 00 02 6C 44 - 15 00 02 6D 37 - 15 00 02 6E 23 - 15 00 02 6F 10 - 15 00 02 70 78 - 15 00 02 71 63 - 15 00 02 72 54 - 15 00 02 73 49 - 15 00 02 74 45 - 15 00 02 75 38 - 15 00 02 76 3D - 15 00 02 77 28 - 15 00 02 78 43 - 15 00 02 79 41 - 15 00 02 7A 43 - 15 00 02 7B 62 - 15 00 02 7C 50 - 15 00 02 7D 57 - 15 00 02 7E 49 - 15 00 02 7F 44 - 15 00 02 80 37 - 15 00 02 81 23 - 15 00 02 82 10 - 15 00 02 E0 02 - 15 00 02 00 47 - 15 00 02 01 47 - 15 00 02 02 45 - 15 00 02 03 45 - 15 00 02 04 4B - 15 00 02 05 4B - 15 00 02 06 49 - 15 00 02 07 49 - 15 00 02 08 41 - 15 00 02 09 1F - 15 00 02 0A 1F - 15 00 02 0B 1F - 15 00 02 0C 1F - 15 00 02 0D 1F - 15 00 02 0E 1F - 15 00 02 0F 5F - 15 00 02 10 5F - 15 00 02 11 57 - 15 00 02 12 77 - 15 00 02 13 35 - 15 00 02 14 1F - 15 00 02 15 1F - 15 00 02 16 46 - 15 00 02 17 46 - 15 00 02 18 44 - 15 00 02 19 44 - 15 00 02 1A 4A - 15 00 02 1B 4A - 15 00 02 1C 48 - 15 00 02 1D 48 - 15 00 02 1E 40 - 15 00 02 1F 1F - 15 00 02 20 1F - 15 00 02 21 1F - 15 00 02 22 1F - 15 00 02 23 1F - 15 00 02 24 1F - 15 00 02 25 5F - 15 00 02 26 5F - 15 00 02 27 57 - 15 00 02 28 77 - 15 00 02 29 35 - 15 00 02 2A 1F - 15 00 02 2B 1F - 15 00 02 58 40 - 15 00 02 59 00 - 15 00 02 5A 00 - 15 00 02 5B 10 - 15 00 02 5C 06 - 15 00 02 5D 40 - 15 00 02 5E 01 - 15 00 02 5F 02 - 15 00 02 60 30 - 15 00 02 61 01 - 15 00 02 62 02 - 15 00 02 63 03 - 15 00 02 64 6B - 15 00 02 65 05 - 15 00 02 66 0C - 15 00 02 67 73 - 15 00 02 68 09 - 15 00 02 69 03 - 15 00 02 6A 56 - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 04 - 15 00 02 6E 04 - 15 00 02 6F 88 - 15 00 02 70 00 - 15 00 02 71 00 - 15 00 02 72 06 - 15 00 02 73 7B - 15 00 02 74 00 - 15 00 02 75 F8 - 15 00 02 76 00 - 15 00 02 77 D5 - 15 00 02 78 2E - 15 00 02 79 12 - 15 00 02 7A 03 - 15 00 02 7B 00 - 15 00 02 7C 00 - 15 00 02 7D 03 - 15 00 02 7E 7B - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 60 - 15 00 02 0E 2A - 15 00 02 36 59 - 15 00 02 E0 00 - 05 78 01 11 - 05 14 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display_timings0: display-timings { - native-mode = <&dsi1_timing0>; - - dsi1_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - - hsync-len = <18>; - hback-porch = <20>; - hfront-porch = <40>; - - vsync-len = <4>; - vback-porch = <20>; - vfront-porch = <20>; - - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <1>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@4 { - target = <&video_phy0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&dsi0_in_vp0>; - - __overlay__ { - status = "disabled"; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; + }; }; }; +}; - fragment@6 { - target = <&dsi0_in_vp1>; - - __overlay__ { - status = "okay"; - }; - }; +&video_phy0 { + status = "okay"; +}; - fragment@7 { - target = <&vp0_out_dsi0>; +&dsi0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi0_in_vp1 { + status = "okay"; +}; - fragment@8 { - target = <&vp1_out_dsi0>; +&vp0_out_dsi0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&vp1_out_dsi0 { + status = "okay"; +}; - fragment@9 { - target = <&route_dsi0>; +&route_dsi0 { + status = "okay"; + connect = <&vp1_out_dsi0>; +}; - __overlay__ { - status = "okay"; - connect = <&vp1_out_dsi0>; - }; +&i2c2 { + status = "okay"; + pinctrl-0 = <&i2c2m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio3 RK_PC4 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc3v3_sys>; }; +}; - fragment@10 { - target = <&i2c2>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c2m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio3 RK_PC4 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc3v3_sys>; - }; +&pinctrl { + dsi0-lcd { + dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@11 { - target = <&pinctrl>; - - __overlay__ { - dsi0-lcd { - dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-display-10fhd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-display-10fhd.dts index 8548d7cd..51fb1f86 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-display-10fhd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-radxa-display-10fhd.dts @@ -14,260 +14,216 @@ exclusive = "dsi0"; description = "Enable Radxa Display 10FHD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_dsi0: vcc-lcd-dsi0 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - backlight_dsi0: backlight-dsi0 { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; +&{/} { + vcc_lcd_dsi0: vcc-lcd-dsi0 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - }; + backlight_dsi0: backlight-dsi0 { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; + +&pwm2 { + status = "okay"; +}; - fragment@2 { - target = <&dsi0>; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight_dsi0>; + + power-supply = <&vcc_lcd_dsi0>; + reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <135>; + height-mm = <217>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 05 78 01 11 + 05 00 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display_timings0: display-timings { + native-mode = <&dsi1_timing0>; + + dsi1_timing0: timing0 { + clock-frequency = <160000000>; + hactive = <1200>; + vactive = <1920>; + + vback-porch = <25>; + vfront-porch = <35>; + + hback-porch = <60>; + hfront-porch = <80>; + + hsync-len = <1>; + vsync-len = <1>; + + vsync-active = <0>; + hsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; - __overlay__ { - status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&backlight_dsi0>; - - power-supply = <&vcc_lcd_dsi0>; - reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <135>; - height-mm = <217>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 05 78 01 11 - 05 00 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display_timings0: display-timings { - native-mode = <&dsi1_timing0>; - - dsi1_timing0: timing0 { - clock-frequency = <160000000>; - hactive = <1200>; - vactive = <1920>; - - vback-porch = <25>; - vfront-porch = <35>; - - hback-porch = <60>; - hfront-porch = <80>; - - hsync-len = <1>; - vsync-len = <1>; - - vsync-active = <0>; - hsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@4 { - target = <&video_phy0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&dsi0_in_vp0>; - - __overlay__ { - status = "disabled"; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; + }; }; }; +}; - fragment@6 { - target = <&dsi0_in_vp1>; - - __overlay__ { - status = "okay"; - }; - }; +&video_phy0 { + status = "okay"; +}; - fragment@7 { - target = <&vp0_out_dsi0>; +&dsi0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi0_in_vp1 { + status = "okay"; +}; - fragment@8 { - target = <&vp1_out_dsi0>; +&vp0_out_dsi0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&vp1_out_dsi0 { + status = "okay"; +}; - fragment@9 { - target = <&route_dsi0>; +&route_dsi0 { + status = "okay"; + connect = <&vp1_out_dsi0>; +}; - __overlay__ { - status = "okay"; - connect = <&vp1_out_dsi0>; - }; +&i2c2 { + status = "okay"; + pinctrl-0 = <&i2c2m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio3 RK_PC4 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1920>; + tp-size = <9271>; }; +}; - fragment@10 { - target = <&i2c2>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c2m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio3 RK_PC4 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1920>; - tp-size = <9271>; - }; +&pinctrl { + dsi0-lcd { + dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@11 { - target = <&pinctrl>; - - __overlay__ { - dsi0-lcd { - dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { - rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, - <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-raspberrypi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-raspberrypi-7inch-touchscreen.dts index 70ffceb9..d8c2923e 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-raspberrypi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-raspberrypi-7inch-touchscreen.dts @@ -12,124 +12,96 @@ exclusive = "dsi1"; description = "Enable Raspberry Pi 7-inch Touchscreen."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dsi1_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_dsi1>; - }; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; + port@1 { + reg = <1>; #address-cells = <1>; #size-cells = <0>; - rockpi_ft5406: rockpi_ft5406@38 { - compatible = "rockpi_ft5406"; - reg = <0x38>; - }; - - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + dsi1_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&dsi1_in_vp0>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "disabled"; - }; + rockpi_ft5406: rockpi_ft5406@38 { + compatible = "rockpi_ft5406"; + reg = <0x38>; }; - fragment@4 { - target = <&dsi1_in_vp1>; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; + }; - __overlay__ { - status = "okay"; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&route_dsi1>; +&dsi1_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi1_in_vp1 { + status = "okay"; +}; - fragment@6 { - target = <&video_phy1>; +&route_dsi1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&video_phy1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-sata2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-sata2.dts index c75cb779..d9deb5a1 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3b-sata2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3b-sata2.dts @@ -9,21 +9,13 @@ exclusive = "pcie2x1", "sata2"; description = "Enable SATA2.\nFor HW < 1.5, the signal is routed to M.2 B key.\nFor HW >= V1.5, the signal is routed to M.2 E key.\nWhen SATA2 is enabled, PCIe cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&pcie2x1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@1 { - target = <&sata2>; +&pcie2x1 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - phy-supply = <&vcc3v3_sys>; - }; - }; +&sata2 { + status = "okay"; + phy-supply = <&vcc3v3_sys>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-okdo-5mp-camera.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-okdo-5mp-camera.dts index 706c7f3e..2fc202b7 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-okdo-5mp-camera.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-okdo-5mp-camera.dts @@ -10,12 +10,8 @@ category = "camera"; description = "Enable OKdo 5MP Camera."; }; +}; - fragment@10 { - target = <&ov5647>; - - __overlay__ { - rockchip,camera-module-name = "OKDO-5MP"; - }; - }; +&ov5647 { + rockchip,camera-module-name = "OKDO-5MP"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-ov5647.dtsi b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-ov5647.dtsi index 7166c7a9..0ae3a67c 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-ov5647.dtsi +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-ov5647.dtsi @@ -1,164 +1,122 @@ #include #include -/ { - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; - }; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OV5647"; + rockchip,camera-module-lens-name = "default"; + + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@1 { - target = <&i2c2>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2m1_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OV5647"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; - }; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@2 { - target = <&csi2_dphy_hw>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@4 { - target = <&rkisp_vir0>; - - __overlay__ { - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; }; }; }; +}; - fragment@5 { - target = <&rkisp_vir0>; - - __overlay__ { - status = "okay"; - }; - }; +&rkisp_vir0 { + status = "okay"; - fragment@6 { - target = <&rkisp>; + port { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkisp_mmu>; +&rkisp_vir0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkisp_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif_mmu { + status = "okay"; +}; - fragment@9 { - target = <&rkcif>; - - __overlay__ { - status = "okay"; - }; - }; -}; \ No newline at end of file +&rkcif { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-25w-poe.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-25w-poe.dts index a3304e6e..8fd9132a 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-25w-poe.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-25w-poe.dts @@ -15,47 +15,40 @@ exclusive = "GPIO3_C3", "GPIO3_C4"; package = "rsetup-config-thermal-governor-step-wise"; }; +}; - fragment@0 { - target-path = "/"; - __overlay__ { - radxa_pow_w1: radxa-poe-w1 { - compatible = "w1-gpio"; - gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - radxa_poe_pwm: radxa-poe-pwm { - compatible = "pwm-gpio"; - #pwm-cells = <3>; - pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - }; +&{/} { + radxa_pow_w1: radxa-poe-w1 { + compatible = "w1-gpio"; + gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; - radxa_poe_fan: radxa-poe-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <4>; - cooling-levels = <0 64 128 192 255>; - pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; - }; - }; + radxa_poe_pwm: radxa-poe-pwm { + compatible = "pwm-gpio"; + #pwm-cells = <3>; + pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&soc_thermal>; + radxa_poe_fan: radxa-poe-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <4>; + cooling-levels = <0 64 128 192 255>; + pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; + }; +}; - __overlay__ { - cooling-maps { - map3 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map4 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; +&soc_thermal { + cooling-maps { + map3 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map4 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-5inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-5inch-touchscreen.dts index 874cd2f3..4ad695db 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-5inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-5inch-touchscreen.dts @@ -12,128 +12,96 @@ exclusive = "video_phy1"; description = "Enable Radxa 5-inch Touchscreen."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dsi1_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_dsi1>; - }; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; + port@1 { + reg = <1>; #address-cells = <1>; #size-cells = <0>; - rockpi_ft5406: rockpi_ft5406@38 { - compatible = "rockpi_ft5406"; - reg = <0x38>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + dsi1_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&dsi1_in_vp0>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + rockpi_ft5406: rockpi_ft5406@38 { + compatible = "rockpi_ft5406"; + reg = <0x38>; }; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp0_out_dsi1>; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&hdmi>; - - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp0 { + status = "okay"; +}; - fragment@6 { - target = <&hdmi_in_vp0>; +&route_dsi1 { + status = "okay"; + connect = <&vp0_out_dsi1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdmi { + status = "disabled"; +}; - fragment@7 { - target = <&video_phy1>; +&hdmi_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&video_phy1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-camera-8m.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-camera-8m.dts index 85db473e..49dd26da 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-camera-8m.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-camera-8m.dts @@ -13,165 +13,129 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 8M 219."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_24m: external-camera-clock-24m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + clk_cam_24m: external-camera-clock-24m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; }; - fragment@1 { - target = <&i2c2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2m1_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - camera_imx219: camera-imx219@10 { - status = "okay"; - compatible = "sony,imx219"; - reg = <0x10>; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-8M"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; - }; - }; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; }; - fragment@2 { - target = <&csi2_dphy_hw>; - - __overlay__ { - status = "okay"; - }; + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; }; +}; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + camera_imx219: camera-imx219@10 { + status = "okay"; + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-8M"; + rockchip,camera-module-lens-name = "default"; + + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@4 { - target = <&rkisp_vir0>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&csi2_dphy0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkisp>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; + }; }; }; +}; - fragment@6 { - target = <&rkisp_mmu>; +&rkisp_vir0 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkisp { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp_mmu { + status = "okay"; +}; - fragment@8 { - target = <&rkcif>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-10hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-10hd.dts index 26d61a94..38c9700a 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-10hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-10hd.dts @@ -14,429 +14,389 @@ exclusive = "video_phy1","GPIO2_B3","GPIO3_B1","GPIO3_B2"; description = "Enable Radxa Display 10HD"; }; +}; + +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + enable-active-high; + regulator-always-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + }; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - enable-active-high; - regulator-always-on; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - }; - - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm14 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm14 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; +}; + +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + power-supply = <&vcc_mipi>; + width-mm = <135>; + height-mm = <216>; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <2>; + + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 3B + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 AF + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B AF + 15 00 02 1C 00 + 15 00 02 35 26 + 15 00 02 37 09 + 15 00 02 38 04 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3C 78 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F 7F + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 42 81 + 15 00 02 43 14 + 15 00 02 44 23 + 15 00 02 45 28 + 15 00 02 55 02 + 15 00 02 57 69 + 15 00 02 59 0A + 15 00 02 5A 2A + 15 00 02 5B 17 + 15 00 02 5D 7F + 15 00 02 5E 6B + 15 00 02 5F 5C + 15 00 02 60 4F + 15 00 02 61 4D + 15 00 02 62 3F + 15 00 02 63 42 + 15 00 02 64 2B + 15 00 02 65 44 + 15 00 02 66 43 + 15 00 02 67 43 + 15 00 02 68 63 + 15 00 02 69 52 + 15 00 02 6A 5A + 15 00 02 6B 4F + 15 00 02 6C 4E + 15 00 02 6D 20 + 15 00 02 6E 0F + 15 00 02 6F 00 + 15 00 02 70 7F + 15 00 02 71 6B + 15 00 02 72 5C + 15 00 02 73 4F + 15 00 02 74 4D + 15 00 02 75 3F + 15 00 02 76 42 + 15 00 02 77 2B + 15 00 02 78 44 + 15 00 02 79 43 + 15 00 02 7A 43 + 15 00 02 7B 63 + 15 00 02 7C 52 + 15 00 02 7D 5A + 15 00 02 7E 4F + 15 00 02 7F 4E + 15 00 02 80 20 + 15 00 02 81 0F + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 02 + 15 00 02 01 02 + 15 00 02 02 00 + 15 00 02 03 00 + 15 00 02 04 1E + 15 00 02 05 1E + 15 00 02 06 1F + 15 00 02 07 1F + 15 00 02 08 1F + 15 00 02 09 17 + 15 00 02 0A 17 + 15 00 02 0B 37 + 15 00 02 0C 37 + 15 00 02 0D 47 + 15 00 02 0E 47 + 15 00 02 0F 45 + 15 00 02 10 45 + 15 00 02 11 4B + 15 00 02 12 4B + 15 00 02 13 49 + 15 00 02 14 49 + 15 00 02 15 1F + 15 00 02 16 01 + 15 00 02 17 01 + 15 00 02 18 00 + 15 00 02 19 00 + 15 00 02 1A 1E + 15 00 02 1B 1E + 15 00 02 1C 1F + 15 00 02 1D 1F + 15 00 02 1E 1F + 15 00 02 1F 17 + 15 00 02 20 17 + 15 00 02 21 37 + 15 00 02 22 37 + 15 00 02 23 46 + 15 00 02 24 46 + 15 00 02 25 44 + 15 00 02 26 44 + 15 00 02 27 4A + 15 00 02 28 4A + 15 00 02 29 48 + 15 00 02 2A 48 + 15 00 02 2B 1F + 15 00 02 2C 01 + 15 00 02 2D 01 + 15 00 02 2E 00 + 15 00 02 2F 00 + 15 00 02 30 1F + 15 00 02 31 1F + 15 00 02 32 1E + 15 00 02 33 1E + 15 00 02 34 1F + 15 00 02 35 17 + 15 00 02 36 17 + 15 00 02 37 37 + 15 00 02 38 37 + 15 00 02 39 08 + 15 00 02 3A 08 + 15 00 02 3B 0A + 15 00 02 3C 0A + 15 00 02 3D 04 + 15 00 02 3E 04 + 15 00 02 3F 06 + 15 00 02 40 06 + 15 00 02 41 1F + 15 00 02 42 02 + 15 00 02 43 02 + 15 00 02 44 00 + 15 00 02 45 00 + 15 00 02 46 1F + 15 00 02 47 1F + 15 00 02 48 1E + 15 00 02 49 1E + 15 00 02 4A 1F + 15 00 02 4B 17 + 15 00 02 4C 17 + 15 00 02 4D 37 + 15 00 02 4E 37 + 15 00 02 4F 09 + 15 00 02 50 09 + 15 00 02 51 0B + 15 00 02 52 0B + 15 00 02 53 05 + 15 00 02 54 05 + 15 00 02 55 07 + 15 00 02 56 07 + 15 00 02 57 1F + 15 00 02 58 40 + 15 00 02 5B 30 + 15 00 02 5C 16 + 15 00 02 5D 34 + 15 00 02 5E 05 + 15 00 02 5F 02 + 15 00 02 63 00 + 15 00 02 64 6A + 15 00 02 67 73 + 15 00 02 68 1D + 15 00 02 69 08 + 15 00 02 6A 6A + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 00 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 75 FF + 15 00 02 77 DD + 15 00 02 78 3F + 15 00 02 79 15 + 15 00 02 7A 17 + 15 00 02 7D 14 + 15 00 02 7E 82 + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 61 + 15 00 02 0E 48 + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 0C + 15 00 02 E0 00 + 15 00 02 80 01 + 05 78 01 11 + 05 14 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display_timings0: display-timings { + native-mode = <&dsi1_timing0>; + + dsi1_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + + hsync-len = <18>; + hback-porch = <20>; + hfront-porch = <40>; + + vsync-len = <4>; + vback-porch = <20>; + vfront-porch = <20>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <1>; }; }; - }; - - fragment@1 { - target = <&dsi1>; - __overlay__ { - status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&backlight>; - power-supply = <&vcc_mipi>; - width-mm = <135>; - height-mm = <216>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <2>; - - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 3B - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 AF - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B AF - 15 00 02 1C 00 - 15 00 02 35 26 - 15 00 02 37 09 - 15 00 02 38 04 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3C 78 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F 7F - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 42 81 - 15 00 02 43 14 - 15 00 02 44 23 - 15 00 02 45 28 - 15 00 02 55 02 - 15 00 02 57 69 - 15 00 02 59 0A - 15 00 02 5A 2A - 15 00 02 5B 17 - 15 00 02 5D 7F - 15 00 02 5E 6B - 15 00 02 5F 5C - 15 00 02 60 4F - 15 00 02 61 4D - 15 00 02 62 3F - 15 00 02 63 42 - 15 00 02 64 2B - 15 00 02 65 44 - 15 00 02 66 43 - 15 00 02 67 43 - 15 00 02 68 63 - 15 00 02 69 52 - 15 00 02 6A 5A - 15 00 02 6B 4F - 15 00 02 6C 4E - 15 00 02 6D 20 - 15 00 02 6E 0F - 15 00 02 6F 00 - 15 00 02 70 7F - 15 00 02 71 6B - 15 00 02 72 5C - 15 00 02 73 4F - 15 00 02 74 4D - 15 00 02 75 3F - 15 00 02 76 42 - 15 00 02 77 2B - 15 00 02 78 44 - 15 00 02 79 43 - 15 00 02 7A 43 - 15 00 02 7B 63 - 15 00 02 7C 52 - 15 00 02 7D 5A - 15 00 02 7E 4F - 15 00 02 7F 4E - 15 00 02 80 20 - 15 00 02 81 0F - 15 00 02 82 00 - 15 00 02 E0 02 - 15 00 02 00 02 - 15 00 02 01 02 - 15 00 02 02 00 - 15 00 02 03 00 - 15 00 02 04 1E - 15 00 02 05 1E - 15 00 02 06 1F - 15 00 02 07 1F - 15 00 02 08 1F - 15 00 02 09 17 - 15 00 02 0A 17 - 15 00 02 0B 37 - 15 00 02 0C 37 - 15 00 02 0D 47 - 15 00 02 0E 47 - 15 00 02 0F 45 - 15 00 02 10 45 - 15 00 02 11 4B - 15 00 02 12 4B - 15 00 02 13 49 - 15 00 02 14 49 - 15 00 02 15 1F - 15 00 02 16 01 - 15 00 02 17 01 - 15 00 02 18 00 - 15 00 02 19 00 - 15 00 02 1A 1E - 15 00 02 1B 1E - 15 00 02 1C 1F - 15 00 02 1D 1F - 15 00 02 1E 1F - 15 00 02 1F 17 - 15 00 02 20 17 - 15 00 02 21 37 - 15 00 02 22 37 - 15 00 02 23 46 - 15 00 02 24 46 - 15 00 02 25 44 - 15 00 02 26 44 - 15 00 02 27 4A - 15 00 02 28 4A - 15 00 02 29 48 - 15 00 02 2A 48 - 15 00 02 2B 1F - 15 00 02 2C 01 - 15 00 02 2D 01 - 15 00 02 2E 00 - 15 00 02 2F 00 - 15 00 02 30 1F - 15 00 02 31 1F - 15 00 02 32 1E - 15 00 02 33 1E - 15 00 02 34 1F - 15 00 02 35 17 - 15 00 02 36 17 - 15 00 02 37 37 - 15 00 02 38 37 - 15 00 02 39 08 - 15 00 02 3A 08 - 15 00 02 3B 0A - 15 00 02 3C 0A - 15 00 02 3D 04 - 15 00 02 3E 04 - 15 00 02 3F 06 - 15 00 02 40 06 - 15 00 02 41 1F - 15 00 02 42 02 - 15 00 02 43 02 - 15 00 02 44 00 - 15 00 02 45 00 - 15 00 02 46 1F - 15 00 02 47 1F - 15 00 02 48 1E - 15 00 02 49 1E - 15 00 02 4A 1F - 15 00 02 4B 17 - 15 00 02 4C 17 - 15 00 02 4D 37 - 15 00 02 4E 37 - 15 00 02 4F 09 - 15 00 02 50 09 - 15 00 02 51 0B - 15 00 02 52 0B - 15 00 02 53 05 - 15 00 02 54 05 - 15 00 02 55 07 - 15 00 02 56 07 - 15 00 02 57 1F - 15 00 02 58 40 - 15 00 02 5B 30 - 15 00 02 5C 16 - 15 00 02 5D 34 - 15 00 02 5E 05 - 15 00 02 5F 02 - 15 00 02 63 00 - 15 00 02 64 6A - 15 00 02 67 73 - 15 00 02 68 1D - 15 00 02 69 08 - 15 00 02 6A 6A - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 00 - 15 00 02 6E 00 - 15 00 02 6F 88 - 15 00 02 75 FF - 15 00 02 77 DD - 15 00 02 78 3F - 15 00 02 79 15 - 15 00 02 7A 17 - 15 00 02 7D 14 - 15 00 02 7E 82 - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 61 - 15 00 02 0E 48 - 15 00 02 E0 00 - 15 00 02 E6 02 - 15 00 02 E7 0C - 15 00 02 E0 00 - 15 00 02 80 01 - 05 78 01 11 - 05 14 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display_timings0: display-timings { - native-mode = <&dsi1_timing0>; - - dsi1_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - - hsync-len = <18>; - hback-porch = <20>; - hfront-porch = <40>; - - vsync-len = <4>; - vback-porch = <20>; - vfront-porch = <20>; - - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <1>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; - }; - }; - }; - }; - - fragment@2 { - target = <&dsi1_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&video_phy1>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&hdmi_in_vp0>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@5 { - target = <&hdmi>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&route_dsi1>; - - __overlay__ { - status = "disabled"; - connect = <&vp0_out_dsi1>; }; }; - fragment@7 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - power-supply = <&vcc_mipi>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; - focaltech,max-touch-number = <5>; - focaltech,display-coords = <0 0 799 1279>; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; }; }; }; - - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - }; +}; + +&dsi1_in_vp0 { + status = "okay"; +}; + +&video_phy1 { + status = "okay"; +}; + +&hdmi_in_vp0 { + status = "disabled"; +}; + +&hdmi { + status = "disabled"; +}; + +&route_dsi1 { + status = "disabled"; + connect = <&vp0_out_dsi1>; +}; + +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + power-supply = <&vcc_mipi>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; + focaltech,max-touch-number = <5>; + focaltech,display-coords = <0 0 799 1279>; }; - - fragment@9 { - target = <&pwm14>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&pwm14m0_pins>; +}; + +&pinctrl { + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; -}; \ No newline at end of file +}; + +&pwm14 { + status = "okay"; + pinctrl-0 = <&pwm14m0_pins>; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-8hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-8hd.dts index 25d0731e..38602c5a 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-8hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-radxa-display-8hd.dts @@ -14,399 +14,359 @@ exclusive = "video_phy1","GPIO3_C4","GPIO3_B1","GPIO3_B2"; description = "Enable Radxa Display 8HD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - enable-active-high; - regulator-always-on; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + enable-active-high; + regulator-always-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + }; - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm14 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm14 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; - __overlay__ { - status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - #address-cells = <1>; - #size-cells = <0>; + dsi_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + power-supply = <&vcc_mipi>; - dsi_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; - reg = <0>; - backlight = <&backlight>; - power-supply = <&vcc_mipi>; + width-mm = <107>; + height-mm = <199>; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <2>; + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 72 + 15 00 02 03 00 + 15 00 02 04 65 + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 B7 + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B B7 + 15 00 02 1C 00 + 15 00 02 24 FE + 15 00 02 37 19 + 15 00 02 38 05 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3B 01 + 15 00 02 3C 70 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 1E + 15 00 02 44 0F + 15 00 02 45 28 + 15 00 02 4B 04 + 15 00 02 55 02 + 15 00 02 56 01 + 15 00 02 57 A9 + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 37 + 15 00 02 5B 19 + 15 00 02 5D 78 + 15 00 02 5E 63 + 15 00 02 5F 54 + 15 00 02 60 48 + 15 00 02 61 45 + 15 00 02 62 38 + 15 00 02 63 3D + 15 00 02 64 28 + 15 00 02 65 43 + 15 00 02 66 41 + 15 00 02 67 43 + 15 00 02 68 62 + 15 00 02 69 50 + 15 00 02 6A 57 + 15 00 02 6B 49 + 15 00 02 6C 44 + 15 00 02 6D 37 + 15 00 02 6E 23 + 15 00 02 6F 10 + 15 00 02 70 78 + 15 00 02 71 63 + 15 00 02 72 54 + 15 00 02 73 49 + 15 00 02 74 45 + 15 00 02 75 38 + 15 00 02 76 3D + 15 00 02 77 28 + 15 00 02 78 43 + 15 00 02 79 41 + 15 00 02 7A 43 + 15 00 02 7B 62 + 15 00 02 7C 50 + 15 00 02 7D 57 + 15 00 02 7E 49 + 15 00 02 7F 44 + 15 00 02 80 37 + 15 00 02 81 23 + 15 00 02 82 10 + 15 00 02 E0 02 + 15 00 02 00 47 + 15 00 02 01 47 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 4B + 15 00 02 05 4B + 15 00 02 06 49 + 15 00 02 07 49 + 15 00 02 08 41 + 15 00 02 09 1F + 15 00 02 0A 1F + 15 00 02 0B 1F + 15 00 02 0C 1F + 15 00 02 0D 1F + 15 00 02 0E 1F + 15 00 02 0F 5F + 15 00 02 10 5F + 15 00 02 11 57 + 15 00 02 12 77 + 15 00 02 13 35 + 15 00 02 14 1F + 15 00 02 15 1F + 15 00 02 16 46 + 15 00 02 17 46 + 15 00 02 18 44 + 15 00 02 19 44 + 15 00 02 1A 4A + 15 00 02 1B 4A + 15 00 02 1C 48 + 15 00 02 1D 48 + 15 00 02 1E 40 + 15 00 02 1F 1F + 15 00 02 20 1F + 15 00 02 21 1F + 15 00 02 22 1F + 15 00 02 23 1F + 15 00 02 24 1F + 15 00 02 25 5F + 15 00 02 26 5F + 15 00 02 27 57 + 15 00 02 28 77 + 15 00 02 29 35 + 15 00 02 2A 1F + 15 00 02 2B 1F + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 10 + 15 00 02 5C 06 + 15 00 02 5D 40 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 30 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 03 + 15 00 02 64 6B + 15 00 02 65 05 + 15 00 02 66 0C + 15 00 02 67 73 + 15 00 02 68 09 + 15 00 02 69 03 + 15 00 02 6A 56 + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 04 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 D5 + 15 00 02 78 2E + 15 00 02 79 12 + 15 00 02 7A 03 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 60 + 15 00 02 0E 2A + 15 00 02 36 59 + 15 00 02 E0 00 + 15 00 02 80 01 + 15 00 02 E0 00 + 15 00 02 11 00 + 15 78 02 29 00 + ]; - width-mm = <107>; - height-mm = <199>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <2>; - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 72 - 15 00 02 03 00 - 15 00 02 04 65 - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 B7 - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B B7 - 15 00 02 1C 00 - 15 00 02 24 FE - 15 00 02 37 19 - 15 00 02 38 05 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3B 01 - 15 00 02 3C 70 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F FF - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 43 1E - 15 00 02 44 0F - 15 00 02 45 28 - 15 00 02 4B 04 - 15 00 02 55 02 - 15 00 02 56 01 - 15 00 02 57 A9 - 15 00 02 58 0A - 15 00 02 59 0A - 15 00 02 5A 37 - 15 00 02 5B 19 - 15 00 02 5D 78 - 15 00 02 5E 63 - 15 00 02 5F 54 - 15 00 02 60 48 - 15 00 02 61 45 - 15 00 02 62 38 - 15 00 02 63 3D - 15 00 02 64 28 - 15 00 02 65 43 - 15 00 02 66 41 - 15 00 02 67 43 - 15 00 02 68 62 - 15 00 02 69 50 - 15 00 02 6A 57 - 15 00 02 6B 49 - 15 00 02 6C 44 - 15 00 02 6D 37 - 15 00 02 6E 23 - 15 00 02 6F 10 - 15 00 02 70 78 - 15 00 02 71 63 - 15 00 02 72 54 - 15 00 02 73 49 - 15 00 02 74 45 - 15 00 02 75 38 - 15 00 02 76 3D - 15 00 02 77 28 - 15 00 02 78 43 - 15 00 02 79 41 - 15 00 02 7A 43 - 15 00 02 7B 62 - 15 00 02 7C 50 - 15 00 02 7D 57 - 15 00 02 7E 49 - 15 00 02 7F 44 - 15 00 02 80 37 - 15 00 02 81 23 - 15 00 02 82 10 - 15 00 02 E0 02 - 15 00 02 00 47 - 15 00 02 01 47 - 15 00 02 02 45 - 15 00 02 03 45 - 15 00 02 04 4B - 15 00 02 05 4B - 15 00 02 06 49 - 15 00 02 07 49 - 15 00 02 08 41 - 15 00 02 09 1F - 15 00 02 0A 1F - 15 00 02 0B 1F - 15 00 02 0C 1F - 15 00 02 0D 1F - 15 00 02 0E 1F - 15 00 02 0F 5F - 15 00 02 10 5F - 15 00 02 11 57 - 15 00 02 12 77 - 15 00 02 13 35 - 15 00 02 14 1F - 15 00 02 15 1F - 15 00 02 16 46 - 15 00 02 17 46 - 15 00 02 18 44 - 15 00 02 19 44 - 15 00 02 1A 4A - 15 00 02 1B 4A - 15 00 02 1C 48 - 15 00 02 1D 48 - 15 00 02 1E 40 - 15 00 02 1F 1F - 15 00 02 20 1F - 15 00 02 21 1F - 15 00 02 22 1F - 15 00 02 23 1F - 15 00 02 24 1F - 15 00 02 25 5F - 15 00 02 26 5F - 15 00 02 27 57 - 15 00 02 28 77 - 15 00 02 29 35 - 15 00 02 2A 1F - 15 00 02 2B 1F - 15 00 02 58 40 - 15 00 02 59 00 - 15 00 02 5A 00 - 15 00 02 5B 10 - 15 00 02 5C 06 - 15 00 02 5D 40 - 15 00 02 5E 01 - 15 00 02 5F 02 - 15 00 02 60 30 - 15 00 02 61 01 - 15 00 02 62 02 - 15 00 02 63 03 - 15 00 02 64 6B - 15 00 02 65 05 - 15 00 02 66 0C - 15 00 02 67 73 - 15 00 02 68 09 - 15 00 02 69 03 - 15 00 02 6A 56 - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 04 - 15 00 02 6E 04 - 15 00 02 6F 88 - 15 00 02 70 00 - 15 00 02 71 00 - 15 00 02 72 06 - 15 00 02 73 7B - 15 00 02 74 00 - 15 00 02 75 F8 - 15 00 02 76 00 - 15 00 02 77 D5 - 15 00 02 78 2E - 15 00 02 79 12 - 15 00 02 7A 03 - 15 00 02 7B 00 - 15 00 02 7C 00 - 15 00 02 7D 03 - 15 00 02 7E 7B - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 60 - 15 00 02 0E 2A - 15 00 02 36 59 - 15 00 02 E0 00 - 15 00 02 80 01 - 15 00 02 E0 00 - 15 00 02 11 00 - 15 78 02 29 00 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - disp_timings0: display-timings { - native-mode = <&dsi0_timing0>; - dsi0_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - hsync-len = <20>; - hback-porch = <20>; - hfront-porch = <40>; - vsync-len = <4>; - vback-porch = <28>; - vfront-porch = <30>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <20>; + hback-porch = <20>; + hfront-porch = <40>; + vsync-len = <4>; + vback-porch = <28>; + vfront-porch = <30>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; + }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; }; - fragment@2 { - target = <&dsi1_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&video_phy1>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&hdmi_in_vp0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "disabled"; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; }; }; +}; - fragment@5 { - target = <&hdmi>; +&dsi1_in_vp0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&video_phy1 { + status = "okay"; +}; - fragment@6 { - target = <&route_dsi1>; +&hdmi_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - connect = <&vp0_out_dsi1>; - }; - }; +&hdmi { + status = "disabled"; +}; - fragment@7 { - target = <&i2c3>; +&route_dsi1 { + status = "disabled"; + connect = <&vp0_out_dsi1>; +}; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; - #address-cells = <1>; - #size-cells = <0>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_mipi>; - }; - }; + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_mipi>; }; +}; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; +}; - fragment@9 { - target = <&pwm14>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&pwm14m0_pins>; - }; - }; +&pwm14 { + status = "okay"; + pinctrl-0 = <&pwm14m0_pins>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-raspberrypi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-raspberrypi-7inch-touchscreen.dts index 72383cd2..d5f85341 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-raspberrypi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-raspberrypi-7inch-touchscreen.dts @@ -12,133 +12,101 @@ exclusive = "video_phy1"; description = "Enable Raspberry Pi 7-inch Touchscreen."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_mipi: vcc-mipi { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_mipi"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - regulator-always-on; - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + vcc_mipi: vcc-mipi { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_mipi"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + regulator-always-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dsi1_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_dsi1>; - }; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c3m1_xfer>; + port@1 { + reg = <1>; #address-cells = <1>; #size-cells = <0>; - rockpi_ft5406: rockpi_ft5406@38 { - compatible = "rockpi_ft5406"; - reg = <0x38>; - }; - - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + dsi1_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&dsi1_in_vp0>; +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + rockpi_ft5406: rockpi_ft5406@38 { + compatible = "rockpi_ft5406"; + reg = <0x38>; }; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp0_out_dsi1>; - }; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; }; - fragment@5 { - target = <&hdmi>; - - __overlay__ { - status = "disabled"; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@6 { - target = <&hdmi_in_vp0>; +&dsi1_in_vp0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_dsi1 { + status = "okay"; + connect = <&vp0_out_dsi1>; +}; - fragment@7 { - target = <&video_phy1>; +&hdmi { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&hdmi_in_vp0 { + status = "disabled"; +}; + +&video_phy1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v1p3.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v1p3.dts index 0f048d1c..425fddf3 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v1p3.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v1p3.dts @@ -11,12 +11,8 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera v1.3."; }; +}; - fragment@10 { - target = <&ov5647>; - - __overlay__ { - rockchip,camera-module-name = "rpi-camera-v1p3"; - }; - }; +&ov5647 { + rockchip,camera-module-name = "rpi-camera-v1p3"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v2.dts index beb7be46..713ac0c8 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-3c-rpi-camera-v2.dts @@ -13,165 +13,129 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera v2"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_24m: external-camera-clock-24m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - - vcc_camera: vcc-camera { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_camera"; - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; - }; - }; +&{/} { + clk_cam_24m: external-camera-clock-24m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; }; - fragment@1 { - target = <&i2c2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2m1_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - camera_imx219: camera-imx219@10 { - status = "okay"; - compatible = "sony,imx219"; - reg = <0x10>; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v2"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; - }; - }; + vcc_camera: vcc-camera { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_camera"; + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; }; - fragment@2 { - target = <&csi2_dphy_hw>; - - __overlay__ { - status = "okay"; - }; + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; }; +}; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy0_out: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp0_in>; - }; - }; +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + #address-cells = <1>; + #size-cells = <0>; + + camera_imx219: camera-imx219@10 { + status = "okay"; + compatible = "sony,imx219"; + reg = <0x10>; + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v2"; + rockchip,camera-module-lens-name = "default"; + + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@4 { - target = <&rkisp_vir0>; +&csi2_dphy_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&csi2_dphy0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - isp0_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy0_out>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkisp>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy0_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; + }; }; }; +}; - fragment@6 { - target = <&rkisp_mmu>; +&rkisp_vir0 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy0_out>; }; }; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkisp { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkisp_mmu { + status = "okay"; +}; - fragment@8 { - target = <&rkcif>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&rkcif { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-okdo-5mp-camera.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4-okdo-5mp-camera.dts index a49f946f..dafa5982 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-okdo-5mp-camera.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-okdo-5mp-camera.dts @@ -11,12 +11,8 @@ exclusive = "mipi_dphy_rx0"; description = "Enable OKdo 5MP Camera."; }; +}; - fragment@6 { - target = <&camera_ov5647>; - - __overlay__ { - rockchip,camera-module-name = "OKDO-5MP"; - }; - }; +&camera_ov5647 { + rockchip,camera-module-name = "OKDO-5MP"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-ov5647.dtsi b/arch/arm64/boot/dts/rockchip/overlays/rock-4-ov5647.dtsi index 7877a4d4..2847ff6e 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-ov5647.dtsi +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-ov5647.dtsi @@ -1,135 +1,109 @@ #include #include -/ { - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; + }; - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; - }; - }; + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; }; +}; - fragment@1 { - target = <&i2c4>; +&i2c4 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; + camera_ov5647: camera-ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; - camera_ov5647: camera-ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - - clocks = <&clk_cam_25m>; - clock-names = "xclk"; - - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OV5647"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; + clocks = <&clk_cam_25m>; + clock-names = "xclk"; + + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OV5647"; + rockchip,camera-module-lens-name = "default"; + + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&mipi_dphy_rx0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy_rx0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0_mipi_in>; - }; - }; +&mipi_dphy_rx0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@3 { - target = <&isp0_mmu>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy_rx0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&isp0_mipi_in>; + }; }; }; +}; - fragment@4 { - target = <&rkisp1_0>; +&isp0_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_mipi_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy_rx0_out>; - }; - }; + isp0_mipi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy_rx0_out>; }; }; +}; - fragment@5 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-camera-8m.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-camera-8m.dts index d94ca623..b5304230 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-camera-8m.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-camera-8m.dts @@ -12,135 +12,111 @@ exclusive = "mipi_dphy_rx0"; description = "Enable Radxa Camera 8M 219."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; + }; - clk_cam_24m: external-camera-clock-24m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - }; + clk_cam_24m: external-camera-clock-24m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; }; +}; - fragment@1 { - target = <&i2c4>; +&i2c4 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; + camera_imx219: camera-imx219@10 { + status = "okay"; + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; + + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-8M"; + rockchip,camera-module-lens-name = "default"; - camera_imx219: camera-imx219@10 { - status = "okay"; - compatible = "sony,imx219"; - reg = <0x10>; - - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; - - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-8M"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; + +&mipi_dphy_rx0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@2 { - target = <&mipi_dphy_rx0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy_rx0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0_mipi_in>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@3 { - target = <&isp0_mmu>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy_rx0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&isp0_mipi_in>; + }; }; }; +}; - fragment@4 { - target = <&rkisp1_0>; +&isp0_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_mipi_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy_rx0_out>; - }; - }; + isp0_mipi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy_rx0_out>; }; }; +}; - fragment@5 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-display-10hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-display-10hd.dts index 250cb58c..31cacec0 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-display-10hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-radxa-display-10hd.dts @@ -14,413 +14,373 @@ exclusive = "dsi1","GPIO4_C6","GPIO4_D2","GPIO4_D4"; description = "Enable Radxa Display 10HD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm1 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; +&{/} { + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@1 { - target = <&dsi>; +&dsi { + dsi1-only; + status = "okay"; +}; - __overlay__ { - dsi1-only; - status = "okay"; - }; - }; +&dsi1 { + status = "okay"; + rockchip,dsi-dsi0 = <&dsi>; - fragment@2 { - target = <&dsi1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - rockchip,dsi-dsi0 = <&dsi>; + dsi_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + power-supply = <&vcc_mipi>; + width-mm = <135>; + height-mm = <216>; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <2>; + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 3B + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 AF + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B AF + 15 00 02 1C 00 + 15 00 02 35 26 + 15 00 02 37 09 + 15 00 02 38 04 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3C 78 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F 7F + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 42 81 + 15 00 02 43 14 + 15 00 02 44 23 + 15 00 02 45 28 + 15 00 02 55 02 + 15 00 02 57 69 + 15 00 02 59 0A + 15 00 02 5A 2A + 15 00 02 5B 17 + 15 00 02 5D 7F + 15 00 02 5E 6B + 15 00 02 5F 5C + 15 00 02 60 4F + 15 00 02 61 4D + 15 00 02 62 3F + 15 00 02 63 42 + 15 00 02 64 2B + 15 00 02 65 44 + 15 00 02 66 43 + 15 00 02 67 43 + 15 00 02 68 63 + 15 00 02 69 52 + 15 00 02 6A 5A + 15 00 02 6B 4F + 15 00 02 6C 4E + 15 00 02 6D 20 + 15 00 02 6E 0F + 15 00 02 6F 00 + 15 00 02 70 7F + 15 00 02 71 6B + 15 00 02 72 5C + 15 00 02 73 4F + 15 00 02 74 4D + 15 00 02 75 3F + 15 00 02 76 42 + 15 00 02 77 2B + 15 00 02 78 44 + 15 00 02 79 43 + 15 00 02 7A 43 + 15 00 02 7B 63 + 15 00 02 7C 52 + 15 00 02 7D 5A + 15 00 02 7E 4F + 15 00 02 7F 4E + 15 00 02 80 20 + 15 00 02 81 0F + 15 00 02 82 00 + 15 00 02 E0 02 + 15 00 02 00 02 + 15 00 02 01 02 + 15 00 02 02 00 + 15 00 02 03 00 + 15 00 02 04 1E + 15 00 02 05 1E + 15 00 02 06 1F + 15 00 02 07 1F + 15 00 02 08 1F + 15 00 02 09 17 + 15 00 02 0A 17 + 15 00 02 0B 37 + 15 00 02 0C 37 + 15 00 02 0D 47 + 15 00 02 0E 47 + 15 00 02 0F 45 + 15 00 02 10 45 + 15 00 02 11 4B + 15 00 02 12 4B + 15 00 02 13 49 + 15 00 02 14 49 + 15 00 02 15 1F + 15 00 02 16 01 + 15 00 02 17 01 + 15 00 02 18 00 + 15 00 02 19 00 + 15 00 02 1A 1E + 15 00 02 1B 1E + 15 00 02 1C 1F + 15 00 02 1D 1F + 15 00 02 1E 1F + 15 00 02 1F 17 + 15 00 02 20 17 + 15 00 02 21 37 + 15 00 02 22 37 + 15 00 02 23 46 + 15 00 02 24 46 + 15 00 02 25 44 + 15 00 02 26 44 + 15 00 02 27 4A + 15 00 02 28 4A + 15 00 02 29 48 + 15 00 02 2A 48 + 15 00 02 2B 1F + 15 00 02 2C 01 + 15 00 02 2D 01 + 15 00 02 2E 00 + 15 00 02 2F 00 + 15 00 02 30 1F + 15 00 02 31 1F + 15 00 02 32 1E + 15 00 02 33 1E + 15 00 02 34 1F + 15 00 02 35 17 + 15 00 02 36 17 + 15 00 02 37 37 + 15 00 02 38 37 + 15 00 02 39 08 + 15 00 02 3A 08 + 15 00 02 3B 0A + 15 00 02 3C 0A + 15 00 02 3D 04 + 15 00 02 3E 04 + 15 00 02 3F 06 + 15 00 02 40 06 + 15 00 02 41 1F + 15 00 02 42 02 + 15 00 02 43 02 + 15 00 02 44 00 + 15 00 02 45 00 + 15 00 02 46 1F + 15 00 02 47 1F + 15 00 02 48 1E + 15 00 02 49 1E + 15 00 02 4A 1F + 15 00 02 4B 17 + 15 00 02 4C 17 + 15 00 02 4D 37 + 15 00 02 4E 37 + 15 00 02 4F 09 + 15 00 02 50 09 + 15 00 02 51 0B + 15 00 02 52 0B + 15 00 02 53 05 + 15 00 02 54 05 + 15 00 02 55 07 + 15 00 02 56 07 + 15 00 02 57 1F + 15 00 02 58 40 + 15 00 02 5B 30 + 15 00 02 5C 16 + 15 00 02 5D 34 + 15 00 02 5E 05 + 15 00 02 5F 02 + 15 00 02 63 00 + 15 00 02 64 6A + 15 00 02 67 73 + 15 00 02 68 1D + 15 00 02 69 08 + 15 00 02 6A 6A + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 00 + 15 00 02 6E 00 + 15 00 02 6F 88 + 15 00 02 75 FF + 15 00 02 77 DD + 15 00 02 78 3F + 15 00 02 79 15 + 15 00 02 7A 17 + 15 00 02 7D 14 + 15 00 02 7E 82 + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 61 + 15 00 02 0E 48 + 15 00 02 E0 00 + 15 00 02 E6 02 + 15 00 02 E7 0C + 15 00 02 E0 00 + 15 00 02 80 01 + 05 78 01 11 + 05 14 01 29 + ]; - #address-cells = <1>; - #size-cells = <0>; - - dsi_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; - reg = <0>; - backlight = <&backlight>; - power-supply = <&vcc_mipi>; - width-mm = <135>; - height-mm = <216>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <2>; - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 3B - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 AF - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B AF - 15 00 02 1C 00 - 15 00 02 35 26 - 15 00 02 37 09 - 15 00 02 38 04 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3C 78 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F 7F - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 42 81 - 15 00 02 43 14 - 15 00 02 44 23 - 15 00 02 45 28 - 15 00 02 55 02 - 15 00 02 57 69 - 15 00 02 59 0A - 15 00 02 5A 2A - 15 00 02 5B 17 - 15 00 02 5D 7F - 15 00 02 5E 6B - 15 00 02 5F 5C - 15 00 02 60 4F - 15 00 02 61 4D - 15 00 02 62 3F - 15 00 02 63 42 - 15 00 02 64 2B - 15 00 02 65 44 - 15 00 02 66 43 - 15 00 02 67 43 - 15 00 02 68 63 - 15 00 02 69 52 - 15 00 02 6A 5A - 15 00 02 6B 4F - 15 00 02 6C 4E - 15 00 02 6D 20 - 15 00 02 6E 0F - 15 00 02 6F 00 - 15 00 02 70 7F - 15 00 02 71 6B - 15 00 02 72 5C - 15 00 02 73 4F - 15 00 02 74 4D - 15 00 02 75 3F - 15 00 02 76 42 - 15 00 02 77 2B - 15 00 02 78 44 - 15 00 02 79 43 - 15 00 02 7A 43 - 15 00 02 7B 63 - 15 00 02 7C 52 - 15 00 02 7D 5A - 15 00 02 7E 4F - 15 00 02 7F 4E - 15 00 02 80 20 - 15 00 02 81 0F - 15 00 02 82 00 - 15 00 02 E0 02 - 15 00 02 00 02 - 15 00 02 01 02 - 15 00 02 02 00 - 15 00 02 03 00 - 15 00 02 04 1E - 15 00 02 05 1E - 15 00 02 06 1F - 15 00 02 07 1F - 15 00 02 08 1F - 15 00 02 09 17 - 15 00 02 0A 17 - 15 00 02 0B 37 - 15 00 02 0C 37 - 15 00 02 0D 47 - 15 00 02 0E 47 - 15 00 02 0F 45 - 15 00 02 10 45 - 15 00 02 11 4B - 15 00 02 12 4B - 15 00 02 13 49 - 15 00 02 14 49 - 15 00 02 15 1F - 15 00 02 16 01 - 15 00 02 17 01 - 15 00 02 18 00 - 15 00 02 19 00 - 15 00 02 1A 1E - 15 00 02 1B 1E - 15 00 02 1C 1F - 15 00 02 1D 1F - 15 00 02 1E 1F - 15 00 02 1F 17 - 15 00 02 20 17 - 15 00 02 21 37 - 15 00 02 22 37 - 15 00 02 23 46 - 15 00 02 24 46 - 15 00 02 25 44 - 15 00 02 26 44 - 15 00 02 27 4A - 15 00 02 28 4A - 15 00 02 29 48 - 15 00 02 2A 48 - 15 00 02 2B 1F - 15 00 02 2C 01 - 15 00 02 2D 01 - 15 00 02 2E 00 - 15 00 02 2F 00 - 15 00 02 30 1F - 15 00 02 31 1F - 15 00 02 32 1E - 15 00 02 33 1E - 15 00 02 34 1F - 15 00 02 35 17 - 15 00 02 36 17 - 15 00 02 37 37 - 15 00 02 38 37 - 15 00 02 39 08 - 15 00 02 3A 08 - 15 00 02 3B 0A - 15 00 02 3C 0A - 15 00 02 3D 04 - 15 00 02 3E 04 - 15 00 02 3F 06 - 15 00 02 40 06 - 15 00 02 41 1F - 15 00 02 42 02 - 15 00 02 43 02 - 15 00 02 44 00 - 15 00 02 45 00 - 15 00 02 46 1F - 15 00 02 47 1F - 15 00 02 48 1E - 15 00 02 49 1E - 15 00 02 4A 1F - 15 00 02 4B 17 - 15 00 02 4C 17 - 15 00 02 4D 37 - 15 00 02 4E 37 - 15 00 02 4F 09 - 15 00 02 50 09 - 15 00 02 51 0B - 15 00 02 52 0B - 15 00 02 53 05 - 15 00 02 54 05 - 15 00 02 55 07 - 15 00 02 56 07 - 15 00 02 57 1F - 15 00 02 58 40 - 15 00 02 5B 30 - 15 00 02 5C 16 - 15 00 02 5D 34 - 15 00 02 5E 05 - 15 00 02 5F 02 - 15 00 02 63 00 - 15 00 02 64 6A - 15 00 02 67 73 - 15 00 02 68 1D - 15 00 02 69 08 - 15 00 02 6A 6A - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 00 - 15 00 02 6E 00 - 15 00 02 6F 88 - 15 00 02 75 FF - 15 00 02 77 DD - 15 00 02 78 3F - 15 00 02 79 15 - 15 00 02 7A 17 - 15 00 02 7D 14 - 15 00 02 7E 82 - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 61 - 15 00 02 0E 48 - 15 00 02 E0 00 - 15 00 02 E6 02 - 15 00 02 E7 0C - 15 00 02 E0 00 - 15 00 02 80 01 - 05 78 01 11 - 05 14 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - disp_timings0: display-timings { - native-mode = <&dsi0_timing0>; - dsi0_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; - hsync-len = <18>; - hback-porch = <20>; - hfront-porch = <40>; + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; - vsync-len = <4>; - vback-porch = <20>; - vfront-porch = <20>; + hsync-len = <18>; + hback-porch = <20>; + hfront-porch = <40>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <1>; - }; - }; + vsync-len = <4>; + vback-porch = <20>; + vfront-porch = <20>; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <1>; }; + }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; }; - fragment@3 { - target = <&vopl_out_dsi1>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&dsi1_in_vopl>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; }; }; +}; - fragment@5 { - target = <&dsi1_in_vopb>; +&vopl_out_dsi1 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vopl { + status = "okay"; +}; - fragment@6 { - target = <&route_dsi>; +&dsi1_in_vopb { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - connect = <&vopl_out_dsi>; - }; - }; +&route_dsi { + status = "disabled"; + connect = <&vopl_out_dsi>; +}; - fragment@7 { - target = <&i2c1>; - - __overlay__ { - status = "okay"; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio4 RK_PD2 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; - focaltech,display-coords = <0 0 799 1279>; - tp-supply = <&vcc_mipi>; - }; - }; + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio4 RK_PD2 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; + focaltech,display-coords = <0 0 799 1279>; + tp-supply = <&vcc_mipi>; }; +}; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, - <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; +&pinctrl { + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, + <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; +}; - fragment@9 { - target = <&pwm1>; - - __overlay__ { - status = "okay"; - }; - }; -}; \ No newline at end of file +&pwm1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-raspi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4-raspi-7inch-touchscreen.dts index babe8efa..5a46b711 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-raspi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-raspi-7inch-touchscreen.dts @@ -9,96 +9,68 @@ exclusive = "dsi1"; description = "Enable Raspberry Pi 7-inch Touchscreen"; }; +}; - fragment@0 { - target = <&dsi>; - - __overlay__ { - dsi1-only; - status = "okay"; - }; - }; - - fragment@1 { - target = <&dsi1>; - - __overlay__ { - rockchip,dsi-dsi0 = <&dsi>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - rockchip,lane-rate = <696>; - - ports { - #address-cells = <1>; - #size-cells = <0>; +&dsi { + dsi1-only; + status = "okay"; +}; - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; - }; +&dsi1 { + rockchip,dsi-dsi0 = <&dsi>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <696>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; }; }; }; +}; - fragment@2 { - target = <&i2c1>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - raspits_panel: raspits-panel@45 { - compatible = "raspberrypi,7inch-touchscreen-panel"; - reg = <0x45>; +&i2c1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - port { - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + raspits_panel: raspits-panel@45 { + compatible = "raspberrypi,7inch-touchscreen-panel"; + reg = <0x45>; - raspits_touch_ft5426: raspits-touch-ft5426@38 { - compatible = "raspits_ft5426"; - reg = <0x38>; + port { + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; - fragment@3 { - target = <&vopl_out_dsi1>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&dsi1_in_vopb>; - - __overlay__ { - status = "disabled"; - }; + raspits_touch_ft5426: raspits-touch-ft5426@38 { + compatible = "raspits_ft5426"; + reg = <0x38>; }; +}; - fragment@5 { - target = <&dsi1_in_vopl>; +&vopl_out_dsi1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi1_in_vopb { + status = "disabled"; +}; - fragment@6 { - target = <&route_dsi>; +&dsi1_in_vopl { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - connect = <&vopl_out_dsi>; - }; - }; +&route_dsi { + status = "disabled"; + connect = <&vopl_out_dsi>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v1_3.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v1_3.dts index 91a8710c..bbff32e4 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v1_3.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v1_3.dts @@ -11,12 +11,8 @@ exclusive = "mipi_dphy_rx0"; description = "Enable Raspberry Pi Camera v1.3."; }; +}; - fragment@6 { - target = <&camera_ov5647>; - - __overlay__ { - rockchip,camera-module-name = "rpi-camera-v1p3"; - }; - }; +&camera_ov5647 { + rockchip,camera-module-name = "rpi-camera-v1p3"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v2.dts index 0f3e412a..7669a62f 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4-rpi-camera-v2.dts @@ -12,135 +12,111 @@ exclusive = "mipi_dphy_rx0"; description = "Enable Raspberry Pi Camera v2."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; + }; - clk_cam_24m: external-camera-clock-24m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - }; + clk_cam_24m: external-camera-clock-24m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; }; +}; - fragment@1 { - target = <&i2c4>; +&i2c4 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; + camera_imx219: camera-imx219@10 { + status = "okay"; + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; + + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v2"; + rockchip,camera-module-lens-name = "default"; - camera_imx219: camera-imx219@10 { - status = "okay"; - compatible = "sony,imx219"; - reg = <0x10>; - - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; - - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v2"; - rockchip,camera-module-lens-name = "default"; - - port { - ucam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam0>; - data-lanes = <1 2>; - }; - }; + port { + ucam_out0: endpoint { + remote-endpoint = <&mipi_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; + +&mipi_dphy_rx0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@2 { - target = <&mipi_dphy_rx0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ucam_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dphy_rx0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0_mipi_in>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@3 { - target = <&isp0_mmu>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + dphy_rx0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&isp0_mipi_in>; + }; }; }; +}; - fragment@4 { - target = <&rkisp1_0>; +&isp0_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_mipi_in: endpoint@0 { - reg = <0>; - remote-endpoint = <&dphy_rx0_out>; - }; - }; + isp0_mipi_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy_rx0_out>; }; }; +}; - fragment@5 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10fhd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10fhd.dts index ce753153..7b5b17bc 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10fhd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10fhd.dts @@ -14,291 +14,227 @@ exclusive = "dsi"; description = "Enable Radxa Display 10FHD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; +&{/} { + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - }; - }; +&pwm2 { + status = "okay"; +}; - fragment@2 { - target = <&dsi>; +&dsi { + status = "okay"; - __overlay__ { - status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; - }; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; }; + }; + }; - dsi_panel: dsi-panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; - reg = <0>; - - backlight = <&backlight>; - power-supply = <&lcd_3v3>; - - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + dsi_panel: dsi-panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&lcd_panel_reset>; + backlight = <&backlight>; + power-supply = <&lcd_3v3>; - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - width-mm = <135>; - height-mm = <217>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_panel_reset>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; - panel-init-sequence = [ - 05 78 01 11 - 05 00 01 29 - ]; + width-mm = <135>; + height-mm = <217>; - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <160000000>; - hactive = <1200>; - vactive = <1920>; + panel-init-sequence = [ + 05 78 01 11 + 05 00 01 29 + ]; - vback-porch = <25>; - vfront-porch = <35>; + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; - hback-porch = <60>; - hfront-porch = <80>; + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <160000000>; + hactive = <1200>; + vactive = <1920>; - hsync-len = <1>; - vsync-len = <1>; + vback-porch = <25>; + vfront-porch = <35>; - vsync-active = <0>; - hsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; + hback-porch = <60>; + hfront-porch = <80>; - ports { - #address-cells = <1>; - #size-cells = <0>; + hsync-len = <1>; + vsync-len = <1>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + vsync-active = <0>; + hsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; }; - }; - - fragment@3 { - target = <&vopl_out_dsi>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&dsi_in_vopl>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&dsi_in_vopb>; - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&route_dsi>; - - __overlay__ { - status = "disabled"; - connect = <&vopl_out_dsi>; - }; - }; - - fragment@7 { - target = <&vcc3v3_dp>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "disabled"; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; + }; }; }; +}; - fragment@8 { - target = <&virtual_pd>; +&vopl_out_dsi { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi_in_vopl { + status = "okay"; +}; - fragment@9 { - target = <&tcphy0>; +&dsi_in_vopb { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_dsi { + status = "disabled"; + connect = <&vopl_out_dsi>; +}; - fragment@10 { - target = <&cdn_dp>; +&vcc3v3_dp { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&virtual_pd { + status = "disabled"; +}; - fragment@11 { - target = <&tcphy0_dp>; +&tcphy0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&cdn_dp { + status = "disabled"; +}; - fragment@12 { - target = <&dp_in_vopl>; +&tcphy0_dp { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp_in_vopl { + status = "disabled"; +}; - fragment@13 { - target = <&dp_in_vopb>; +&dp_in_vopb { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio1 RK_PD0 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1920>; + tp-size = <9271>; + tp-supply = <&vcc_mipi>; }; +}; - fragment@14 { - target = <&i2c1>; - - __overlay__ { - status = "okay"; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio1 RK_PD0 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1920>; - tp-size = <9271>; - tp-supply = <&vcc_mipi>; - }; +&pinctrl { + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@15 { - target = <&pinctrl>; - - __overlay__ { - lcd-panel { - lcd_panel_reset: lcd-panel-reset { - rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, - <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, + <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10hd.dts index dc3d4bdd..bfa79ba2 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-10hd.dts @@ -13,244 +13,180 @@ exclusive = "dsi"; description = "Enable Radxa Display 10HD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; - }; - - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - }; +&{/} { + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@2 { - target = <&dsi>; - - __overlay__ { - status = "okay"; +&pwm2 { + status = "okay"; +}; - #address-cells = <1>; - #size-cells = <0>; +&dsi { + status = "okay"; - rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; - dsi_panel: panel@0 { - status = "okay"; - compatible = "chongzhou,cz101b4001"; - reg = <0>; + rockchip,lane-rate = <480>; - backlight = <&backlight>; - power-supply = <&lcd_3v3>; + dsi_panel: panel@0 { + status = "okay"; + compatible = "chongzhou,cz101b4001"; + reg = <0>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; + backlight = <&backlight>; + power-supply = <&lcd_3v3>; - pinctrl-names = "default"; - pinctrl-0 = <&lcd_panel_reset>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; - ports { - #address-cells = <1>; - #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_panel_reset>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; }; - fragment@3 { - target = <&vopl_out_dsi>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&dsi_in_vopl>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&dsi_in_vopb>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&route_dsi>; - - __overlay__ { - status = "disabled"; - connect = <&vopl_out_dsi>; - }; - }; - - fragment@7 { - target = <&i2c1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio1 RK_PD0 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - focaltech,display-coords = <0 0 799 1279>; - tp-supply = <&vcc_mipi>; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; }; }; }; +}; - fragment@8 { - target = <&pinctrl>; +&vopl_out_dsi { + status = "okay"; +}; - __overlay__ { - lcd-panel { - lcd_panel_reset: lcd-panel-reset { - rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&dsi_in_vopl { + status = "okay"; +}; - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, - <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - }; - }; +&dsi_in_vopb { + status = "disabled"; +}; - fragment@9 { - target = <&vcc3v3_dp>; +&route_dsi { + status = "disabled"; + connect = <&vopl_out_dsi>; +}; - __overlay__ { - status = "disabled"; - }; +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio1 RK_PD0 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + focaltech,display-coords = <0 0 799 1279>; + tp-supply = <&vcc_mipi>; }; +}; - fragment@10 { - target = <&virtual_pd>; - - __overlay__ { - status = "disabled"; +&pinctrl { + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@11 { - target = <&tcphy0>; - - __overlay__ { - extcon = <0>; - status = "okay"; + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, + <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; +}; - fragment@12 { - target = <&cdn_dp>; - - __overlay__ { - status = "disabled"; - }; - }; +&vcc3v3_dp { + status = "disabled"; +}; - fragment@13 { - target = <&tcphy0_dp>; +&virtual_pd { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&tcphy0 { + extcon = <0>; + status = "okay"; +}; - fragment@14 { - target = <&dp_in_vopl>; +&cdn_dp { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&tcphy0_dp { + status = "disabled"; +}; - fragment@15 { - target = <&dp_in_vopb>; +&dp_in_vopl { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp_in_vopb { + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-8hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-8hd.dts index 72a8e8e5..5e835140 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-8hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-radxa-display-8hd.dts @@ -13,245 +13,181 @@ exclusive = "dsi"; description = "Enable Radxa Display 8HD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; - }; - - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - }; +&{/} { + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@2 { - target = <&dsi>; - - __overlay__ { - status = "okay"; +&pwm2 { + status = "okay"; +}; - #address-cells = <1>; - #size-cells = <0>; +&dsi { + status = "okay"; - rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; - dsi_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-8hd"; - reg = <0>; + rockchip,lane-rate = <480>; - backlight = <&backlight>; - power-supply = <&lcd_3v3>; + dsi_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-8hd"; + reg = <0>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; + backlight = <&backlight>; + power-supply = <&lcd_3v3>; - pinctrl-names = "default"; - pinctrl-0 = <&lcd_panel_reset>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; - }; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_panel_reset>; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; }; - fragment@3 { - target = <&vopl_out_dsi>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&dsi_in_vopl>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&dsi_in_vopb>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&route_dsi>; - - __overlay__ { - status = "disabled"; - connect = <&vopl_out_dsi>; - }; - }; - - fragment@7 { - target = <&i2c1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio1 RK_PD0 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_mipi>; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; }; }; }; +}; - fragment@8 { - target = <&pinctrl>; +&vopl_out_dsi { + status = "okay"; +}; - __overlay__ { - lcd-panel { - lcd_panel_reset: lcd-panel-reset { - rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&dsi_in_vopl { + status = "okay"; +}; - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, - <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - }; - }; +&dsi_in_vopb { + status = "disabled"; +}; - fragment@9 { - target = <&vcc3v3_dp>; +&route_dsi { + status = "disabled"; + connect = <&vopl_out_dsi>; +}; - __overlay__ { - status = "disabled"; - }; +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio1 RK_PD0 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_mipi>; }; +}; - fragment@10 { - target = <&virtual_pd>; - - __overlay__ { - status = "disabled"; +&pinctrl { + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@11 { - target = <&tcphy0>; - - __overlay__ { - extcon = <0>; - status = "okay"; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, + <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; +}; - fragment@12 { - target = <&cdn_dp>; - - __overlay__ { - status = "disabled"; - }; - }; +&vcc3v3_dp { + status = "disabled"; +}; - fragment@13 { - target = <&tcphy0_dp>; +&virtual_pd { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&tcphy0 { + extcon = <0>; + status = "okay"; +}; - fragment@14 { - target = <&dp_in_vopl>; +&cdn_dp { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&tcphy0_dp { + status = "disabled"; +}; - fragment@15 { - target = <&dp_in_vopb>; +&dp_in_vopl { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp_in_vopb { + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-raspi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-raspi-7inch-touchscreen.dts index 8df340f0..1105309c 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-raspi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4c-plus-raspi-7inch-touchscreen.dts @@ -9,135 +9,87 @@ exclusive = "dsi"; description = "Enable Raspberry Pi 7-inch Touchscreen"; }; +}; - fragment@0 { - target = <&dsi>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - rockchip,lane-rate = <696>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; - }; - }; - }; - }; - - fragment@1 { - target = <&i2c1>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - raspits_panel: raspits-panel@45 { - compatible = "raspberrypi,7inch-touchscreen-panel"; - reg = <0x45>; +&dsi { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <696>; - port { - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - raspits_touch_ft5426: raspits-touch-ft5426@38 { - compatible = "raspits_ft5426"; - reg = <0x38>; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; }; }; }; +}; - fragment@2 { - target = <&vopl_out_dsi>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&dsi_in_vopl>; - - __overlay__ { - status = "okay"; - }; - }; +&i2c1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&route_dsi>; + raspits_panel: raspits-panel@45 { + compatible = "raspberrypi,7inch-touchscreen-panel"; + reg = <0x45>; - __overlay__ { - status = "okay"; - connect = <&vopl_out_dsi>; + port { + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; + }; }; }; - fragment@5 { - target = <&vcc3v3_dp>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&virtual_pd>; - - __overlay__ { - status = "disabled"; - }; + raspits_touch_ft5426: raspits-touch-ft5426@38 { + compatible = "raspits_ft5426"; + reg = <0x38>; }; +}; - fragment@7 { - target = <&tcphy0>; +&vopl_out_dsi { + status = "okay"; +}; - __overlay__ { - extcon = <0>; - status = "okay"; - }; - }; +&dsi_in_vopl { + status = "okay"; +}; - fragment@8 { - target = <&cdn_dp>; +&route_dsi { + status = "okay"; + connect = <&vopl_out_dsi>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&vcc3v3_dp { + status = "disabled"; +}; - fragment@9 { - target = <&tcphy0_dp>; +&virtual_pd { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&tcphy0 { + extcon = <0>; + status = "okay"; +}; - fragment@10 { - target = <&dp_in_vopl>; +&cdn_dp { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&tcphy0_dp { + status = "disabled"; +}; - fragment@11 { - target = <&dp_in_vopb>; +&dp_in_vopl { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp_in_vopb { + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-4se-radxa-display-8hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-4se-radxa-display-8hd.dts index 39dcd046..81586a51 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-4se-radxa-display-8hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-4se-radxa-display-8hd.dts @@ -14,385 +14,345 @@ exclusive = "dsi1","GPIO4_C6","GPIO4_D2","GPIO4_D4"; description = "Enable Radxa Display 8HD"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight: backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm1 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - }; - }; +&{/} { + backlight: backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm1 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; }; +}; - fragment@1 { - target = <&dsi>; +&dsi { + dsi1-only; + status = "okay"; +}; - __overlay__ { - dsi1-only; - status = "okay"; - }; - }; +&dsi1 { + status = "okay"; + rockchip,dsi-dsi0 = <&dsi>; - fragment@2 { - target = <&dsi1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - rockchip,dsi-dsi0 = <&dsi>; + dsi_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + width-mm = <107>; + height-mm = <199>; + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <2>; + panel-init-sequence = [ + 15 00 02 E0 00 + 15 00 02 E1 93 + 15 00 02 E2 65 + 15 00 02 E3 F8 + 15 00 02 80 03 + 15 00 02 E0 01 + 15 00 02 00 00 + 15 00 02 01 72 + 15 00 02 03 00 + 15 00 02 04 65 + 15 00 02 0C 74 + 15 00 02 17 00 + 15 00 02 18 B7 + 15 00 02 19 00 + 15 00 02 1A 00 + 15 00 02 1B B7 + 15 00 02 1C 00 + 15 00 02 24 FE + 15 00 02 37 19 + 15 00 02 38 05 + 15 00 02 39 00 + 15 00 02 3A 01 + 15 00 02 3B 01 + 15 00 02 3C 70 + 15 00 02 3D FF + 15 00 02 3E FF + 15 00 02 3F FF + 15 00 02 40 06 + 15 00 02 41 A0 + 15 00 02 43 1E + 15 00 02 44 0F + 15 00 02 45 28 + 15 00 02 4B 04 + 15 00 02 55 02 + 15 00 02 56 01 + 15 00 02 57 A9 + 15 00 02 58 0A + 15 00 02 59 0A + 15 00 02 5A 37 + 15 00 02 5B 19 + 15 00 02 5D 78 + 15 00 02 5E 63 + 15 00 02 5F 54 + 15 00 02 60 48 + 15 00 02 61 45 + 15 00 02 62 38 + 15 00 02 63 3D + 15 00 02 64 28 + 15 00 02 65 43 + 15 00 02 66 41 + 15 00 02 67 43 + 15 00 02 68 62 + 15 00 02 69 50 + 15 00 02 6A 57 + 15 00 02 6B 49 + 15 00 02 6C 44 + 15 00 02 6D 37 + 15 00 02 6E 23 + 15 00 02 6F 10 + 15 00 02 70 78 + 15 00 02 71 63 + 15 00 02 72 54 + 15 00 02 73 49 + 15 00 02 74 45 + 15 00 02 75 38 + 15 00 02 76 3D + 15 00 02 77 28 + 15 00 02 78 43 + 15 00 02 79 41 + 15 00 02 7A 43 + 15 00 02 7B 62 + 15 00 02 7C 50 + 15 00 02 7D 57 + 15 00 02 7E 49 + 15 00 02 7F 44 + 15 00 02 80 37 + 15 00 02 81 23 + 15 00 02 82 10 + 15 00 02 E0 02 + 15 00 02 00 47 + 15 00 02 01 47 + 15 00 02 02 45 + 15 00 02 03 45 + 15 00 02 04 4B + 15 00 02 05 4B + 15 00 02 06 49 + 15 00 02 07 49 + 15 00 02 08 41 + 15 00 02 09 1F + 15 00 02 0A 1F + 15 00 02 0B 1F + 15 00 02 0C 1F + 15 00 02 0D 1F + 15 00 02 0E 1F + 15 00 02 0F 5F + 15 00 02 10 5F + 15 00 02 11 57 + 15 00 02 12 77 + 15 00 02 13 35 + 15 00 02 14 1F + 15 00 02 15 1F + 15 00 02 16 46 + 15 00 02 17 46 + 15 00 02 18 44 + 15 00 02 19 44 + 15 00 02 1A 4A + 15 00 02 1B 4A + 15 00 02 1C 48 + 15 00 02 1D 48 + 15 00 02 1E 40 + 15 00 02 1F 1F + 15 00 02 20 1F + 15 00 02 21 1F + 15 00 02 22 1F + 15 00 02 23 1F + 15 00 02 24 1F + 15 00 02 25 5F + 15 00 02 26 5F + 15 00 02 27 57 + 15 00 02 28 77 + 15 00 02 29 35 + 15 00 02 2A 1F + 15 00 02 2B 1F + 15 00 02 58 40 + 15 00 02 59 00 + 15 00 02 5A 00 + 15 00 02 5B 10 + 15 00 02 5C 06 + 15 00 02 5D 40 + 15 00 02 5E 01 + 15 00 02 5F 02 + 15 00 02 60 30 + 15 00 02 61 01 + 15 00 02 62 02 + 15 00 02 63 03 + 15 00 02 64 6B + 15 00 02 65 05 + 15 00 02 66 0C + 15 00 02 67 73 + 15 00 02 68 09 + 15 00 02 69 03 + 15 00 02 6A 56 + 15 00 02 6B 08 + 15 00 02 6C 00 + 15 00 02 6D 04 + 15 00 02 6E 04 + 15 00 02 6F 88 + 15 00 02 70 00 + 15 00 02 71 00 + 15 00 02 72 06 + 15 00 02 73 7B + 15 00 02 74 00 + 15 00 02 75 F8 + 15 00 02 76 00 + 15 00 02 77 D5 + 15 00 02 78 2E + 15 00 02 79 12 + 15 00 02 7A 03 + 15 00 02 7B 00 + 15 00 02 7C 00 + 15 00 02 7D 03 + 15 00 02 7E 7B + 15 00 02 E0 04 + 15 00 02 00 0E + 15 00 02 02 B3 + 15 00 02 09 60 + 15 00 02 0E 2A + 15 00 02 36 59 + 15 00 02 E0 00 + 15 00 02 80 01 + 15 00 02 E0 00 + 15 00 02 11 00 + 15 78 02 29 00 + ]; - #address-cells = <1>; - #size-cells = <0>; + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; - dsi_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; - reg = <0>; - backlight = <&backlight>; - width-mm = <107>; - height-mm = <199>; - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <2>; - panel-init-sequence = [ - 15 00 02 E0 00 - 15 00 02 E1 93 - 15 00 02 E2 65 - 15 00 02 E3 F8 - 15 00 02 80 03 - 15 00 02 E0 01 - 15 00 02 00 00 - 15 00 02 01 72 - 15 00 02 03 00 - 15 00 02 04 65 - 15 00 02 0C 74 - 15 00 02 17 00 - 15 00 02 18 B7 - 15 00 02 19 00 - 15 00 02 1A 00 - 15 00 02 1B B7 - 15 00 02 1C 00 - 15 00 02 24 FE - 15 00 02 37 19 - 15 00 02 38 05 - 15 00 02 39 00 - 15 00 02 3A 01 - 15 00 02 3B 01 - 15 00 02 3C 70 - 15 00 02 3D FF - 15 00 02 3E FF - 15 00 02 3F FF - 15 00 02 40 06 - 15 00 02 41 A0 - 15 00 02 43 1E - 15 00 02 44 0F - 15 00 02 45 28 - 15 00 02 4B 04 - 15 00 02 55 02 - 15 00 02 56 01 - 15 00 02 57 A9 - 15 00 02 58 0A - 15 00 02 59 0A - 15 00 02 5A 37 - 15 00 02 5B 19 - 15 00 02 5D 78 - 15 00 02 5E 63 - 15 00 02 5F 54 - 15 00 02 60 48 - 15 00 02 61 45 - 15 00 02 62 38 - 15 00 02 63 3D - 15 00 02 64 28 - 15 00 02 65 43 - 15 00 02 66 41 - 15 00 02 67 43 - 15 00 02 68 62 - 15 00 02 69 50 - 15 00 02 6A 57 - 15 00 02 6B 49 - 15 00 02 6C 44 - 15 00 02 6D 37 - 15 00 02 6E 23 - 15 00 02 6F 10 - 15 00 02 70 78 - 15 00 02 71 63 - 15 00 02 72 54 - 15 00 02 73 49 - 15 00 02 74 45 - 15 00 02 75 38 - 15 00 02 76 3D - 15 00 02 77 28 - 15 00 02 78 43 - 15 00 02 79 41 - 15 00 02 7A 43 - 15 00 02 7B 62 - 15 00 02 7C 50 - 15 00 02 7D 57 - 15 00 02 7E 49 - 15 00 02 7F 44 - 15 00 02 80 37 - 15 00 02 81 23 - 15 00 02 82 10 - 15 00 02 E0 02 - 15 00 02 00 47 - 15 00 02 01 47 - 15 00 02 02 45 - 15 00 02 03 45 - 15 00 02 04 4B - 15 00 02 05 4B - 15 00 02 06 49 - 15 00 02 07 49 - 15 00 02 08 41 - 15 00 02 09 1F - 15 00 02 0A 1F - 15 00 02 0B 1F - 15 00 02 0C 1F - 15 00 02 0D 1F - 15 00 02 0E 1F - 15 00 02 0F 5F - 15 00 02 10 5F - 15 00 02 11 57 - 15 00 02 12 77 - 15 00 02 13 35 - 15 00 02 14 1F - 15 00 02 15 1F - 15 00 02 16 46 - 15 00 02 17 46 - 15 00 02 18 44 - 15 00 02 19 44 - 15 00 02 1A 4A - 15 00 02 1B 4A - 15 00 02 1C 48 - 15 00 02 1D 48 - 15 00 02 1E 40 - 15 00 02 1F 1F - 15 00 02 20 1F - 15 00 02 21 1F - 15 00 02 22 1F - 15 00 02 23 1F - 15 00 02 24 1F - 15 00 02 25 5F - 15 00 02 26 5F - 15 00 02 27 57 - 15 00 02 28 77 - 15 00 02 29 35 - 15 00 02 2A 1F - 15 00 02 2B 1F - 15 00 02 58 40 - 15 00 02 59 00 - 15 00 02 5A 00 - 15 00 02 5B 10 - 15 00 02 5C 06 - 15 00 02 5D 40 - 15 00 02 5E 01 - 15 00 02 5F 02 - 15 00 02 60 30 - 15 00 02 61 01 - 15 00 02 62 02 - 15 00 02 63 03 - 15 00 02 64 6B - 15 00 02 65 05 - 15 00 02 66 0C - 15 00 02 67 73 - 15 00 02 68 09 - 15 00 02 69 03 - 15 00 02 6A 56 - 15 00 02 6B 08 - 15 00 02 6C 00 - 15 00 02 6D 04 - 15 00 02 6E 04 - 15 00 02 6F 88 - 15 00 02 70 00 - 15 00 02 71 00 - 15 00 02 72 06 - 15 00 02 73 7B - 15 00 02 74 00 - 15 00 02 75 F8 - 15 00 02 76 00 - 15 00 02 77 D5 - 15 00 02 78 2E - 15 00 02 79 12 - 15 00 02 7A 03 - 15 00 02 7B 00 - 15 00 02 7C 00 - 15 00 02 7D 03 - 15 00 02 7E 7B - 15 00 02 E0 04 - 15 00 02 00 0E - 15 00 02 02 B3 - 15 00 02 09 60 - 15 00 02 0E 2A - 15 00 02 36 59 - 15 00 02 E0 00 - 15 00 02 80 01 - 15 00 02 E0 00 - 15 00 02 11 00 - 15 78 02 29 00 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - disp_timings0: display-timings { - native-mode = <&dsi0_timing0>; - dsi0_timing0: timing0 { - clock-frequency = <70000000>; - hactive = <800>; - vactive = <1280>; - hsync-len = <20>; - hback-porch = <20>; - hfront-porch = <40>; - vsync-len = <4>; - vback-porch = <28>; - vfront-porch = <30>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - panel_in_dsi: endpoint { - remote-endpoint = <&dsi_out_panel>; - }; - }; - }; + disp_timings0: display-timings { + native-mode = <&dsi0_timing0>; + dsi0_timing0: timing0 { + clock-frequency = <70000000>; + hactive = <800>; + vactive = <1280>; + hsync-len = <20>; + hback-porch = <20>; + hfront-porch = <40>; + vsync-len = <4>; + vback-porch = <28>; + vfront-porch = <30>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; + }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi>; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel_in_dsi: endpoint { + remote-endpoint = <&dsi_out_panel>; }; }; }; }; - fragment@3 { - target = <&vopl_out_dsi1>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&dsi1_in_vopl>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; }; }; +}; - fragment@5 { - target = <&dsi1_in_vopb>; +&vopl_out_dsi1 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vopl { + status = "okay"; +}; - fragment@6 { - target = <&route_dsi>; +&dsi1_in_vopb { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - connect = <&vopl_out_dsi>; - }; - }; +&route_dsi { + status = "disabled"; + connect = <&vopl_out_dsi>; +}; - fragment@7 { - target = <&i2c1>; +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio4 RK_PD4 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - }; - }; + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio4 RK_PD4 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; }; +}; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>, - <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; +}; - fragment@9 { - target = <&pwm1>; - - __overlay__ { - status = "okay"; - }; - }; +&pwm1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp0.dts index 9912b1fd..2a16b796 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp0.dts @@ -14,226 +14,170 @@ exclusive = "dp0", "edp0", "vp2"; description = "Enable Sharp LQ133T1JW01 display on eDP.\nThis will disable DP0."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight_edp0: backlight-edp0 { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm8 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; - }; - - vcc3v3_lcd_edp0: vcc3v3-lcd-edp0 { - status = "okay"; - compatible = "regulator-fixed"; - gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "vcc3v3_lcd_edp0"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - edp0_panel: edp0-panel { - status = "okay"; - compatible = "simple-panel"; - backlight = <&backlight_edp0>; - power-supply = <&vcc3v3_lcd_edp0>; - pinctrl-names = "default"; - prepare-delay-ms = <100>; - enable-delay-ms = <100>; - bpc = <8>; - width-mm = <305>; - height-mm = <107>; - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <237600000>; - hactive = <2560>; - vactive = <1440>; - hfront-porch = <80>; - hsync-len = <32>; - hback-porch = <48>; - vfront-porch = <31>; - vsync-len = <5>; - vback-porch = <3>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - panel_in_edp0: endpoint { - remote-endpoint = <&edp0_out_panel>; - }; - }; - }; - }; +&{/} { + backlight_edp0: backlight-edp0 { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm8 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&pwm8>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm8m0_pins>; - + vcc3v3_lcd_edp0: vcc3v3-lcd-edp0 { + status = "okay"; + compatible = "regulator-fixed"; + gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "vcc3v3_lcd_edp0"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@2 { - target = <&edp0>; - - __overlay__ { - force-hpd; - disable-audio; - status = "okay"; - - ports { - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - edp0_out_panel: endpoint { - remote-endpoint = <&panel_in_edp0>; - }; - }; + edp0_panel: edp0-panel { + status = "okay"; + compatible = "simple-panel"; + backlight = <&backlight_edp0>; + power-supply = <&vcc3v3_lcd_edp0>; + pinctrl-names = "default"; + prepare-delay-ms = <100>; + enable-delay-ms = <100>; + bpc = <8>; + width-mm = <305>; + height-mm = <107>; + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <237600000>; + hactive = <2560>; + vactive = <1440>; + hfront-porch = <80>; + hsync-len = <32>; + hback-porch = <48>; + vfront-porch = <31>; + vsync-len = <5>; + vback-porch = <3>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; }; - }; - - fragment@3 { - target = <&hdptxphy0>; - - __overlay__ { - status = "okay"; - }; - }; - fragment@4 { - target = <&edp0_in_vp2>; - - __overlay__ { - status = "disabled"; + ports { + panel_in_edp0: endpoint { + remote-endpoint = <&edp0_out_panel>; + }; }; }; +}; - fragment@5 { - target = <&edp0_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; +&pwm8 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm8m0_pins>; - fragment@6 { - target = <&edp0_in_vp1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&edp0 { + force-hpd; + disable-audio; + status = "okay"; - fragment@7 { - target = <&route_edp0>; + ports { + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - connect = <&vp0_out_edp0>; + edp0_out_panel: endpoint { + remote-endpoint = <&panel_in_edp0>; + }; }; }; +}; - fragment@8 { - target = <&dp0>; - - __overlay__ { - status = "disabled"; - }; - }; +&hdptxphy0 { + status = "okay"; +}; - fragment@9 { - target = <&dp0_in_vp1>; +&edp0_in_vp2 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&edp0_in_vp0 { + status = "okay"; +}; - fragment@10 { - target = <&route_dp0>; +&edp0_in_vp1 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_edp0 { + status = "okay"; + connect = <&vp0_out_edp0>; +}; - fragment@11 { - target = <&dp0_sound>; +&dp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp0_in_vp1 { + status = "disabled"; +}; - fragment@12 { - target = <&hdptxphy_hdmi_clk0>; +&route_dp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp0_sound { + status = "disabled"; +}; - fragment@13 { - target = <&hdptxphy_hdmi0>; +&hdptxphy_hdmi_clk0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdptxphy_hdmi0 { + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp1.dts index b86e3a97..9a940fa6 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-enable-sharp-lq133t1jw01-edp-lcd-disable-dp1.dts @@ -14,263 +14,191 @@ exclusive = "dp1", "edp0", "vp2"; description = "Enable Sharp LQ133T1JW01 display on eDP.\nThis will disable DP1."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - backlight_edp0: backlight-edp0 { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm8 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; - }; - - vcc3v3_lcd_edp0: vcc3v3-lcd-edp0 { - status = "okay"; - compatible = "regulator-fixed"; - gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-name = "vcc3v3_lcd_edp0"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc3v3_sys>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - edp0_panel: edp0-panel { - status = "okay"; - compatible = "simple-panel"; - backlight = <&backlight_edp0>; - power-supply = <&vcc3v3_lcd_edp0>; - pinctrl-names = "default"; - prepare-delay-ms = <100>; - enable-delay-ms = <100>; - bpc = <8>; - width-mm = <305>; - height-mm = <107>; - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <237600000>; - hactive = <2560>; - vactive = <1440>; - hfront-porch = <80>; - hsync-len = <32>; - hback-porch = <48>; - vfront-porch = <31>; - vsync-len = <5>; - vback-porch = <3>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - panel_in_edp0: endpoint { - remote-endpoint = <&edp0_out_panel>; - }; - }; +&{/} { + backlight_edp0: backlight-edp0 { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm8 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + }; + + vcc3v3_lcd_edp0: vcc3v3-lcd-edp0 { + status = "okay"; + compatible = "regulator-fixed"; + gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "vcc3v3_lcd_edp0"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + edp0_panel: edp0-panel { + status = "okay"; + compatible = "simple-panel"; + backlight = <&backlight_edp0>; + power-supply = <&vcc3v3_lcd_edp0>; + pinctrl-names = "default"; + prepare-delay-ms = <100>; + enable-delay-ms = <100>; + bpc = <8>; + width-mm = <305>; + height-mm = <107>; + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <237600000>; + hactive = <2560>; + vactive = <1440>; + hfront-porch = <80>; + hsync-len = <32>; + hback-porch = <48>; + vfront-porch = <31>; + vsync-len = <5>; + vback-porch = <3>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; }; }; - }; - - fragment@1 { - target = <&pwm8>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm8m0_pins>; - }; - }; - - fragment@2 { - target = <&edp0>; - - __overlay__ { - force-hpd; - disable-audio; - status = "okay"; - - ports { - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - edp0_out_panel: endpoint { - remote-endpoint = <&panel_in_edp0>; - }; - }; + ports { + panel_in_edp0: endpoint { + remote-endpoint = <&edp0_out_panel>; }; }; }; +}; - fragment@3 { - target = <&hdptxphy0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@4 { - target = <&edp0_in_vp2>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@5 { - target = <&edp0_in_vp0>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@6 { - target = <&edp0_in_vp1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@7 { - target = <&route_edp0>; - - __overlay__ { - status = "okay"; - connect = <&vp2_out_edp0>; - }; - }; - - fragment@8 { - target = <&dp1>; - - __overlay__ { - status = "disabled"; - }; - }; +&pwm8 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm8m0_pins>; - fragment@9 { - target = <&dp1_in_vp2>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&edp0 { + force-hpd; + disable-audio; + status = "okay"; - fragment@10 { - target = <&route_dp1>; + ports { + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "disabled"; + edp0_out_panel: endpoint { + remote-endpoint = <&panel_in_edp0>; + }; }; }; +}; - fragment@11 { - target = <&dp1_sound>; +&hdptxphy0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&edp0_in_vp2 { + status = "okay"; +}; - fragment@12 { - target = <&display_subsystem>; +&edp0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - /delete-property/ clocks; - /delete-property/ clock-names; - }; - }; +&edp0_in_vp1 { + status = "disabled"; +}; - fragment@13 { - target = <&hdptxphy_hdmi_clk0>; +&route_edp0 { + status = "okay"; + connect = <&vp2_out_edp0>; +}; +&dp1{ + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp1_in_vp2 { + status = "disabled"; +}; - fragment@14 { - target = <&hdptxphy_hdmi0>; +&route_dp1 { + status = "dis +};abled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp1_sound { + status = "disabled"; +}; - fragment@15 { - target = <&vp0>; +&display_subsystem { + status = "okay"; + /delete-property/ clocks; + /delete-property/ clock-names; +}; - __overlay__ { - assigned-clocks = <&cru DCLK_VOP0_SRC>; - assigned-clock-parents = <&cru PLL_V0PLL>; - }; - }; +&hdptxphy_hdmi_clk0 { + status = "disabled"; +}; - fragment@16 { - target = <&vp1>; +&hdptxphy_hdmi0 { + status = "disabled"; +}; - __overlay__ { - assigned-clocks = <&cru DCLK_VOP1>; - assigned-clock-parents = <&hdptxphy_hdmi_clk1>; - }; - }; +&vp0 { + assigned-clocks = <&cru DCLK_VOP0_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>; +}; - fragment@17 { - target = <&vp2>; +&vp1 { + assigned-clocks = <&cru DCLK_VOP1>; + assigned-clock-parents = <&hdptxphy_hdmi_clk1>; +}; - __overlay__ { - assigned-clocks = <&cru DCLK_VOP2_SRC>; - assigned-clock-parents = <&cru PLL_GPLL>; - }; - }; +&vp2 { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_GPLL>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-hdmi1-8k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-hdmi1-8k.dts index cc5210e4..d8a18d0f 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-hdmi1-8k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-hdmi1-8k.dts @@ -10,63 +10,34 @@ exclusive = "dp0", "vp0", "hdmi1"; description = "Enable 8K output on HDMI1.\nThis will disable DP0."; }; +}; - fragment@0 { - target = <&route_hdmi1>; - - __overlay__ { - connect = <&vp1_out_hdmi1>; - status = "okay"; - }; - }; - - fragment@1 { - target = <&hdmi1_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@2 { - target = <&hdmi1_in_vp1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@3 { - target = <&route_dp0>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@4 { - target = <&dp0>; +&route_hdmi1 { + connect = <&vp1_out_hdmi1>; + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdmi1_in_vp0 { + status = "okay"; +}; +&hdmi1_in_vp1 { + status = "disabled"; +}; - fragment@5 { - target = <&dp0_in_vp0>; +&route_dp0 { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dp0 { + status = "disabled"; +}; - fragment@6 { - target = <&vop>; +&dp0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - assigned-clocks = <&cru ACLK_VOP>; - assigned-clock-rates = <800000000>; - }; - }; +&vop { + assigned-clocks = <&cru ACLK_VOP>; + assigned-clock-rates = <800000000>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam0.dts index 0a0ab3f2..dd29b82e 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam0.dts @@ -12,206 +12,157 @@ exclusive = "csi2_dphy0"; description = "Enable OKDO 5MP Camera on CAM0."; }; +}; - fragment@0 { - target-path = "/"; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; +}; - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OKDO-5MP"; + rockchip,camera-module-lens-name = "default"; + + port { + ov5647_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; + +&csi2_dphy0_hw { + status = "okay"; +}; + +&csi2_dphy0 { + status = "okay"; - fragment@1 { - target = <&i2c3>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OKDO-5MP"; - rockchip,camera-module-lens-name = "default"; - - port { - ov5647_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam0>; - data-lanes = <1 2>; - }; - }; + mipidphy0_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ov5647_out0>; + data-lanes = <1 2>; }; }; - }; - - fragment@2 { - target = <&csi2_dphy0_hw>; - - __overlay__ { - status = "okay"; - }; - }; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&ov5647_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; }; }; }; +}; - fragment@5 { - target = <&rkcif>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@6 { - target = <&rkcif_mipi_lvds2>; - - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0{ + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam1.dts index f09d9ee4..8e9903c1 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-okdo-5mp-camera-on-cam1.dts @@ -12,207 +12,157 @@ exclusive = "csi2_dphy3"; description = "Enable OKDO 5MP Camera on CAM1."; }; +}; - fragment@0 { - target-path = "/"; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; +}; - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; +&i2c7 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OKDO-5MP"; + rockchip,camera-module-lens-name = "default"; + + port { + ov5647_out1: endpoint { + remote-endpoint = <&mipidphy1_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; + +&csi2_dphy1_hw { + status = "okay"; +}; + +&csi2_dphy3 { + status = "okay"; - fragment@1 { - target = <&i2c7>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OKDO-5MP"; - rockchip,camera-module-lens-name = "default"; - - port { - ov5647_out1: endpoint { - remote-endpoint = <&mipidphy1_in_ucam1>; - data-lanes = <1 2>; - }; - }; + mipidphy1_in_ucam1: endpoint@1 { + reg = <1>; + remote-endpoint = <&ov5647_out1>; + data-lanes = <1 2>; }; }; - }; - - fragment@2 { - target = <&csi2_dphy1_hw>; - - __overlay__ { - status = "okay"; - }; - }; - fragment@3 { - /* dphy1 full mode */ - target = <&csi2_dphy3>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy1_in_ucam1: endpoint@1 { - reg = <1>; - remote-endpoint = <&ov5647_out1>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy4_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_csi2_input_1>; - }; - }; - }; - }; - }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi4_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_input_1: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy4_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_output_1: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi4_in1>; - }; - }; + csidphy4_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_csi2_input_1>; }; }; }; +}; - fragment@5 { - target = <&rkcif>; +&mipi4_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@6 { - target = <&rkcif_mipi_lvds4>; - - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi4_in1: endpoint { - remote-endpoint = <&mipi4_csi2_output_1>; - }; + mipi4_csi2_input_1: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy4_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds4_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi4_lvds2_sditf_1: endpoint { - remote-endpoint = <&isp1_vir2>; - }; + mipi4_csi2_output_1: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi4_in1>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds4 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi4_in1: endpoint { + remote-endpoint = <&mipi4_csi2_output_1>; }; }; +}; - fragment@9 { - target = <&isp1_mmu>; +&rkcif_mipi_lvds4_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi4_lvds2_sditf_1: endpoint { + remote-endpoint = <&isp1_vir2>; }; }; +}; - fragment@10 { - target = <&rkisp1>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp1_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp1_vir2>; +&rkisp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_vir2 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp1_vir2: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_lvds2_sditf_1>; - }; - }; + isp1_vir2: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_lvds2_sditf_1>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam0.dts index 60772887..44882b78 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam0.dts @@ -14,195 +14,150 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 4K on CAM0."; }; +}; - fragment@0 { - target = <&i2c3>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - imx415_0: imx415-0@1a { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x1a>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera3_clk>; - power-domains = <&power RK3588_PD_VI>; - pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_LOW>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-4K"; - rockchip,camera-module-lens-name = "DEFAULT"; - port { - imx415_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam0>; - data-lanes = <1 2 3 4>; - }; - }; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + imx415_0: imx415-0@1a { + status = "okay"; + compatible = "sony,imx415"; + reg = <0x1a>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera3_clk>; + power-domains = <&power RK3588_PD_VI>; + pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-4K"; + rockchip,camera-module-lens-name = "DEFAULT"; + port { + imx415_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam0>; + data-lanes = <1 2 3 4>; }; }; }; +}; - fragment@1 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@2 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx415_out0>; - data-lanes = <1 2 3 4>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + mipidphy0_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx415_out0>; + data-lanes = <1 2 3 4>; }; }; - }; - fragment@4 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; - fragment@5 { - target = <&rkcif_mipi_lvds2>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@6 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@8 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@9 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@10 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam1.dts index 27bfcc58..f1e6b1d8 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-4k-on-cam1.dts @@ -14,196 +14,150 @@ exclusive = "csi2_dphy3"; description = "Enable Radxa Camera 4K on CAM1."; }; +}; - fragment@0 { - target = <&i2c7>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - imx415_1: imx415-1@1a { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x1a>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M4>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera4_clk>; - power-domains = <&power RK3588_PD_VI>; - pwdn-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; - rockchip,camera-module-index = <1>; - rockchip,camera-module-facing = "front"; - rockchip,camera-module-name = "RADXA-CAMERA-4K"; - rockchip,camera-module-lens-name = "DEFAULT"; - port { - imx415_out1: endpoint { - remote-endpoint = <&mipidphy1_in_ucam1>; - data-lanes = <1 2 3 4>; - }; - }; +&i2c7 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + imx415_1: imx415-1@1a { + status = "okay"; + compatible = "sony,imx415"; + reg = <0x1a>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M4>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera4_clk>; + power-domains = <&power RK3588_PD_VI>; + pwdn-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <1>; + rockchip,camera-module-facing = "front"; + rockchip,camera-module-name = "RADXA-CAMERA-4K"; + rockchip,camera-module-lens-name = "DEFAULT"; + port { + imx415_out1: endpoint { + remote-endpoint = <&mipidphy1_in_ucam1>; + data-lanes = <1 2 3 4>; }; }; }; +}; - fragment@1 { - target = <&csi2_dphy1_hw>; +&csi2_dphy1_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy3 { + status = "okay"; - fragment@2 { - /* dphy1 full mode */ - target = <&csi2_dphy3>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy1_in_ucam1: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx415_out1>; - data-lanes = <1 2 3 4>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy4_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_csi2_input_1>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&mipi4_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_input_1: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy4_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_output_1: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi4_in1>; - }; - }; + mipidphy1_in_ucam1: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx415_out1>; + data-lanes = <1 2 3 4>; }; }; - }; - fragment@4 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy4_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_csi2_input_1>; + }; }; }; +}; - fragment@5 { - target = <&rkcif_mipi_lvds4>; +&mipi4_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi4_in1: endpoint { - remote-endpoint = <&mipi4_csi2_output_1>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi4_csi2_input_1: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy4_out>; }; }; - }; - - fragment@6 { - target = <&rkcif_mipi_lvds4_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi4_lvds2_sditf_1: endpoint { - remote-endpoint = <&isp1_vir2>; - }; + mipi4_csi2_output_1: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi4_in1>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds4 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi4_in1: endpoint { + remote-endpoint = <&mipi4_csi2_output_1>; }; }; +}; - fragment@8 { - target = <&isp1_mmu>; +&rkcif_mipi_lvds4_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi4_lvds2_sditf_1: endpoint { + remote-endpoint = <&isp1_vir2>; }; }; +}; - fragment@9 { - target = <&rkisp1>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp1_mmu { + status = "okay"; +}; - fragment@10 { - target = <&rkisp1_vir2>; +&rkisp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_vir2 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp1_vir2: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_lvds2_sditf_1>; - }; - }; + isp1_vir2: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_lvds2_sditf_1>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam0.dts index 6960970e..541e60fb 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam0.dts @@ -12,228 +12,175 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 8M 219 on CAM0."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; - - clk_cam_24m: external-camera-clock-24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; }; - fragment@1 { - target = <&i2c3>; + clk_cam_24m: external-camera-clock-24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; + }; +}; - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - imx219_0: imx219-0@10 { - compatible = "sony,imx219"; - reg = <0x10>; + imx219_0: imx219-0@10 { + compatible = "sony,imx219"; + reg = <0x10>; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-8M"; - rockchip,camera-module-lens-name = "default"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-8M"; + rockchip,camera-module-lens-name = "default"; - port { - imx219_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam0>; - data-lanes = <1 2>; - }; - }; + port { + imx219_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam0>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx219_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipidphy0_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx219_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; + +&mipi2_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds2>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam1.dts index 041ab2f0..fa97addc 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-camera-8m-219-on-cam1.dts @@ -12,230 +12,176 @@ exclusive = "csi2_dphy3"; description = "Enable Radxa Camera 8M 219 on CAM1."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; - - clk_cam_24m: external-camera-clock-24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; }; - fragment@1 { - target = <&i2c7>; + clk_cam_24m: external-camera-clock-24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; + }; +}; - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; +&i2c7 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - imx219_1: imx219-1@10 { - compatible = "sony,imx219"; - reg = <0x10>; + imx219_1: imx219-1@10 { + compatible = "sony,imx219"; + reg = <0x10>; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-8M"; - rockchip,camera-module-lens-name = "default"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-8M"; + rockchip,camera-module-lens-name = "default"; - port { - imx219_out1: endpoint { - remote-endpoint = <&mipidphy1_in_ucam1>; - data-lanes = <1 2>; - }; - }; + port { + imx219_out1: endpoint { + remote-endpoint = <&mipidphy1_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&csi2_dphy1_hw>; +&csi2_dphy1_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy3 { + status = "okay"; - fragment@3 { - /* dphy1 full mode */ - target = <&csi2_dphy3>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy1_in_ucam1: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx219_out1>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy4_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_csi2_input_1>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi4_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_input_1: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy4_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_output_1: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi4_in1>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipidphy1_in_ucam1: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx219_out1>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy4_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_csi2_input_1>; + }; }; }; +}; + +&mipi4_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds4>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi4_in1: endpoint { - remote-endpoint = <&mipi4_csi2_output_1>; - }; + mipi4_csi2_input_1: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy4_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds4_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi4_lvds2_sditf_1: endpoint { - remote-endpoint = <&isp1_vir2>; - }; + mipi4_csi2_output_1: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi4_in1>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds4 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi4_in1: endpoint { + remote-endpoint = <&mipi4_csi2_output_1>; }; }; +}; - fragment@9 { - target = <&isp1_mmu>; +&rkcif_mipi_lvds4_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi4_lvds2_sditf_1: endpoint { + remote-endpoint = <&isp1_vir2>; }; }; +}; - fragment@10 { - target = <&rkisp1>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp1_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp1_vir2>; +&rkisp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_vir2 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp1_vir2: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_lvds2_sditf_1>; - }; - }; + isp1_vir2: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_lvds2_sditf_1>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd0.dts index c27123e4..8b2e89b8 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd0.dts @@ -14,254 +14,218 @@ exclusive = "dsi0", "vp3"; description = "Enable Radxa Display 10FHD on LCD0."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi0_backlight: dsi0-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi0_backlight: dsi0-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_backlight_en>; }; +}; - fragment@2 { - target = <&dsi0>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&dsi0_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <62>; + height-mm = <110>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 05 78 01 11 + 05 00 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <160000000>; + hactive = <1200>; + vactive = <1920>; + + vback-porch = <25>; + vfront-porch = <35>; + + hback-porch = <60>; + hfront-porch = <80>; + + hsync-len = <4>; + vsync-len = <4>; + + vsync-active = <0>; + hsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&dsi0_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <62>; - height-mm = <110>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 05 78 01 11 - 05 00 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <160000000>; - hactive = <1200>; - vactive = <1920>; - - vback-porch = <25>; - vfront-porch = <35>; - - hback-porch = <60>; - hfront-porch = <80>; - - hsync-len = <4>; - vsync-len = <4>; - - vsync-active = <0>; - hsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi0>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi0>; - }; - }; +&mipi_dcphy0 { + status = "okay"; +}; - fragment@5 { - target = <&dsi0_in_vp2>; +&route_dsi0 { + status = "okay"; + connect = <&vp3_out_dsi0>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi0_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi0_in_vp3>; +&dsi0_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1920>; + tp-size = <9271>; + tp-supply = <&vcc_lcd_mipi1>; }; +}; - fragment@7 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi0-lcd { + dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; - gt9xx: gt9xx@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1920>; - tp-size = <9271>; - tp-supply = <&vcc_lcd_mipi1>; - }; + dsi0_backlight_en: dsi0-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi0-lcd { - dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi0_backlight_en: dsi0-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd1.dts index 21061693..3f6d0a70 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10fhd-on-lcd1.dts @@ -14,254 +14,218 @@ exclusive = "dsi1", "vp3"; description = "Enable Radxa Display 10FHD on LCD1."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm5 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm5>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm5m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm5 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm5 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm5m2_pins>; +}; - __overlay__ { - status = "okay"; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <62>; + height-mm = <110>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 05 78 01 11 + 05 00 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <160000000>; + hactive = <1200>; + vactive = <1920>; + + vback-porch = <25>; + vfront-porch = <35>; + + hback-porch = <60>; + hfront-porch = <80>; + + hsync-len = <4>; + vsync-len = <4>; + + vsync-active = <0>; + hsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <62>; - height-mm = <110>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 05 78 01 11 - 05 00 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <160000000>; - hactive = <1200>; - vactive = <1920>; - - vback-porch = <25>; - vfront-porch = <35>; - - hback-porch = <60>; - hfront-porch = <80>; - - hsync-len = <4>; - vsync-len = <4>; - - vsync-active = <0>; - hsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&mipi_dcphy1 { + status = "okay"; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c8 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8m4_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1920>; + tp-size = <9271>; + tp-supply = <&vcc_lcd_mipi1>; }; +}; - fragment@7 { - target = <&i2c8>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c8m4_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; - gt9xx: gt9xx@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1920>; - tp-size = <9271>; - tp-supply = <&vcc_lcd_mipi1>; - }; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd0.dts index 80fb42e5..597f2f84 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd0.dts @@ -13,205 +13,169 @@ exclusive = "dsi0", "vp3"; description = "Enable Radxa Display 10HD on LCD0."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi0_backlight: dsi0-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi0_backlight: dsi0-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_backlight_en>; }; +}; - fragment@2 { - target = <&dsi0>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi0 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-10hd-ad001"; + reg = <0>; + backlight = <&dsi0_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-10hd-ad001"; + port@0 { reg = <0>; - backlight = <&dsi0_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi0>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi0>; - }; - }; +&mipi_dcphy0 { + status = "okay"; +}; - fragment@5 { - target = <&dsi0_in_vp2>; +&route_dsi0 { + status = "okay"; + connect = <&vp3_out_dsi0>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi0_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi0_in_vp3>; +&dsi0_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + focaltech,reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + focaltech,display-coords = <0 0 799 1279>; }; +}; - fragment@7 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi0-lcd { + dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - focaltech,reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - focaltech,display-coords = <0 0 799 1279>; - }; + dsi0_backlight_en: dsi0-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi0-lcd { - dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi0_backlight_en: dsi0-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd1.dts index 56591576..38b575ec 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-10hd-on-lcd1.dts @@ -13,205 +13,169 @@ exclusive = "dsi1", "vp3"; description = "Enable Radxa Display 10HD on LCD1."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm5 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm5>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm5m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm5 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm5 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm5m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi1 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-10hd-ad001"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-10hd-ad001"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&mipi_dcphy1 { + status = "okay"; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c8 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8m4_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_HIGH>; + focaltech,reset-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + focaltech,display-coords = <0 0 799 1279>; }; +}; - fragment@7 { - target = <&i2c8>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c8m4_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_HIGH>; - focaltech,reset-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - focaltech,display-coords = <0 0 799 1279>; - }; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd0.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd0.dts index d94afb23..7551630c 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd0.dts @@ -13,207 +13,171 @@ exclusive = "dsi0", "vp3"; description = "Enable Radxa Display 8HD on LCD0."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi0_backlight: dsi0-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi0_backlight: dsi0-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_backlight_en>; }; +}; - fragment@2 { - target = <&dsi0>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi0 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi0_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-8hd"; + reg = <0>; + backlight = <&dsi0_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi0_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-8hd"; + port@0 { reg = <0>; - backlight = <&dsi0_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi0>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi0>; - }; - }; +&mipi_dcphy0 { + status = "okay"; +}; - fragment@5 { - target = <&dsi0_in_vp2>; +&route_dsi0 { + status = "okay"; + connect = <&vp3_out_dsi0>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi0_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi0_in_vp3>; +&dsi0_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_lcd_mipi1>; }; +}; - fragment@7 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi0-lcd { + dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; - gt9xx: gt9xx@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_lcd_mipi1>; - }; + dsi0_backlight_en: dsi0-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi0-lcd { - dsi0_lcd_rst_gpio: dsi0-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi0_backlight_en: dsi0-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd1.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd1.dts index 555b9b90..e42e80e3 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5-itx-radxa-display-8hd-on-lcd1.dts @@ -13,207 +13,171 @@ exclusive = "dsi1", "vp3"; description = "Enable Radxa Display 8HD on LCD1."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm5 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm5>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm5m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm5 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm5 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm5m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi1 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-8hd"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-8hd"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&mipi_dcphy1 { + status = "okay"; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c8 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8m4_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_lcd_mipi1>; }; +}; - fragment@7 { - target = <&i2c8>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c8m4_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; - gt9xx: gt9xx@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_lcd_mipi1>; - }; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-allnet-5inch-display.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-allnet-5inch-display.dts index 034755dc..9941f183 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-allnet-5inch-display.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-allnet-5inch-display.dts @@ -13,123 +13,95 @@ exclusive = "dsi0"; description = "Enable ALLNET 5inch DSI Display"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-always-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; +}; - fragment@1 { - target = <&dsi0>; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <605>; - __overlay__ { - status = "okay"; + dsi0_panel: dsi-panel@0 { + compatible = "raspits,tc358762-5inch"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - rockchip,lane-rate = <605>; - - dsi0_panel: dsi-panel@0 { - compatible = "raspits,tc358762-5inch"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; - }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; + port@0 { + reg = <0>; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c5>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c5m2_xfer>; - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - raspits_ft5426: raspits_ft5426@38 { - compatible = "raspits_ft5426"; - reg = <0x38>; - }; - - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; }; }; }; +}; - fragment@3 { - target = <&mipi_dcphy0>; +&i2c5 { + status = "okay"; + pinctrl-0 = <&i2c5m2_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + raspits_ft5426: raspits_ft5426@38 { + compatible = "raspits_ft5426"; + reg = <0x38>; }; - fragment@4 { - target = <&route_dsi0>; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; + }; - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi0>; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&dsi0_in_vp2>; +&mipi_dcphy0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_dsi0 { + status = "okay"; + connect = <&vp3_out_dsi0>; +}; - fragment@6 { - target = <&dsi0_in_vp3>; +&dsi0_in_vp2 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi0_in_vp3 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-okdo-5mp-camera.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-okdo-5mp-camera.dts index 86b90880..23c7e242 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-okdo-5mp-camera.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-okdo-5mp-camera.dts @@ -12,216 +12,163 @@ exclusive = "csi2_dphy0"; description = "Enable OKDO 5MP Camera."; }; +}; - - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; - }; - }; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; }; +}; - fragment@1 { - target = <&i2c3>; - - __overlay__ { - status = "okay"; - - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OKDO-5MP"; - rockchip,camera-module-lens-name = "default"; - - port { - ov5647_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam1>; - data-lanes = <1 2>; - }; - }; +&i2c3 { + status = "okay"; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OKDO-5MP"; + rockchip,camera-module-lens-name = "default"; + + port { + ov5647_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&ov5647_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipidphy0_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&ov5647_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; - fragment@6 { - target = <&rkcif_mipi_lvds2>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkcif_mipi_lvds2 { + status = "okay"; + + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-25w-poe.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-25w-poe.dts index 2915525a..072f5037 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-25w-poe.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-25w-poe.dts @@ -15,47 +15,40 @@ exclusive = "GPIO1_B3", "GPIO1_B4"; package = "rsetup-config-thermal-governor-step-wise"; }; +}; - fragment@0 { - target-path = "/"; - __overlay__ { - radxa_pow_w1: radxa-poe-w1 { - compatible = "w1-gpio"; - gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - radxa_poe_pwm: radxa-poe-pwm { - compatible = "pwm-gpio"; - #pwm-cells = <3>; - pwm-gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; - }; +&{/} { + radxa_pow_w1: radxa-poe-w1 { + compatible = "w1-gpio"; + gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; - radxa_poe_fan: radxa-poe-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <4>; - cooling-levels = <0 64 128 192 255>; - pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; - }; - }; + radxa_poe_pwm: radxa-poe-pwm { + compatible = "pwm-gpio"; + #pwm-cells = <3>; + pwm-gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; }; - fragment@1 { - target = <&soc_thermal>; + radxa_poe_fan: radxa-poe-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <4>; + cooling-levels = <0 64 128 192 255>; + pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>; + }; +}; - __overlay__ { - cooling-maps { - map3 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map4 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; +&soc_thermal { + cooling-maps { + map3 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map4 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-camera-4k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-camera-4k.dts index 2ed81451..1b406e8a 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-camera-4k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-radxa-camera-4k.dts @@ -14,195 +14,150 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 4K."; }; +}; - fragment@0 { - target = <&i2c3>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - imx415: imx415@1a { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x1a>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M2>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera2_clk>; - power-domains = <&power RK3588_PD_VI>; - pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-4K"; - rockchip,camera-module-lens-name = "DEFAULT"; - port { - imx415_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam0>; - data-lanes = <1 2 3 4>; - }; - }; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + imx415: imx415@1a { + status = "okay"; + compatible = "sony,imx415"; + reg = <0x1a>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M2>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera2_clk>; + power-domains = <&power RK3588_PD_VI>; + pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-4K"; + rockchip,camera-module-lens-name = "DEFAULT"; + port { + imx415_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam0>; + data-lanes = <1 2 3 4>; }; }; }; +}; - fragment@1 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@2 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx415_out0>; - data-lanes = <1 2 3 4>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + mipidphy0_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx415_out0>; + data-lanes = <1 2 3 4>; }; }; - }; - fragment@4 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; - fragment@5 { - target = <&rkcif_mipi_lvds2>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@6 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@8 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@9 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@10 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-raspi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-raspi-7inch-touchscreen.dts index 5dbe2aad..4bd20a96 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-raspi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-raspi-7inch-touchscreen.dts @@ -13,116 +13,88 @@ exclusive = "dsi0"; description = "Enable Raspberry Pi 7-inch Touchscreen"; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-always-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; +}; - fragment@1 { - target = <&dsi0>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - rockchip,lane-rate = <600>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi0_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi0>; - }; - }; +&dsi0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <600>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + dsi0_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi0>; }; }; }; +}; - fragment@2 { - target = <&i2c5>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c5m2_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - raspits_panel: raspits-panel@45 { - compatible = "raspberrypi,7inch-touchscreen-panel"; - reg = <0x45>; - #address-cells = <1>; - #size-cells = <0>; - - platform = <3588>; - - port@0 { - reg = <0>; - panel_in_dsi0: endpoint { - remote-endpoint = <&dsi0_out_panel>; - }; - }; - }; +&i2c5 { + status = "okay"; + pinctrl-0 = <&i2c5m2_xfer>; + #address-cells = <1>; + #size-cells = <0>; - raspits_touch_ft5426: raspits-touch-ft5426@38 { - compatible = "raspits_ft5426"; - reg = <0x38>; - }; + raspits_panel: raspits-panel@45 { + compatible = "raspberrypi,7inch-touchscreen-panel"; + reg = <0x45>; + #address-cells = <1>; + #size-cells = <0>; + + platform = <3588>; - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; + port@0 { + reg = <0>; + panel_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_panel>; }; }; }; - fragment@3 { - target = <&mipi_dcphy0>; - - __overlay__ { - status = "okay"; - }; + raspits_touch_ft5426: raspits-touch-ft5426@38 { + compatible = "raspits_ft5426"; + reg = <0x38>; }; - fragment@4 { - target = <&route_dsi0>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi0>; - }; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; }; +}; - fragment@5 { - target = <&dsi0_in_vp2>; +&mipi_dcphy0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_dsi0 { + status = "okay"; + connect = <&vp3_out_dsi0>; +}; - fragment@6 { - target = <&dsi0_in_vp3>; +&dsi0_in_vp2 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi0_in_vp3 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v1_3.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v1_3.dts index 517960fd..61b96b02 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v1_3.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v1_3.dts @@ -12,216 +12,163 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera v1.3."; }; +}; - - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; - }; - }; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; }; +}; - fragment@1 { - target = <&i2c3>; - - __overlay__ { - status = "okay"; - - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v1p3"; - rockchip,camera-module-lens-name = "default"; - - port { - ov5647_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam1>; - data-lanes = <1 2>; - }; - }; +&i2c3 { + status = "okay"; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v1p3"; + rockchip,camera-module-lens-name = "default"; + + port { + ov5647_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&ov5647_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipidphy0_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&ov5647_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; - fragment@6 { - target = <&rkcif_mipi_lvds2>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkcif_mipi_lvds2 { + status = "okay"; + + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v2.dts index f93382bb..b6a5fc03 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-rpi-camera-v2.dts @@ -12,226 +12,173 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera V2."; }; +}; - - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; - - clk_cam_24m: external-camera-clock-24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; }; - fragment@1 { - target = <&i2c3>; + clk_cam_24m: external-camera-clock-24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; + }; +}; - __overlay__ { - status = "okay"; +&i2c3 { + status = "okay"; - camera_imx219: camera-imx219@10 { - compatible = "sony,imx219"; - reg = <0x10>; + camera_imx219: camera-imx219@10 { + compatible = "sony,imx219"; + reg = <0x10>; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v2"; - rockchip,camera-module-lens-name = "default"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v2"; + rockchip,camera-module-lens-name = "default"; - port { - imx219_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam1>; - data-lanes = <1 2>; - }; - }; + port { + imx219_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&imx219_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + mipidphy0_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&imx219_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; + +&mipi2_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds2>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-sata.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-sata.dts index 6239c1f6..5767e7b4 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-sata.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-sata.dts @@ -10,20 +10,12 @@ exclusive = "combphy0_ps"; description = "Enable SATA0.\nWhen SATA0 is enabled, PCIe cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&pcie2x1l2>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@1 { - target = <&sata0>; +&pcie2x1l2 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&sata0 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-spi-flash.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-spi-flash.dts index 2a069149..5a46bfe0 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5a-spi-flash.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5a-spi-flash.dts @@ -10,47 +10,39 @@ exclusive = "sdhci", "sfc"; description = "Enable SPI flash.\nWhen SPI flash is enabled, eMMC cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&sfc>; - - __overlay__ { - status = "okay"; - max-freq = <50000000>; +&sfc { + status = "okay"; + max-freq = <50000000>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&fspim0_pins>; + + spi_flash: spi-flash@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&fspim0_pins>; - - spi_flash: spi-flash@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "jedec,spi-nor"; - reg = <0x0>; - spi-max-frequency = <50000000>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; - status = "okay"; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; + #size-cells = <1>; - loader@0 { - label = "loader"; - reg = <0x0 0x1000000>; - }; - }; + loader@0 { + label = "loader"; + reg = <0x0 0x1000000>; }; }; }; +}; - fragment@1 { - target = <&sdhci>; - - __overlay__ { - status = "disabled"; - }; - }; +&sdhci { + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-allnet-5inch-display.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-allnet-5inch-display.dts index 1692f0ac..8a898035 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-allnet-5inch-display.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-allnet-5inch-display.dts @@ -13,123 +13,95 @@ exclusive = "dsi1"; description = "Enable ALLNET 5inch DSI Display."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-always-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <605>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762-5inch"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - rockchip,lane-rate = <605>; - - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762-5inch"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c6m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - raspits_ft5426: raspits_ft5426@38 { - compatible = "raspits_ft5426"; - reg = <0x38>; - }; - - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&mipi_dcphy1>; +&i2c6 { + status = "okay"; + pinctrl-0 = <&i2c6m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + raspits_ft5426: raspits_ft5426@38 { + compatible = "raspits_ft5426"; + reg = <0x38>; }; - fragment@4 { - target = <&route_dsi1>; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; + }; - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&mipi_dcphy1 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp2 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&dsi1_in_vp3 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi1-8k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi1-8k.dts index 5d2efa88..cae7d1da 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi1-8k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi1-8k.dts @@ -9,55 +9,31 @@ category = "display"; description = "Enable 8K output on HDMI1.\n8K cannot be enabled on HDMI1 and HDMI2 at the same time."; }; +}; - fragment@0 { - target = <&route_hdmi1>; - - __overlay__ { - connect = <&vp2_out_hdmi1>; - status = "okay"; - }; - }; - - fragment@1 { - target = <&hdmi1_in_vp1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@2 { - target = <&hdmi1_in_vp2>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&route_hdmi0>; +&route_hdmi1 { + connect = <&vp2_out_hdmi1>; + status = "okay"; +}; - __overlay__ { - connect = <&vp0_out_hdmi0>; - status = "okay"; - }; - }; +&hdmi1_in_vp1 { + status = "disabled"; +}; - fragment@4 { - target = <&hdmi0_in_vp0>; +&hdmi1_in_vp2 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&route_hdmi0 { + connect = <&vp0_out_hdmi0>; + status = "okay"; +}; - fragment@5 { - target = <&vop>; +&hdmi0_in_vp0 { + status = "okay"; +}; - __overlay__ { - assigned-clocks = <&cru ACLK_VOP>; - assigned-clock-rates = <800000000>; - }; - }; +&vop { + assigned-clocks = <&cru ACLK_VOP>; + assigned-clock-rates = <800000000>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi2-8k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi2-8k.dts index f3f411a1..9ea4c764 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi2-8k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-hdmi2-8k.dts @@ -9,71 +9,39 @@ category = "display"; description = "Enable 8K output on HDMI2.\n8K cannot be enabled on HDMI1 and HDMI2 at the same time."; }; +}; - fragment@0 { - target = <&route_hdmi1>; - - __overlay__ { - connect = <&vp0_out_hdmi1>; - status = "okay"; - }; - }; - - fragment@1 { - target = <&hdmi1_in_vp1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@2 { - target = <&hdmi1_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&route_hdmi0>; - - __overlay__ { - connect = <&vp2_out_hdmi0>; - status = "okay"; - }; - }; - - fragment@4 { - target = <&hdmi0_in_vp2>; +&route_hdmi1 { + connect = <&vp0_out_hdmi1>; + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&hdmi1_in_vp1 { + status = "disabled"; +}; - fragment@5 { - target = <&hdmi0_in_vp1>; +&hdmi1_in_vp0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_hdmi0 { + connect = <&vp2_out_hdmi0>; + status = "okay"; +}; - fragment@6 { - target = <&hdmi0_in_vp0>; +&hdmi0_in_vp2 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdmi0_in_vp1 { + status = "disabled"; +}; - fragment@7 { - target = <&vop>; +&hdmi0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - assigned-clocks = <&cru ACLK_VOP>; - assigned-clock-rates = <800000000>; - }; - }; +&vop { + assigned-clocks = <&cru ACLK_VOP>; + assigned-clock-rates = <800000000>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-okdo-5mp-camera.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-okdo-5mp-camera.dts index 0af4e402..697eaf68 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-okdo-5mp-camera.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-okdo-5mp-camera.dts @@ -12,218 +12,165 @@ exclusive = "csi2_dphy0"; description = "Enable OKDO 5MP Camera."; }; +}; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OKDO-5MP"; + rockchip,camera-module-lens-name = "default"; + + port { + ov5647_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@1 { - target = <&i2c3>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&csi2_dphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "OKDO-5MP"; - rockchip,camera-module-lens-name = "default"; - - port { - ov5647_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam1>; - data-lanes = <1 2>; - }; - }; + mipidphy0_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&ov5647_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@2 { - target = <&csi2_dphy0_hw>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&ov5647_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; }; }; }; +}; - fragment@5 { - target = <&rkcif>; - - __overlay__ { - status = "okay"; - }; - }; +&mipi2_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds2>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkcif_mipi_lvds2 { + status = "okay"; + + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam0-radxa-camera-4k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam0-radxa-camera-4k.dts index 2167c008..8d3573cc 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam0-radxa-camera-4k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam0-radxa-camera-4k.dts @@ -14,195 +14,150 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 4K on CAM0."; }; +}; - fragment@0 { - target = <&i2c3>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - imx415: imx415@1a { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x1a>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera3_clk>; - power-domains = <&power RK3588_PD_VI>; - pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "front"; - rockchip,camera-module-name = "RADXA-CAMERA-4K"; - rockchip,camera-module-lens-name = "DEFAULT"; - port { - imx415_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam0>; - data-lanes = <1 2 3 4>; - }; - }; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + imx415: imx415@1a { + status = "okay"; + compatible = "sony,imx415"; + reg = <0x1a>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera3_clk>; + power-domains = <&power RK3588_PD_VI>; + pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "front"; + rockchip,camera-module-name = "RADXA-CAMERA-4K"; + rockchip,camera-module-lens-name = "DEFAULT"; + port { + imx415_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam0>; + data-lanes = <1 2 3 4>; }; }; }; +}; - fragment@1 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@2 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx415_out0>; - data-lanes = <1 2 3 4>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + mipidphy0_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx415_out0>; + data-lanes = <1 2 3 4>; }; }; - }; - fragment@4 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; - fragment@5 { - target = <&rkcif_mipi_lvds2>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@6 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@8 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@9 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@10 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-radxa-camera-4k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-radxa-camera-4k.dts index a2f05da8..64381b3b 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-radxa-camera-4k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-radxa-camera-4k.dts @@ -14,197 +14,152 @@ exclusive = "csi2_dphy1"; description = "Enable Radxa Camera 4K on CAM1."; }; +}; - fragment@0 { - target = <&i2c4>; - - __overlay__ { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4m1_xfer>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - imx415: imx415@1a { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x1a>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M4>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera4_clk>; - power-domains = <&power RK3588_PD_VI>; - pwdn-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-4K"; - rockchip,camera-module-lens-name = "DEFAULT"; - port { - imx415_out4: endpoint { - remote-endpoint = <&mipidphy4_in_ucam0>; - data-lanes = <1 2 3 4>; - }; - }; +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + imx415: imx415@1a { + status = "okay"; + compatible = "sony,imx415"; + reg = <0x1a>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M4>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera4_clk>; + power-domains = <&power RK3588_PD_VI>; + pwdn-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-4K"; + rockchip,camera-module-lens-name = "DEFAULT"; + port { + imx415_out4: endpoint { + remote-endpoint = <&mipidphy4_in_ucam0>; + data-lanes = <1 2 3 4>; }; }; }; +}; - fragment@1 { - target = <&csi2_dphy1_hw>; +&csi2_dphy1_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy3 { + status = "okay"; - fragment@2 { - target = <&csi2_dphy3>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy4_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx415_out4>; - data-lanes = <1 2 3 4>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy4_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&mipi4_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy4_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi4_in0>; - }; - }; + mipidphy4_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx415_out4>; + data-lanes = <1 2 3 4>; }; }; - }; - fragment@4 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy4_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_csi2_input>; + }; }; }; +}; - fragment@5 { - target = <&rkcif_mipi_lvds4>; +&mipi4_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi4_in0: endpoint { - remote-endpoint = <&mipi4_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi4_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy4_out>; }; }; - }; - - fragment@6 { - target = <&rkcif_mipi_lvds4_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds4_sditf: endpoint { - remote-endpoint = <&isp1_vir1>; - }; + mipi4_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi4_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds4 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi4_in0: endpoint { + remote-endpoint = <&mipi4_csi2_output>; }; }; +}; - fragment@8 { - target = <&isp1_mmu>; +&rkcif_mipi_lvds4_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds4_sditf: endpoint { + remote-endpoint = <&isp1_vir1>; }; }; +}; - fragment@9 { - target = <&rkisp1>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp1_mmu { + status = "okay"; +}; - fragment@10 { - target = <&rkisp1_vir1>; +&rkisp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_vir1 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp1_vir1: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds4_sditf>; - }; - }; + isp1_vir1: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds4_sditf>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-rpi-camera-v2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-rpi-camera-v2.dts index 45f00d8d..31495263 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-rpi-camera-v2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-cam1-rpi-camera-v2.dts @@ -12,230 +12,177 @@ exclusive = "csi2_dphy4"; description = "Enable Raspberry Pi Camera V2 on CAM1."; }; +}; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; + }; - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; + clk_cam_24m: external-camera-clock-24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; + }; +}; - clk_cam_24m: external-camera-clock-24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + camera_imx219: camera-imx219@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; + + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v2"; + rockchip,camera-module-lens-name = "default"; + + port { + imx219_out4: endpoint { + remote-endpoint = <&mipidphy4_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@1 { - target = <&i2c4>; - - __overlay__ { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4m1_xfer>; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; +&csi2_dphy1_hw { + status = "okay"; +}; - camera_imx219: camera-imx219@10 { - compatible = "sony,imx219"; - reg = <0x10>; +&csi2_dphy4 { + status = "okay"; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v2"; - rockchip,camera-module-lens-name = "default"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - imx219_out4: endpoint { - remote-endpoint = <&mipidphy4_in_ucam1>; - data-lanes = <1 2>; - }; - }; + mipidphy4_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&imx219_out4>; + data-lanes = <1 2>; }; }; - }; - - fragment@2 { - target = <&csi2_dphy1_hw>; - - __overlay__ { - status = "okay"; - }; - }; - fragment@3 { - target = <&csi2_dphy4>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy4_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&imx219_out4>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy4_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi4_csi2_input>; - }; - }; - }; - }; - }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi4_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy4_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi4_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi4_in0>; - }; - }; + csidphy4_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi4_csi2_input>; }; }; }; +}; - fragment@5 { - target = <&rkcif>; - - __overlay__ { - status = "okay"; - }; - }; +&mipi4_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds4>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi4_in0: endpoint { - remote-endpoint = <&mipi4_csi2_output>; - }; + mipi4_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy4_out>; }; }; - }; - fragment@7 { - target = <&rkcif_mipi_lvds4_sditf>; - - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds4_sditf: endpoint { - remote-endpoint = <&isp1_vir1>; - }; + mipi4_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi4_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds4 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi4_in0: endpoint { + remote-endpoint = <&mipi4_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp1_mmu>; +&rkcif_mipi_lvds4_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds4_sditf: endpoint { + remote-endpoint = <&isp1_vir1>; }; }; +}; - fragment@10 { - target = <&rkisp1>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp1_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp1_vir1>; +&rkisp1 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp1_vir1 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp1_vir1: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds4_sditf>; - }; - }; + isp1_vir1: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds4_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi0-8k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi0-8k.dts index 077a248c..6bf2ff03 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi0-8k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi0-8k.dts @@ -10,55 +10,31 @@ exclusive = "vp0", "hdmi0"; description = "Enable 8K output on HDMI0.\n8K cannot be enabled on HDMI0 and HDMI1 at the same time."; }; +}; - fragment@0 { - target = <&route_hdmi1>; - - __overlay__ { - connect = <&vp2_out_hdmi1>; - status = "okay"; - }; - }; - - fragment@1 { - target = <&hdmi1_in_vp1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@2 { - target = <&hdmi1_in_vp2>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&route_hdmi0>; +&route_hdmi1 { + connect = <&vp2_out_hdmi1>; + status = "okay"; +}; - __overlay__ { - connect = <&vp0_out_hdmi0>; - status = "okay"; - }; - }; +&hdmi1_in_vp1 { + status = "disabled"; +}; - fragment@4 { - target = <&hdmi0_in_vp0>; +&hdmi1_in_vp2 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&route_hdmi0 { + connect = <&vp0_out_hdmi0>; + status = "okay"; +}; - fragment@5 { - target = <&vop>; +&hdmi0_in_vp0 { + status = "okay"; +}; - __overlay__ { - assigned-clocks = <&cru ACLK_VOP>; - assigned-clock-rates = <800000000>; - }; - }; +&vop { + assigned-clocks = <&cru ACLK_VOP>; + assigned-clock-rates = <800000000>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi1-8k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi1-8k.dts index e3045065..ac2d0092 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi1-8k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-hdmi1-8k.dts @@ -10,71 +10,39 @@ exclusive = "vp0", "hdmi1"; description = "Enable 8K output on HDMI1.\n8K cannot be enabled on HDMI0 and HDMI1 at the same time."; }; +}; - fragment@0 { - target = <&route_hdmi1>; - - __overlay__ { - connect = <&vp0_out_hdmi1>; - status = "okay"; - }; - }; - - fragment@1 { - target = <&hdmi1_in_vp1>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@2 { - target = <&hdmi1_in_vp0>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&route_hdmi0>; - - __overlay__ { - connect = <&vp2_out_hdmi0>; - status = "okay"; - }; - }; - - fragment@4 { - target = <&hdmi0_in_vp2>; +&route_hdmi1 { + connect = <&vp0_out_hdmi1>; + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&hdmi1_in_vp1 { + status = "disabled"; +}; - fragment@5 { - target = <&hdmi0_in_vp1>; +&hdmi1_in_vp0 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_hdmi0 { + connect = <&vp2_out_hdmi0>; + status = "okay"; +}; - fragment@6 { - target = <&hdmi0_in_vp0>; +&hdmi0_in_vp2 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&hdmi0_in_vp1 { + status = "disabled"; +}; - fragment@7 { - target = <&vop>; +&hdmi0_in_vp0 { + status = "disabled"; +}; - __overlay__ { - assigned-clocks = <&cru ACLK_VOP>; - assigned-clock-rates = <800000000>; - }; - }; +&vop { + assigned-clocks = <&cru ACLK_VOP>; + assigned-clock-rates = <800000000>; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10fhd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10fhd.dts index c2e4a543..a074e774 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10fhd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10fhd.dts @@ -15,259 +15,219 @@ exclusive = "dsi1"; description = "Enable Radxa Display 10FHD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-always-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 PWM_POLARITY_INVERTED>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; +&dsi1{ + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <62>; + height-mm = <110>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 05 78 01 11 + 05 00 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <160000000>; + hactive = <1200>; + vactive = <1920>; + + vback-porch = <25>; + vfront-porch = <35>; + + hback-porch = <60>; + hfront-porch = <80>; + + hsync-len = <4>; + vsync-len = <4>; + + vsync-active = <0>; + hsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <62>; - height-mm = <110>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 05 78 01 11 - 05 00 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <160000000>; - hactive = <1200>; - vactive = <1920>; - - vback-porch = <25>; - vfront-porch = <35>; - - hback-porch = <60>; - hfront-porch = <80>; - - hsync-len = <4>; - vsync-len = <4>; - - vsync-active = <0>; - hsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; - }; - }; - }; - }; - - fragment@3 { - target = <&mipi_dcphy1>; - - __overlay__ { - status = "okay"; }; }; - fragment@4 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1920>; - tp-size = <9271>; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; +&mipi_dcphy1 { + status = "okay"; +}; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1920>; + tp-size = <9271>; + }; +}; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - fragment@5 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp2>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; }; - }; - fragment@7 { - target = <&dsi1_in_vp3>; - - __overlay__ { - status = "okay"; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10hd.dts index f91a5186..938ee28f 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-10hd.dts @@ -14,209 +14,169 @@ exclusive = "dsi1"; description = "Enable Radxa Display 10HD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 PWM_POLARITY_INVERTED>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 PWM_POLARITY_INVERTED>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi1 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "chongzhou,cz101b4001"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "chongzhou,cz101b4001"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; - }; - }; - }; - }; - - fragment@3 { - target = <&mipi_dcphy1>; - - __overlay__ { - status = "okay"; }; }; - fragment@4 { - target = <&i2c6>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - focaltech,display-coords = <0 0 799 1279>; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; +&mipi_dcphy1 { + status = "okay"; +}; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + focaltech,display-coords = <0 0 799 1279>; + }; +}; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - fragment@5 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp2>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; }; - }; - fragment@7 { - target = <&dsi1_in_vp3>; - - __overlay__ { - status = "okay"; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-8hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-8hd.dts index d1ab2f7a..09358d78 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-8hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-plus-radxa-display-8hd.dts @@ -14,207 +14,171 @@ exclusive = "dsi1"; description = "Enable Radxa Display 8HD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 PWM_POLARITY_INVERTED>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi1 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-8hd"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-8hd"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&mipi_dcphy1 { + status = "okay"; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_lcd_mipi1>; }; +}; - fragment@7 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; - gt9xx: gt9xx@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_lcd_mipi1>; - }; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-25w-poe.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-25w-poe.dts index 6edee108..5047dd53 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-25w-poe.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-25w-poe.dts @@ -15,50 +15,39 @@ exclusive = "GPIO3_A7", "GPIO3_C3"; package = "rsetup-config-thermal-governor-step-wise"; }; +}; - fragment@0 { - target-path = "/"; - __overlay__ { - radxa_pow_w1: radxa-poe-w1 { - compatible = "w1-gpio"; - gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - radxa_poe_fan: radxa-poe-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <4>; - cooling-levels = <0 64 128 192 255>; - pwms = <&pwm8 0 40000 PWM_POLARITY_INVERTED>; - }; - }; +&{/} { + radxa_pow_w1: radxa-poe-w1 { + compatible = "w1-gpio"; + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; + status = "okay"; }; - fragment@1 { - target = <&pwm8>; - - __overlay__ { - status = "okay"; - pinctrl-0 = <&pwm8m0_pins>; - }; + radxa_poe_fan: radxa-poe-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <4>; + cooling-levels = <0 64 128 192 255>; + pwms = <&pwm8 0 40000 PWM_POLARITY_INVERTED>; }; +}; - fragment@2 { - target = <&soc_thermal>; +&pwm8 { + status = "okay"; + pinctrl-0 = <&pwm8m0_pins>; +}; - __overlay__ { - cooling-maps { - map3 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - map4 { - cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; +&soc_thermal { + cooling-maps { + map3 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map4 { + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-camera-4k.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-camera-4k.dts index 9a6cf7bc..74ce299d 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-camera-4k.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-camera-4k.dts @@ -14,195 +14,150 @@ exclusive = "csi2_dphy0"; description = "Enable Radxa Camera 4K."; }; +}; - fragment@0 { - target = <&i2c3>; - - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - imx415: imx415@1a { - status = "okay"; - compatible = "sony,imx415"; - reg = <0x1a>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera3_clk>; - power-domains = <&power RK3588_PD_VI>; - pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "RADXA-CAMERA-4K"; - rockchip,camera-module-lens-name = "DEFAULT"; - port { - imx415_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam0>; - data-lanes = <1 2 3 4>; - }; - }; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + imx415: imx415@1a { + status = "okay"; + compatible = "sony,imx415"; + reg = <0x1a>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera3_clk>; + power-domains = <&power RK3588_PD_VI>; + pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "RADXA-CAMERA-4K"; + rockchip,camera-module-lens-name = "DEFAULT"; + port { + imx415_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam0>; + data-lanes = <1 2 3 4>; }; }; }; +}; - fragment@1 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@2 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&imx415_out0>; - data-lanes = <1 2 3 4>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - fragment@3 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + mipidphy0_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&imx415_out0>; + data-lanes = <1 2 3 4>; }; }; - }; - fragment@4 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; - fragment@5 { - target = <&rkcif_mipi_lvds2>; +&mipi2_csi2 { + status = "okay"; - __overlay__ { - status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@6 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@7 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@8 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@9 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@10 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; - diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10fhd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10fhd.dts index a0b4f161..4ca09d9b 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10fhd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10fhd.dts @@ -14,259 +14,219 @@ exclusive = "dsi1"; description = "Enable Radxa Display 10FHD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-always-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + prepare-delay-ms = <120>; + reset-delay-ms = <120>; + init-delay-ms = <120>; + enable-delay-ms = <100>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + + width-mm = <62>; + height-mm = <110>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 05 78 01 11 + 05 00 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <160000000>; + hactive = <1200>; + vactive = <1920>; + + vback-porch = <25>; + vfront-porch = <35>; + + hback-porch = <60>; + hfront-porch = <80>; + + hsync-len = <4>; + vsync-len = <4>; + + vsync-active = <0>; + hsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "simple-panel-dsi"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - prepare-delay-ms = <120>; - reset-delay-ms = <120>; - init-delay-ms = <120>; - enable-delay-ms = <100>; - disable-delay-ms = <120>; - unprepare-delay-ms = <120>; - - width-mm = <62>; - height-mm = <110>; - - dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; - dsi,format = ; - dsi,lanes = <4>; - - panel-init-sequence = [ - 05 78 01 11 - 05 00 01 29 - ]; - - panel-exit-sequence = [ - 05 00 01 28 - 05 00 01 10 - ]; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <160000000>; - hactive = <1200>; - vactive = <1920>; - - vback-porch = <25>; - vfront-porch = <35>; - - hback-porch = <60>; - hfront-porch = <80>; - - hsync-len = <4>; - vsync-len = <4>; - - vsync-active = <0>; - hsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; - }; - }; - }; - }; - - fragment@3 { - target = <&mipi_dcphy1>; - - __overlay__ { - status = "okay"; }; }; - fragment@4 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; - gt9xx: gt9xx@14 { - status = "okay"; - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1920>; - tp-size = <9271>; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; +&mipi_dcphy1 { + status = "okay"; +}; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + status = "okay"; + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1920>; + tp-size = <9271>; + }; +}; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - fragment@5 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp2>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; }; - }; - fragment@7 { - target = <&dsi1_in_vp3>; - - __overlay__ { - status = "okay"; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10hd.dts index 12c3a4f3..cb6c511a 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-10hd.dts @@ -13,209 +13,169 @@ exclusive = "dsi1"; description = "Enable Radxa Display 10HD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi1 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "chongzhou,cz101b4001"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "chongzhou,cz101b4001"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; - }; - }; - }; - }; - - fragment@3 { - target = <&mipi_dcphy1>; - - __overlay__ { - status = "okay"; }; }; - fragment@4 { - target = <&i2c6>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - - focaltech: focaltech@38 { - status = "okay"; - compatible = "focaltech,fts"; - reg = <0x38>; - pinctrl-names = "default"; - pinctrl-0 = <&focaltech_gpio>; - focaltech,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>; - focaltech,reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - focaltech,display-coords = <0 0 799 1279>; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; +&mipi_dcphy1 { + status = "okay"; +}; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + focaltech: focaltech@38 { + status = "okay"; + compatible = "focaltech,fts"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&focaltech_gpio>; + focaltech,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>; + focaltech,reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + focaltech,display-coords = <0 0 799 1279>; + }; +}; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - fragment@5 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp2>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; }; - }; - fragment@7 { - target = <&dsi1_in_vp3>; - - __overlay__ { - status = "okay"; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - focaltech { - focaltech_gpio: focaltech-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + focaltech { + focaltech_gpio: focaltech-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-8hd.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-8hd.dts index 700a07ea..83a4daf0 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-8hd.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-radxa-display-8hd.dts @@ -13,207 +13,171 @@ exclusive = "dsi1"; description = "Enable Radxa Display 8HD."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - dsi1_backlight: dsi1-backlight { - status = "okay"; - compatible = "pwm-backlight"; - pwms = <&pwm2 0 25000 0>; - brightness-levels = < - 0 20 20 21 21 22 22 23 - 23 24 24 25 25 26 26 27 - 27 28 28 29 29 30 30 31 - 31 32 32 33 33 34 34 35 - 35 36 36 37 37 38 38 39 - 40 41 42 43 44 45 46 47 - 48 49 50 51 52 53 54 55 - 56 57 58 59 60 61 62 63 - 64 65 66 67 68 69 70 71 - 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 - 96 97 98 99 100 101 102 103 - 104 105 106 107 108 109 110 111 - 112 113 114 115 116 117 118 119 - 120 121 122 123 124 125 126 127 - 128 129 130 131 132 133 134 135 - 136 137 138 139 140 141 142 143 - 144 145 146 147 148 149 150 151 - 152 153 154 155 156 157 158 159 - 160 161 162 163 164 165 166 167 - 168 169 170 171 172 173 174 175 - 176 177 178 179 180 181 182 183 - 184 185 186 187 188 189 190 191 - 192 193 194 195 196 197 198 199 - 200 201 202 203 204 205 206 207 - 208 209 210 211 212 213 214 215 - 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 - 232 233 234 235 236 237 238 239 - 240 241 242 243 244 245 246 247 - 248 249 250 251 252 253 254 255 - >; - default-brightness-level = <200>; - enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_backlight_en>; - }; +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; - fragment@1 { - target = <&pwm2>; - - __overlay__ { - status = "okay"; - pinctrl-names = "active"; - pinctrl-0 = <&pwm2m2_pins>; - }; + dsi1_backlight: dsi1-backlight { + status = "okay"; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 25000 0>; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + enable-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_backlight_en>; }; +}; - fragment@2 { - target = <&dsi1>; +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m2_pins>; +}; - __overlay__ { - status = "okay"; - rockchip,lane-rate = <480>; +&dsi1 { + status = "okay"; + rockchip,lane-rate = <480>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_panel: panel@0 { + status = "okay"; + compatible = "radxa,display-8hd"; + reg = <0>; + backlight = <&dsi1_backlight>; + + vdd-supply = <&vcc_lcd_mipi1>; + vccio-supply = <&vcc_1v8_s0>; + reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi1_lcd_rst_gpio>; + + ports { #address-cells = <1>; #size-cells = <0>; - dsi1_panel: panel@0 { - status = "okay"; - compatible = "radxa,display-8hd"; + port@0 { reg = <0>; - backlight = <&dsi1_backlight>; - - vdd-supply = <&vcc_lcd_mipi1>; - vccio-supply = <&vcc_1v8_s0>; - reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi1_lcd_rst_gpio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@3 { - target = <&mipi_dcphy1>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; + }; }; }; +}; - fragment@4 { - target = <&route_dsi1>; - - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; - }; +&mipi_dcphy1 { + status = "okay"; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - __overlay__ { - status = "disabled"; - }; - }; +&dsi1_in_vp2 { + status = "disabled"; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp3 { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <>9xx_gpio>; + touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; + reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + max-x = <800>; + max-y = <1280>; + tp-size = <9112>; + tp-supply = <&vcc_lcd_mipi1>; }; +}; - fragment@7 { - target = <&i2c6>; - - __overlay__ { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; +&pinctrl { + dsi1-lcd { + dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; - gt9xx: gt9xx@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - pinctrl-names = "default"; - pinctrl-0 = <>9xx_gpio>; - touch-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_HIGH>; - reset-gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - max-x = <800>; - max-y = <1280>; - tp-size = <9112>; - tp-supply = <&vcc_lcd_mipi1>; - }; + dsi1_backlight_en: dsi1-backlight-en { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - fragment@8 { - target = <&pinctrl>; - - __overlay__ { - dsi1-lcd { - dsi1_lcd_rst_gpio: dsi1-lcd-rst-gpio { - rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - dsi1_backlight_en: dsi1-backlight-en { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gt9xx { - gt9xx_gpio: gt9xx-gpio { - rockchip,pins = - <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; + gt9xx { + gt9xx_gpio: gt9xx-gpio { + rockchip,pins = + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-raspi-7inch-touchscreen.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-raspi-7inch-touchscreen.dts index eab26c1a..05499cca 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-raspi-7inch-touchscreen.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-raspi-7inch-touchscreen.dts @@ -13,122 +13,94 @@ exclusive = "dsi1"; description = "Enable Raspberry Pi 7-inch Touchscreen"; }; - - fragment@0 { - target-path = "/"; - - __overlay__ { - vcc_lcd_mipi1: vcc-lcd-mipi1 { - status = "okay"; - compatible = "regulator-fixed"; - regulator-name = "vcc_lcd_mipi1"; - gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; +}; + +&{/} { + vcc_lcd_mipi1: vcc-lcd-mipi1 { + status = "okay"; + compatible = "regulator-fixed"; + regulator-name = "vcc_lcd_mipi1"; + gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; }; }; +}; - fragment@1 { - target = <&dsi1>; +&dsi1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + rockchip,lane-rate = <605>; - __overlay__ { - status = "okay"; + dsi1_panel: dsi-panel@0 { + compatible = "raspits,tc358762"; + reg = <0x0>; + status = "okay"; + + ports { #address-cells = <1>; #size-cells = <0>; - rockchip,lane-rate = <605>; - - dsi1_panel: dsi-panel@0 { - compatible = "raspits,tc358762"; - reg = <0x0>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - panel_in_dsi1: endpoint { - remote-endpoint = <&dsi1_out_panel>; - }; - }; - }; - }; - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - dsi1_out_panel: endpoint { - remote-endpoint = <&panel_in_dsi1>; - }; + port@0 { + reg = <0>; + panel_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_panel>; }; }; }; }; - fragment@2 { - target = <&i2c6>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - pinctrl-0 = <&i2c6m0_xfer>; - #address-cells = <1>; - #size-cells = <0>; - - raspits_ft5426: raspits_ft5426@38 { - compatible = "raspits_ft5426"; - reg = <0x38>; - }; - - chipone_icn8952: chipone_icn8952@30 { - compatible = "chipone_icn8505"; - reg = <0x30>; - }; - - rockpi_mcu: rockpi-mcu@45 { - compatible = "rockpi_mcu"; - reg = <0x45>; + port@1 { + reg = <1>; + dsi1_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi1>; }; }; }; +}; - fragment@3 { - target = <&mipi_dcphy1>; +&i2c6 { + status = "okay"; + pinctrl-0 = <&i2c6m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; - }; + raspits_ft5426: raspits_ft5426@38 { + compatible = "raspits_ft5426"; + reg = <0x38>; }; - fragment@4 { - target = <&route_dsi1>; + chipone_icn8952: chipone_icn8952@30 { + compatible = "chipone_icn8505"; + reg = <0x30>; + }; - __overlay__ { - status = "okay"; - connect = <&vp3_out_dsi1>; - }; + rockpi_mcu: rockpi-mcu@45 { + compatible = "rockpi_mcu"; + reg = <0x45>; }; +}; - fragment@5 { - target = <&dsi1_in_vp2>; +&mipi_dcphy1 { + status = "okay"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&route_dsi1 { + status = "okay"; + connect = <&vp3_out_dsi1>; +}; - fragment@6 { - target = <&dsi1_in_vp3>; +&dsi1_in_vp2 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; -}; \ No newline at end of file +&dsi1_in_vp3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v1_3.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v1_3.dts index 2558e147..362e3d2f 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v1_3.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v1_3.dts @@ -12,218 +12,165 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera v1.3."; }; +}; +&{/} { + clk_cam_25m: external-camera-clock-25m { + status = "okay"; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "clk_cam_25m"; + #clock-cells = <0>; + }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - clk_cam_25m: external-camera-clock-25m { - status = "okay"; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "clk_cam_25m"; - #clock-cells = <0>; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ov5647: ov5647@36 { + status = "okay"; + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&clk_cam_25m>; + pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; + clock-names = "ext_cam_clk"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v1p3"; + rockchip,camera-module-lens-name = "default"; + + port { + ov5647_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@1 { - target = <&i2c3>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&csi2_dphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; #address-cells = <1>; #size-cells = <0>; - ov5647: ov5647@36 { - status = "okay"; - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&clk_cam_25m>; - pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - clock-names = "ext_cam_clk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v1p3"; - rockchip,camera-module-lens-name = "default"; - - port { - ov5647_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam1>; - data-lanes = <1 2>; - }; - }; + mipidphy0_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&ov5647_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@2 { - target = <&csi2_dphy0_hw>; - - __overlay__ { - status = "okay"; - }; - }; - - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&ov5647_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; }; }; }; +}; - fragment@5 { - target = <&rkcif>; - - __overlay__ { - status = "okay"; - }; - }; +&mipi2_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds2>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkcif_mipi_lvds2 { + status = "okay"; + + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v2.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v2.dts index 7e0f5e7f..e8c42404 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v2.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-rpi-camera-v2.dts @@ -12,228 +12,175 @@ exclusive = "csi2_dphy0"; description = "Enable Raspberry Pi Camera V2."; }; +}; - - fragment@0 { - target-path = "/"; - - __overlay__ { - camera_pwdn_gpio: camera-pwdn-gpio { - compatible = "regulator-fixed"; - regulator-name = "camera_pwdn_gpio"; - regulator-always-on; - regulator-boot-on; - enable-active-high; - gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam_pwdn_gpio>; - }; - - clk_cam_24m: external-camera-clock-24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "clk_cam_24m"; - #clock-cells = <0>; - }; - }; +&{/} { + camera_pwdn_gpio: camera-pwdn-gpio { + compatible = "regulator-fixed"; + regulator-name = "camera_pwdn_gpio"; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_pwdn_gpio>; }; - fragment@1 { - target = <&i2c3>; + clk_cam_24m: external-camera-clock-24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "clk_cam_24m"; + #clock-cells = <0>; + }; +}; - __overlay__ { - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; - camera_imx219: camera-imx219@10 { - compatible = "sony,imx219"; - reg = <0x10>; + camera_imx219: camera-imx219@10 { + compatible = "sony,imx219"; + reg = <0x10>; - clocks = <&clk_cam_24m>; - clock-names = "xvclk"; + clocks = <&clk_cam_24m>; + clock-names = "xvclk"; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "rpi-camera-v2"; - rockchip,camera-module-lens-name = "default"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "rpi-camera-v2"; + rockchip,camera-module-lens-name = "default"; - port { - imx219_out0: endpoint { - remote-endpoint = <&mipidphy0_in_ucam1>; - data-lanes = <1 2>; - }; - }; + port { + imx219_out0: endpoint { + remote-endpoint = <&mipidphy0_in_ucam1>; + data-lanes = <1 2>; }; }; }; +}; - fragment@2 { - target = <&csi2_dphy0_hw>; +&csi2_dphy0_hw { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&csi2_dphy0 { + status = "okay"; - fragment@3 { - target = <&csi2_dphy0>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipidphy0_in_ucam1: endpoint@2 { - reg = <2>; - remote-endpoint = <&imx219_out0>; - data-lanes = <1 2>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - csidphy0_out: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; - }; - }; - }; - }; - }; + ports { + #address-cells = <1>; + #size-cells = <0>; - fragment@4 { - target = <&mipi2_csi2>; - - __overlay__ { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi2_in0>; - }; - }; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipidphy0_in_ucam1: endpoint@2 { + reg = <2>; + remote-endpoint = <&imx219_out0>; + data-lanes = <1 2>; }; }; - }; - fragment@5 { - target = <&rkcif>; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; }; }; +}; + +&mipi2_csi2 { + status = "okay"; - fragment@6 { - target = <&rkcif_mipi_lvds2>; + ports { + #address-cells = <1>; + #size-cells = <0>; - __overlay__ { - status = "okay"; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; - port { - cif_mipi2_in0: endpoint { - remote-endpoint = <&mipi2_csi2_output>; - }; + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; }; }; - }; - fragment@7 { - target = <&rkcif_mipi_lvds2_sditf>; - - __overlay__ { - status = "okay"; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; - port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; - }; + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; }; }; }; +}; + +&rkcif { + status = "okay"; +}; - fragment@8 { - target = <&rkcif_mmu>; +&rkcif_mipi_lvds2 { + status = "okay"; - __overlay__ { - status = "okay"; + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; }; }; +}; - fragment@9 { - target = <&isp0_mmu>; +&rkcif_mipi_lvds2_sditf { + status = "okay"; - __overlay__ { - status = "okay"; + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; }; }; +}; - fragment@10 { - target = <&rkisp0>; +&rkcif_mmu { + status = "okay"; +}; - __overlay__ { - status = "okay"; - }; - }; +&isp0_mmu { + status = "okay"; +}; - fragment@11 { - target = <&rkisp0_vir0>; +&rkisp0 { + status = "okay"; +}; - __overlay__ { - status = "okay"; +&rkisp0_vir0 { + status = "okay"; - port { - #address-cells = <1>; - #size-cells = <0>; + port { + #address-cells = <1>; + #size-cells = <0>; - isp0_vir0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; - }; - }; + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; }; }; +}; - fragment@12 { - target = <&pinctrl>; - - __overlay__ { - camera { - cam_pwdn_gpio: cam-pwdn-gpio { - rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + camera { + cam_pwdn_gpio: cam-pwdn-gpio { + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-sata.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-sata.dts index 8020aa51..568b39e4 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-5b-sata.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-5b-sata.dts @@ -9,36 +9,20 @@ category = "misc"; description = "Enable SATA1.\nWhen SATA1 is enabled, PCIe cannot be enabled on the same port."; }; +}; - fragment@0 { - target = <&wifi_disable>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@1 { - target = <&bt_wake>; - - __overlay__ { - status = "disabled"; - }; - }; - - fragment@2 { - target = <&pcie2x1l0>; +&wifi_disable { + status = "disabled"; +}; - __overlay__ { - status = "disabled"; - }; - }; +&bt_wake { + status = "disabled"; +}; - fragment@3 { - target = <&sata1>; +&pcie2x1l0 { + status = "disabled"; +}; - __overlay__ { - status = "okay"; - }; - }; +&sata1 { + status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rock-pi-s-poe-headphone.dts b/arch/arm64/boot/dts/rockchip/overlays/rock-pi-s-poe-headphone.dts index c862ea44..9eb89179 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rock-pi-s-poe-headphone.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rock-pi-s-poe-headphone.dts @@ -12,33 +12,25 @@ exclusive = "GPIO0_B7"; description = "Enable PoE HAT headphone."; }; +}; - fragment@0 { - target-path = "/"; - - __overlay__ { - hp_en: hp-en { - compatible = "regulator-fixed"; - regulator-name = "hp_en"; - regulator-always-on; - regulator-boot-on; - gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - enable-active-high; - pinctrl-names = "default"; - pinctrl-0 = <&headphone_en>; - }; - }; +&{/} { + hp_en: hp-en { + compatible = "regulator-fixed"; + regulator-name = "hp_en"; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&headphone_en>; }; +}; - fragment@1 { - target = <&pinctrl>; - - __overlay__ { - poe_hat { - headphone_en: headphone-en { - rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; +&pinctrl { + poe_hat { + headphone_en: headphone-en { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rockchip-watchdog.dts b/arch/arm64/boot/dts/rockchip/overlays/rockchip-watchdog.dts index 9f2d741e..610af5cf 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rockchip-watchdog.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rockchip-watchdog.dts @@ -9,12 +9,8 @@ exclusive = "wdt"; description = "Enable Watchdog."; }; +}; - fragment@0 { - target = <&wdt>; - - __overlay__ { - status = "okay"; - }; - }; +&wdt { + status = "okay"; };