From 4cae5bf384ac3ed62a76180350decfee7191a6a5 Mon Sep 17 00:00:00 2001
From: CodeChenL <2540735020@qq.com>
Date: Mon, 1 Jul 2024 14:46:05 +0800
Subject: [PATCH] fix: remove redundant GPIO definitions

---
 .../boot/dts/rockchip/overlays/rk3528-spi0-cs1-enc28j60.dts     | 2 --
 .../boot/dts/rockchip/overlays/rk3528-spi0-cs1-mcp2515.dts      | 2 --
 .../arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-spidev.dts | 2 --
 3 files changed, 6 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-enc28j60.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-enc28j60.dts
index 90382b14..c9effe9e 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-enc28j60.dts
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-enc28j60.dts
@@ -22,9 +22,7 @@ INT=15";
 	#size-cells = <0>;
 	pinctrl-names = "default";
 	max-freq = <50000000>;
-	pinctrl-0 = <&spi0_csn1 &spi0_pins>;
 	num-cs = <2>;
-	cs-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
 
 	ethernet: enc28j60@0 {
 		compatible = "microchip,enc28j60";
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-mcp2515.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-mcp2515.dts
index 9336be72..9448a0b0 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-mcp2515.dts
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-mcp2515.dts
@@ -38,9 +38,7 @@ INT=15";
 	max-freq = <10000000>;
 	#address-cells = <1>;
 	#size-cells = <0>;
-	pinctrl-0 = <&spi0_csn1 &spi0_pins>;
 	num-cs = <2>;
-	cs-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
 
 	can_mcp2515: can-mcp2515@0 {
 		status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-spidev.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-spidev.dts
index 767b9c6f..af038772 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-spidev.dts
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-spi0-cs1-spidev.dts
@@ -18,9 +18,7 @@
 	#address-cells = <1>;
 	#size-cells = <0>;
 	max-freq = <50000000>;
-	pinctrl-0 = <&spi0_csn1 &spi0_pins>;
 	num-cs = <2>;
-	cs-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
 
 	spidev@0 {
 		compatible = "rockchip,spidev";