You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
When running against upstream LLVM/MLIR tests, I see a bunch of very similar failures, which I suspect are due to the same bug. I am not quite sure what's wrong yet though.
Currently responsible for 6 / 69 remaining test failures:
mlir/test/Pass/pass-timing.mlir:61
mlir/test/Dialect/Affine/ops.mlir:53
mlir/test/IR/print-op-custom-or-generic.mlir:9
mlir/test/Dialect/MemRef/alloc-to-alloca.mlir:8
mlir/test/mlir-tblgen/op-interface.td:186
mlir/test/Dialect/ArmSME/enable-arm-za.mlir:17
The text was updated successfully, but these errors were encountered:
When running against upstream LLVM/MLIR tests, I see a bunch of very similar failures, which I suspect are due to the same bug. I am not quite sure what's wrong yet though.
Currently responsible for 6 / 69 remaining test failures:
mlir/test/Pass/pass-timing.mlir:61
mlir/test/Dialect/Affine/ops.mlir:53
mlir/test/IR/print-op-custom-or-generic.mlir:9
mlir/test/Dialect/MemRef/alloc-to-alloca.mlir:8
mlir/test/mlir-tblgen/op-interface.td:186
mlir/test/Dialect/ArmSME/enable-arm-za.mlir:17
The text was updated successfully, but these errors were encountered: